asm_timer.asm

这是DSP信号处理中关于led循环显示的测试程序。

/*****************************************************************************************************************

(C) Copyright 2001 - Analog Devices, Inc.  All rights reserved.

File Name:		asm_timer.asm

Date Modified:	12/20/01		CL		Rev 0.1

Purpose:	  	ADSP-BF535 EZ-Kit Lite Core Timer Example                
		       	Developed using the ADSP-BF535 EZ-KIT Lite Evaluation Platform                
										  
				This program contains routines to initialize the 	  
				state of the ADSP-BF535 event controller.  The core timer is used to generate interrupts and 
				blink the LEDS.

		
************************************************************************************************/


#include <defBF535.h>

.section program;

SETUP:

// Setup Event Vectors and Handlers
	p0.l = EVT0 & 0xffff;
	p0.h = EVT0 >> 16;
	r0 = _EHANDLER (Z);     // Emulation Handler (Int0)
	r0.h = _EHANDLER;
	[ P0 ++ ] = R0;

    R0 = _RHANDLER (Z);
	R0.H = _RHANDLER;  	// Reset Handler (Int1)
    [ P0 ++ ] = R0;

    R0 = _NHANDLER (Z);
	R0.H = _NHANDLER;  	// NMI Handler (Int2)
    [ P0 ++ ] = R0;

    R0.L = _XHANDLER;
	R0.H = _XHANDLER;  	// Exception Handler (Int3)
    [ P0 ++ ] = R0;
	
	[ P0 ++ ] = R0; 	// IVT4 isn't used

    R0 = _HWHANDLER (Z);
	R0.H = _HWHANDLER; 	// HW Error Handler (Int5)
    [ P0 ++ ] = R0;
	
    R0 = _THANDLER (Z);
	R0.H = _THANDLER;  	// Timer Handler (Int6)
    [ P0 ++ ] = R0;
	
    R0 = _RTCHANDLER (Z);
	R0.H = _RTCHANDLER; 	// IVG7 Handler
    [ P0 ++ ] = R0;

    R0 = _I8HANDLER (Z);
	R0.H = _I8HANDLER; 	// IVG8 Handler
    [ P0 ++ ] = R0;

    R0 = _I9HANDLER (Z);
	R0.H = _I9HANDLER; 	// IVG9 Handler
    [ P0 ++ ] = R0;

    R0 = _I10HANDLER (Z);
	R0.H = _I10HANDLER;// IVG10 Handler
    [ P0 ++ ] = R0;

	R0 = _I11HANDLER (Z);
	R0.H = _I11HANDLER;// IVG11 Handler
    [ P0 ++ ] = R0;

    R0 = _I12HANDLER (Z);
	R0.H = _I12HANDLER;// IVG12 Handler
    [ P0 ++ ] = R0;

    R0 = _I13HANDLER (Z);
	R0.H = _I13HANDLER;// IVG13 Handler
    [ P0 ++ ] = R0;

    R0 = _I14HANDLER (Z);
	R0.H = _I14HANDLER;// IVG14 Handler
    [ P0 ++ ] = R0;

    R0 = _I15HANDLER (Z);
	R0.H = _I15HANDLER;// IVG15 Handler
    [ P0 ++ ] = R0;

	P0.L = IMASK & 0xffff;  
	P0.H = IMASK >> 16;    
	R0 =  [P0];  	// Change this to unmask interrupts
	BITSET(R0,6);
	W[ P0 ] = R0;   // write to IMASK register

START:
	p0.l = TCNTL & 0xffff;
	p0.h = TCNTL >> 16;	

	r0=0x5 (Z);    // set bits 0 and 2 to activate timer and enable auto re-load
	[p0] = r0;
	csync;

	r1.l=0x0000;
	r1.h=0x1000;
	[p0+0x4]=r1;   // Load TPERIOD register
	csync;
	
	r2 = 0x0000 (Z);
	[p0+0x8]=r2;   // Load TSCALE register, zero means the timer will decrement once every clock cycle
	csync;

	[p0+0xc]=r1;   // Load TCOUNT with same value as TPERIOD
	csync;	


    P0.L = FIO_DIR & 0xFFFF;
	P0.H = FIO_DIR >> 16;
	R1.L = 0x000f;
	W[P0] = R1;		/*set PF0 - PF3 as outputs*/
	ssync;

	R0.L = 0x000f;
	R1 = 0x0001(z);
	R2 = 0x0000(z);
	P1.L = FIO_FLAG_S & 0xFFFF;
	P1.H = FIO_FLAG_S >> 16;
	P2.L = FIO_FLAG_C & 0xFFFF;
	P2.H = FIO_FLAG_C >> 16;
	W[P2] = R0;		/*set PF0 - PF3*/

	p0.l = TCNTL & 0xffff;
	p0.h = TCNTL >> 16;	
	r0 = [p0];
	bitset(r0,1);    // Enable Timer
	[p0] = r0;

	/************************************************************/
	/************************************************************/
	// clear the pending reset interrupt (return to User mode) and
	// set all other return regs to a known spot (except RETE)
		nop;
		r0.h = wait_here;
		r0.l = wait_here;
		reti = r0;
		rets = r0;
		retn = r0;
		retx = r0;
		nop;
		rti;	// return from supervisor mode to user mode!!
		nop;	// never executed
		nop;	// never executed
	/************************************************************/

wait_here:  jump wait_here;

// Handlers for Events

_EHANDLER:            // Emulation Handler 0
    RTE;

_RHANDLER:            // Reset Handler 1
    RTI;

_NHANDLER:            // NMI Handler 2
    RTN;

_XHANDLER:            // Exception Handler 3
    RTX;

_HWHANDLER:           // HW Error Handler 5
    RTI;

_THANDLER:            // Timer Handler 6
    p0.l = TCNTL & 0xffff;
	p0.h = TCNTL >> 16;	
	r0 = [p0];
	bitset(r0,3);    // Clear core timer interrupt
	[p0] = r0;
    csync;

    R0.L = 0x0005;
	R3.L = 0x000A;	
	CC=R1==R2;
	IF CC JUMP two;
zero:	
	W[P1] = R0;
	W[P2] = R3;
	BITTGL(R1,0);
	RTI;
two:
	W[P2] = R0;
	W[P1] = R3;
	BITTGL(R1,0);
	RTI;
	

_RTCHANDLER:          // IVG 7 Handler  (RTC)
	RTI;    

_I8HANDLER:           // IVG 8 Handler
    RTI;

_I9HANDLER:           // IVG 9 Handler
    RTI;

_I10HANDLER:          // IVG 10 Handler
    RTI;

_I11HANDLER:          // IVG 11 Handler
    RTI;

_I12HANDLER:          // IVG 12 Handler
    RTI;

_I13HANDLER:	      // IVG 13 Handler
    RTI;

_I14HANDLER:
    RTI;

_I15HANDLER:
    RTI;