📄 main.lst
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D:\TIC2XX\C2000\CGTOOLS\BIN\DSPA.EXE main.asm main.obj -ls -v2xx
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Sat Jul 14 16:18:01 2001
Copyright (c) 1987-1999 Texas Instruments Incorporated
main.asm PAGE 1
1
2 .include "LF2407regs.h"
3 .ref ADINIT,ADCINT_ISR,AD,FFT32,ADCHANN
4 .def INT1RET
5 .global _c_int0
6 ;--------------------------------------
7 0000 .sect ".vectors"
8 0000 7980 RSVECT B _c_int0 ; 00
0001 0000'
9 0002 7980 INT1 B INT1_ISR ; 02
0003 0023'
10 0004 7980 INT2 B PHANTOM ; 04
0005 003b'
11 0006 7980 INT3 B PHANTOM ; 06
0007 003b'
12 0008 7980 INT4 B PHANTOM ; 08
0009 003b'
13 000a 7980 INT5 B PHANTOM ; 0A
000b 003b'
14 000c 7980 INT6 B PHANTOM ; 0C
000d 003b'
15
16 0000 .sect ".pvecs"
17 0000 PVECTORS
18 0000 7980 B PHANTOM ; Reserved pvector addr offset
0001 003b'
19 0002 7980 B PHANTOM ; pvector addr offset 0x01 - XINT1
0003 003b'
20 0004 7980 B PHANTOM ; Reserved pvector addr offset
0005 003b'
21 0006 7980 B PHANTOM ; Reserved pvector addr offset
0007 003b'
22 0008 7980 B ADCINT_ISR ; pvector addr offset 0x04 - ADC
0009 0000!
23 000a 7980 B PHANTOM ; pvector addr offset 0x05 - SPI RX/TX and/or RX Overrun
000b 003b'
24 000c 7980 B PHANTOM ; pvector addr offset 0x06 - SCI RX interrupt
000d 003b'
25 000e 7980 B PHANTOM ; pvector addr offset 0x07 - SCI TX interrupt
000f 003b'
26 0010 7980 B PHANTOM ; Reserved pvector addr offset (0x08)
0011 003b'
27 0012 7980 B PHANTOM ; Reserved pvector addr offset (0x09)
0013 003b'
28 0014 7980 B PHANTOM ; Reserved pvector addr offset (0x0a)
0015 003b'
29 0016 7980 B PHANTOM ; Reserved pvector addr offset (0x0b)
0017 003b'
30 0018 7980 B PHANTOM ; Reserved pvector addr offset (0x0c)
0019 003b'
31 001a 7980 B PHANTOM ; Reserved pvector addr offset (0x0d)
001b 003b'
32 001c 7980 B PHANTOM ; Reserved pvector addr offset (0x0e)
001d 003b'
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Sat Jul 14 16:18:01 2001
Copyright (c) 1987-1999 Texas Instruments Incorporated
main.asm PAGE 2
33 001e 7980 B PHANTOM ; Reserved pvector addr offset (0x0f)
001f 003b'
34 0020 7980 B PHANTOM ; pvector addr offset 0x10 - WDT real time interrupt
0021 003b'
35 0022 7980 B PHANTOM ; pvector addr offset 0x11 - XINT2
0023 003b'
36 0024 7980 B PHANTOM ; Reserved pvector addr offset (0x12)
0025 003b'
37 0026 7980 B PHANTOM ; Reserved pvector addr offset (0x13)
0027 003b'
38 0028 7980 B PHANTOM ; Reserved pvector addr offset (0x14)
0029 003b'
39 002a 7980 B PHANTOM ; Reserved pvector addr offset (0x15)
002b 003b'
40 002c 7980 B PHANTOM ; Reserved pvector addr offset (0x16)
002d 003b'
41 002e 7980 B PHANTOM ; Reserved pvector addr offset (0x17)
002f 003b'
42 0030 7980 B PHANTOM ; Reserved pvector addr offset (0x18)
0031 003b'
43 0032 7980 B PHANTOM ; Reserved pvector addr offset (0x19)
0033 003b'
44 0034 7980 B PHANTOM ; Reserved pvector addr offset (0x1a)
0035 003b'
45 0036 7980 B PHANTOM ; Reserved pvector addr offset (0x1b)
0037 003b'
46 0038 7980 B PHANTOM ; Reserved pvector addr offset (0x1c)
0039 003b'
47 003a 7980 B PHANTOM ; Reserved pvector addr offset (0x1d)
003b 003b'
48 003c 7980 B PHANTOM ; Reserved pvector addr offset (0x1e)
003d 003b'
49 003e 7980 B PHANTOM ; pvector addr offset 0x1f - XINT3
003f 003b'
50 0040 7980 B PHANTOM ; pvector addr offset 0x20 - PDP interrupt
0041 003b'
51 0042 7980 B PHANTOM ; pvector addr offset 0x21 - Full Compare 1 interrupt
0043 003b'
52 0044 7980 B PHANTOM ; pvector addr offset 0x22 - 2 interrupt
0045 003b'
53 0046 7980 B PHANTOM ; pvector addr offset 0x23 - 3 interrupt
0047 003b'
54 0048 7980 B PHANTOM ; pvector addr offset 0x24 - Simple Compare 1 interrupt
0049 003b'
55 004a 7980 B PHANTOM ; pvector addr offset 0x25 - 2 interrupt
004b 003b'
56 004c 7980 B PHANTOM ; pvector addr offset 0x26 - 3 interrupt
004d 003b'
57 004e 7980 B PHANTOM ; pvector addr offset 0x27 - T1 Period interrupt
004f 003b'
58 0050 7980 B PHANTOM ; pvector addr offset 0x28 - Compare interrupt
0051 003b'
59 0052 7980 B PHANTOM ; pvector addr offset 0x29 - Underflow interrupt
0053 003b'
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Sat Jul 14 16:18:01 2001
Copyright (c) 1987-1999 Texas Instruments Incorporated
main.asm PAGE 3
60 0054 7980 B PHANTOM ; pvector addr offset 0x2a - Overflow interrupt
0055 003b'
61 0056 7980 B PHANTOM ; pvector addr offset 0x2b - T2 Period interrupt
0057 003b'
62 0058 7980 B PHANTOM ; pvector addr offset 0x2c - Compare interrupt
0059 003b'
63 005a 7980 B PHANTOM ; pvector addr offset 0x2d - Underflow interrupt
005b 003b'
64 005c 7980 B PHANTOM ; pvector addr offset 0x2e - Overflow interrupt
005d 003b'
65 005e 7980 B PHANTOM ; pvector addr offset 0x2f - T3 Period interrupt
005f 003b'
66 0060 7980 B PHANTOM ; pvector addr offset 0x30 - Compare interrupt
0061 003b'
67 0062 7980 B PHANTOM ; pvector addr offset 0x31 - Underflow interrupt
0063 003b'
68 0064 7980 B PHANTOM ; pvector addr offset 0x32 - Overflow interrupt
0065 003b'
69 0066 7980 B PHANTOM ; pvector addr offset 0x33 - Capture 1 interrupt
0067 003b'
70 0068 7980 B PHANTOM ; pvector addr offset 0x34 - Capture 2 interrupt
0069 003b'
71 006a 7980 B PHANTOM ; pvector addr offset 0x35 - Capture 3 interrupt
006b 003b'
72 006c 7980 B PHANTOM ; pvector addr offset 0x36 - Capture 4 interrupt
006d 003b'
73 ;-----------------------------------------
74
75 0000 .text
76 0000 _c_int0:
77 0000 be41 SETC INTM
78 0001 be46 CLRC SXM
79 0002 be42 CLRC OVM
80 0003 be44 CLRC CNF
81
82 0004 bce0 LDP #00E0H
83 0005 ae18 SPLK #81FEH,SCSR1 ;CLKIN=6M,CLKOUT=24M
0006 81fe
84 ;SPLK #87FEH,SCSR1 ;CLKIN=20M,CLKOUT=20M
85 0007 ae29 SPLK #0E8H,WDCR ;WD disable
0008 00e8
86
87 0009 bc00 LDP #0
88 000a 1006 LACC IFR
89 000b 9006 SACL IFR
90 000c ae04 SPLK #0001H,IMR
000d 0001
91 000e be40 CLRC INTM
92
93 000f 7a80 CALL ADINIT ;Init. AD
0010 0000!
94 0011 7a80 CALL AD ;Start AD
0012 0000!
95
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Sat Jul 14 16:18:01 2001
Copyright (c) 1987-1999 Texas Instruments Incorporated
main.asm PAGE 4
96 0013 8b89 MAR *,AR1
97 0014 bf09 LAR AR1,#flag
0015 0000-
98 0016 4e80 MAIN0: BIT *,14
99 0017 e200 BCND MAIN0,NTC
0018 0016'
100 0019 8b89 mar *,ar1
101 001a bf09 LAR AR1,#ADCHANN
001b 0000!
102 001c ae80 SPLK #0,*
001d 0000
103 001e 7a80 CALL FFT32
001f 0000!
104
105 0020 8b00 MAIN: NOP
106
107 0021 7980 B MAIN
0022 0020'
108
109 0023 INT1_ISR:
110 0023 8e04- SST #0, ST0_CON1 ; Auto page-0 DP addressing is used to
111 0024 8f05- SST #1, ST1_CON1 ; save status registers to B2 DARAM.
112 0025 bc07 LDP #DP_B12 ;380H/80H
113 0026 9000- SACL ACCL_CON1 ; save lower 16-bits of ACC
114 0027 9801- SACH ACCH_CON1
115 0028 8002- SAR AR0,AR0_CON1
116 0029 8103- SAR AR1,AR1_CON1
117 002a 8204- SAR AR2,AR2_CON1
118
119 002b bce0 LDP #00E0H
120 002c 111e LACC PVIR,1
121 002d bf90 ADD #PVECTORS
002e 0000+
122 002f be20 BACC
123
124 0030 INT1RET:
125 0030 bc07 LDP #DP_B12
126 0031 0002- LAR AR0,AR0_CON1
127 0032 0103- LAR AR1,AR1_CON1
128 0033 0204- LAR AR2,AR2_CON1
129 0034 6a01- LACC ACCH_CON1,16
130 0035 6200- ADDS ACCL_CON1
131 0036 bc00 LDP #0
132 0037 0f05- LST #1, ST1_CON1
133 0038 0e04- LST #0, ST0_CON1
134 0039 be40 CLRC INTM
135 003a ef00 RET
136
137
138 003b 7980 PHANTOM B PHANTOM
003c 003b'
139
140 END
No Errors, No Warnings
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