ppc_mmu.c

来自「skyeye是一个可以模拟嵌入式硬件开发板的系统软件」· C语言 代码 · 共 2,269 行 · 第 1/5 页

                                                *result = gCPU.ddr_ctrl.err_disable;
                                                return r;
                                        default:
                                                fprintf(stderr,"in %s, error when read CCSR.addr=0x%x,pc=0x%x\n",__FUNCTION__, addr, gCPU.pc);
                                                skyeye_exit(-1);
                                }
                        }
			if(offset >= 0x91A00 && offset <= 0x91A1F){
				switch(offset){
					case 0x91A00:
						*result = gCPU.cpm_reg.scc[0].gsmrl;
						return r;
					default:
                                                fprintf(stderr,"in %s, error when read CCSR.addr=0x%x,pc=0x%x\n",__FUNCTION__, addr, gCPU.pc);
                                                skyeye_exit(-1);

				}
			}
			/* CPM MUX I/O */
                        if(offset >= 0x91B00 && offset <= 0x91B1F){
                                switch(offset){
                                        case 0x91B08:
                                                *result = gCPU.cpm_reg.mux.cmxscr;
                                                return r;
                                        default:
                                                fprintf(stderr,"in %s, error when read CCSR.addr=0x%x, \
                                pc=0x%x\n",__FUNCTION__, addr, gCPU.pc);

                                                skyeye_exit(-1);

                                }

                        }
			/* PCI Global register */
			if(offset >= 0x40000 && offset <= 0x4FFF0){
				 switch(offset){
                                        case 0x41020:
                                                /* source attribute register for DMA0 */
                                                *result = gCPU.pci_global.gcr;
                                                return r;
                                        default:
                                                fprintf(stderr,"in %s, error when read global.addr=0x%x, \
                                pc=0x%x\n",__FUNCTION__, addr, gCPU.pc);
                                                return r;
                                                //skyeye_exit(-1);

                                }
                        }

			/* DMA */
                        if(offset >= 0x21100 && offset <= 0x21300){
                                switch(offset){
                                        case 0x21110:
                                                /* source attribute register for DMA0 */
                                                *result = gCPU.dma.satr0;
                                                return r;
                                        case 0x21118:
                                                *result = gCPU.dma.satr0;
                                                return r;
                                        default:
                                                fprintf(stderr,"in %s, error when read dma.addr=0x%x, \
                                pc=0x%x\n",__FUNCTION__, addr, gCPU.pc);
                                                return r;
                                                //skyeye_exit(-1);

                                }
                        }
			/* Input/Output port */
			if(offset >= 0x90D00 && offset <= 0x90D70){
                                switch(offset){
					case 0x90D00:
						*result = gCPU.cpm_reg.ioport.pdira;
						return r;
                                        case 0x90D04:
                                                *result = gCPU.cpm_reg.ioport.ppara;
                                                return r;
					case 0x90D08:
                                                *result = gCPU.cpm_reg.ioport.psora;
                                                return r;
					case 0x90D0C:
                                                *result = gCPU.cpm_reg.ioport.podra ;
                                                return r;
                                        case 0x90D10:
                                                *result = gCPU.cpm_reg.ioport.pdata;
                                                return r;

                                        default:
                                                //fprintf(stderr,"in %s, error when read IO port.addr=0x%x, \
                                pc=0x%x\n",__FUNCTION__, addr, gCPU.pc);
						return r;
                                                //skyeye_exit(-1);

                                }

                        }

			if(offset >= 0x80000 && offset < 0x8C000){
                                *result = ppc_word_from_BE(*((sint32 *)&gCPU.cpm_reg.dpram[offset - 0x80000]));
				//printf("DBG_CPM:in %s,offset=0x%x,data=0x%x,pc=0x%x\n",__FUNCTION__, offset, *result,gCPU.pc);
                                return r;
                        }

			if(offset >= 0xE0000 && offset <= 0xE0020){
				switch(offset){
                                	case 0xE0000:
                                                *result = gCPU.por_conf.porpllsr;
                                                return r;
					case 0xE000C:
						*result = gCPU.por_conf.pordevsr;
						return r;

                                        default:
                                                fprintf(stderr,"in %s, error when read CCSR.addr=0x%x,pc=0x%x\n",__FUNCTION__, addr, gCPU.pc);
                                                skyeye_exit(-1);
                                }

			}
                        switch(offset){
                                case 0x0:
                                        *result = gCPU.ccsr.ccsr;
                                        break;
				case 0xC28:
					*result = gCPU.law.lawbar[1];
					break;
				case 0xC30:
					*result = gCPU.law.lawar[1];
				case 0x90C80:
					*result = gCPU.sccr;
					break;
				case 0xe0e10:
					*result = gCPU.debug_ctrl.ddrdllcr;
					return r;	
				case 0x50D4:
					*result = gCPU.lb_ctrl.lcrr;
					return r;
				case 0x20000:
					*result = gCPU.l2_reg.l2ctl;
					return r;
				case 0x8004:
                                        *result = gCPU.pci_cfg.cfg_data;
                                        return r;
				default:
                                        fprintf(stderr,"in %s, error when read CCSR.addr=0x%x,pc=0x%x\n",__FUNCTION__,addr,gCPU.pc);
                                        skyeye_exit(-1);
                        }
		}
		else if((p >= boot_rom_start_addr) && (p < (boot_rom_start_addr - 1 + boot_romSize )))
			*result = ppc_word_from_BE(*((int *)&boot_rom[p - boot_rom_start_addr]));
		else if((p >= init_ram_start_addr) && (p < (init_ram_start_addr + init_ram_size)))
                        *result = ppc_word_from_BE(*((int *)&init_ram[p - init_ram_start_addr]));
		else if((p >= 0x0) && (p < (0x0 + DDR_RAM_SIZE))){
                        *result = ppc_word_from_BE(*((int *)&ddr_ram[p]));
		}
		else{
			fprintf(stderr,"in %s, can not find address 0x%x,pc=0x%x\n", __FUNCTION__, p, gCPU.pc);
			skyeye_exit(-1);
		}	
	}
	return r;
}

int FASTCALL ppc_read_effective_half(uint32 addr, uint16 *result)
{
	uint32 p;
	int r;
	if (!(r = ppc_effective_to_physical(addr, PPC_MMU_READ, &p))) {
		//printf("\nDBG:in %s,addr=0x%x,p=0x%x\n", __FUNCTION__, addr,p);
		//printf("DBG:ccsr=0x%x,CCSR_BASE=0x%x\n",gCPU.ccsr.ccsr,GET_CCSR_BASE(gCPU.ccsr.ccsr));
		if((p >= GET_CCSR_BASE(gCPU.ccsr.ccsr)) && (p < (GET_CCSR_BASE(gCPU.ccsr.ccsr) + CCSR_MEM_SIZE))){
			int offset = p - GET_CCSR_BASE(gCPU.ccsr.ccsr);
			//printf("DBG:read CCSR,offset=0x%x,pc=0x%x\n", offset, gCPU.pc);
			if(offset >= 0x919C0 && offset <= 0x919E0){
                                switch(offset){
                                        case 0x919C0:
                                                *result = gCPU.cpm_reg.cpcr;
                                                return r;
                                        default:
	                                        fprintf(stderr,"in %s, error when read CCSR.addr=0x%x,pc=0x%x\n",__FUNCTION__, addr, gCPU.pc);
                                        	skyeye_exit(-1);
                                }
                        }
			if((offset >= 0x80000) && (offset < 0x8C000)){
				*result = ppc_half_from_BE(*((sint16 *)&gCPU.cpm_reg.dpram[offset - 0x80000]));
				//printf("DBG_CPM:in %s,offset=0x%x,data=0x%x,pc=0x%x\n",__FUNCTION__, offset, *result,gCPU.pc);
				return r;
			}
	
			if(offset >= 0xE0000 && offset <= 0xE0020){
				switch(offset){
                                	case 0xE0000:
                                                *result = gCPU.por_conf.porpllsr;
                                                return r;
                                        default:
                                                fprintf(stderr,"in %s, error when read CCSR.addr=0x%x,pc=0x%x\n",__FUNCTION__, addr, gCPU.pc);
                                                skyeye_exit(-1);
                                }

			}
                        switch(offset){
                                case 0x0:
                                        *result = gCPU.ccsr.ccsr;
                                        break;
				case 0x90C80:
					*result = gCPU.sccr;
					break;
				case 0x8004:
					*result = gCPU.pci_cfg.cfg_data;
					break;	
				case 0x8006:
                                        *result = gCPU.pci_cfg.cfg_data;
                                        return r;
                                default:
                                        fprintf(stderr,"in %s, error when read CCSR.addr=0x%x,pc=0x%x\n",__FUNCTION__,addr,gCPU.pc);
                                        skyeye_exit(-1);
                        }
		}
		else if((p >= boot_rom_start_addr) && (p < (boot_rom_start_addr - 1 + boot_romSize )))
			*result = ppc_half_from_BE(*((sint16 *)&boot_rom[p - boot_rom_start_addr]));
			
		else if((p >= init_ram_start_addr) && (p < (init_ram_start_addr + init_ram_size)))
                        *result = ppc_half_from_BE(*((sint16 *)&init_ram[p - init_ram_start_addr]));
		else if((p >= 0x0) && (p < (0x0 + DDR_RAM_SIZE)))
{
                        *result = ppc_half_from_BE(*((sint16 *)&ddr_ram[p]));
                }
		else{
			fprintf(stderr,"in %s, can not find address 0x%x,pc=0x%x\n", __FUNCTION__, p, gCPU.pc);
			skyeye_exit(-1);
		}	
	}
	return r;
}

int FASTCALL ppc_read_effective_byte(uint32 addr, uint8 *result)
{ 
	uint32 p;
	int r;
	if (!(r = ppc_effective_to_physical(addr, PPC_MMU_READ, &p))) {
		//printf("\nDBG:in %s,addr=0x%x,p=0x%x\n", __FUNCTION__, addr,p);
		//printf("DBG:ccsr=0x%x,CCSR_BASE=0x%x\n",gCPU.ccsr.ccsr,GET_CCSR_BASE(gCPU.ccsr.ccsr));
		if((p >= GET_CCSR_BASE(gCPU.ccsr.ccsr)) && (p < (GET_CCSR_BASE(gCPU.ccsr.ccsr) + CCSR_MEM_SIZE))){
			int offset = p - GET_CCSR_BASE(gCPU.ccsr.ccsr);
			//printf("DBG:read CCSR,offset=0x%x,pc=0x%x\n", offset, gCPU.pc);
			if(offset >= 0x919C0 && offset <= 0x919E0){
                                switch(offset){
                                        case 0x919C0:
                                                *result = gCPU.cpm_reg.cpcr;
                                                return r;
                                        default:
	                                        fprintf(stderr,"in %s, error when read CCSR.addr=0x%x,pc=0x%x\n",__FUNCTION__, addr, gCPU.pc);
                                        	skyeye_exit(-1);
                                }
                        }
			if(offset >= 0x80000 && offset < 0x8C000){
				*result = *((sint16 *)&gCPU.cpm_reg.dpram[offset - 0x80000]);
				//printf("DBG_CPM:in %s,offset=0x%x,data=0x%x,pc=0x%x\n",__FUNCTION__, offset, *result,gCPU.pc);
				return r;
			}
	
			if(offset >= 0xE0000 && offset <= 0xE0020){
				switch(offset){
                                	case 0xE0000:
                                                *result = gCPU.por_conf.porpllsr;
                                                return r;
                                        default:
                                                fprintf(stderr,"in %s, error when read CCSR.addr=0x%x,pc=0x%x\n",__FUNCTION__, addr, gCPU.pc);
                                                skyeye_exit(-1);
                                }

			}
                        switch(offset){
                                case 0x0:
                                        *result = gCPU.ccsr.ccsr;
                                        break;
				case 0x90C80:
					*result = gCPU.sccr;
					break;
				case 0x300C:
					*result = gCPU.i2c_reg.i2csr;
					fprintf(prof_file,"KSDBG:read i2csr result=0x%x\n", *result);
					return r;
				case 0x8006:
					*result = gCPU.pci_cfg.cfg_data;
					return r;
                                default:
                                        fprintf(stderr,"in %s, error when read CCSR.addr=0x%x,pc=0x%x\n",__FUNCTION__,addr,gCPU.pc);
                                        skyeye_exit(-1);
                        }
		}
		else if((p >= boot_rom_start_addr) && (p < (boot_rom_start_addr - 1 + boot_romSize )))
			*result = *((byte *)&boot_rom[p - boot_rom_start_addr]);
		else if((p >= init_ram_start_addr) && (p < (init_ram_start_addr + init_ram_size)))
                        *result = *((byte *)&init_ram[p - init_ram_start_addr]);
		  else if((p >= 0x0) && (p < (0x0 + DDR_RAM_SIZE))){
                        *result = *((byte *)&ddr_ram[p]);
                }
		else{
			fprintf(stderr,"in %s, can not find address 0x%x,pc=0x%x\n", __FUNCTION__, p, gCPU.pc);
			skyeye_exit(-1);
		}	
	}
	return r;
}

inline int FASTCALL ppc_write_physical_qword(uint32 addr, Vector_t *data)
{
	if (addr < boot_romSize) {
		// big endian
		*((uint64*)(boot_rom+addr)) = ppc_dword_to_BE(VECT_D(*data,0));
		*((uint64*)(boot_rom+addr+8)) = ppc_dword_to_BE(VECT_D(*data,1));
		return PPC_MMU_OK;
	}
	if (io_mem_write128(addr, (uint128 *)data) == IO_MEM_ACCESS_OK) {
		return PPC_MMU_OK;
	} else {
		return PPC_MMU_FATAL;
	}
}

inline int FASTCALL ppc_write_physical_dword(uint32 addr, uint64 data)
{
	if (addr < boot_romSize) {
		// big endian
		*((uint64*)(boot_rom+addr)) = ppc_dword_to_BE(data);
		return PPC_MMU_OK;
	}
	if (io_mem_write64(addr, ppc_bswap_dword(data)) == IO_MEM_ACCESS_OK) {
		return PPC_MMU_OK;
	} else {
		return PPC_MMU_FATAL;
	}
}

inline int FASTCALL ppc_write_physical_word(uint32 addr, uint32 data)
{
	if (addr < boot_romSize) {
		// big endian
		*((uint32*)(boot_rom+addr)) = ppc_word_to_BE(data);
		return PPC_MMU_OK;
	}
	return io_mem_write(addr, ppc_bswap_word(data), 4);
}

inline int FASTCALL ppc_write_physical_half(uint32 addr, uint16 data)
{
	if (addr < boot_romSize) {
		// big endian
		*((uint16*)(boot_rom+addr)) = ppc_half_to_BE(data);
		return PPC_MMU_OK;
	}
	return io_mem_write(addr, ppc_bswap_half(data), 2);
}

inline int FASTCALL ppc_write_physical_byte(uint32 addr, uint8 data)
{
	if (addr < boot_romSize) {
		// big endian
		boot_rom[addr] = data;
		return PPC_MMU_OK;
	}
	return io_mem_write(addr, data, 1);
}

inline int FASTCALL ppc_write_effective_qword(uint32 addr, Vector_t data)
{
	uint32 p;
	int r;

	addr &= ~0x0f;

	if (!((r=ppc_effective_to_physical(addr, PPC_MMU_WRITE, &p)))) {
		return ppc_write_physical_qword(p, &data);
	}
	return r;
}

inline int FASTCALL ppc_write_effective_dword(uint32 addr, uint64 data)
{
	uint32 p;
	int r;
	if (!((r=ppc_effective_to_physical(addr, PPC_MMU_WRITE, &p)))) {
		if (EA_Offset(addr) > 4088) {
			// write overlaps two pages.. tricky
			byte *r1, *r2;
			byte b[14];
			ppc_effective_to_physical((addr & ~0xfff)+4089, PPC_MMU_WRITE, &p);
			if ((r = ppc_direct_physical_memory_handle(p, r1))) return r;
			if ((r = ppc_effective_to_physical((addr & ~0xfff)+4096, PPC_MMU_WRITE, &p))) return r;
			if ((r = ppc_direct_physical_memory_handle(p, r2))) return r;
			data = ppc_dword_to_BE(data);
			memmove(&b[0], r1, 7);
			memmove(&b[7], r2, 7);
			memmove(&b[EA_Offset(addr)-4089], &data, 8);
			memmove(r1, &b[0], 7);
			memmove(r2, &b[7], 7);
			return PPC_MMU_OK;
		} else {
			return ppc_write_physical_dword(p, data);
		}
	}
	return r;
}
int FASTCALL ppc_write_effective_word(uint32 addr, uint32 data)
{
	uint32 p;
	int r;
	if (!((r=ppc_effective_to_physical(addr, PPC_MMU_WRITE, &p)))) {
		//printf("DBG:in %s,addr=0x%x,p=0x%x, data=0x%x\n", __FUNCTION__, addr,p, data);
		//printf("DBG:ccsr=0x%x,CCSR_BASE=0x%x",gCPU.ccsr.ccsr,GET_CCSR_BASE(gCPU.ccsr.ccsr));
		if(p >= GET_CCSR_BASE(gCPU.ccsr.ccsr) && p <(GET_CCSR_BASE(gCPU.ccsr.ccsr) + CCSR_MEM_SIZE)){
			int offset = p - GET_CCSR_BASE(gCPU.ccsr.ccsr);
			//printf("DBG:write to CCSR,value=0x%x,offset=0x%x,pc=0x%x\n", data, offset,gCPU.pc);
			if(offset >= 0xC08 && offset <= 0xCF0){
				if(offset & 0x8){
					gCPU.law.lawbar[(offset - 0xC08)/0x20] = data;
				}else{
					gCPU.law.lawar[(offset - 0xC10)/0x20] = data;
				}
				return r;
			}
			if(offset >= 0x5000 && offset <= 0x50D4){
				if(offset >= 0x5000 && offset <= 0x5038){
					gCPU.lb_ctrl.br[(offset - 0x5000)/0x8] = data;
					return r;
				}
#if 0
				switch(offset){
                                        case 0x50D0:
                                                gCPU.lb_ctrl.lbcr = data;
                                                return r;
                                        default:
                                                fprintf(stderr,"in %s, error when read CCSR.addr=0x%x, \
                                pc=0x%x\n",__FUNCTION__, addr, gCPU.pc);

                                                skyeye_exit(-1);

                                }
#endif
				
                               fprintf(stderr,"in %s, error when write lb_ctrl.addr=0x%x, \
                                pc=0x%x\n",__FUNCTION__, addr, gCPU.pc);

				return r;
			}
			if(offset >= 0x2000 && offset <= 0x2E58){
                                switch(offset){
                                        case 0x2E44:
                                                gCPU.ddr_ctrl.err_disable = data;
                                                return r;
                                        default:
                                                fprintf(stderr,"in %s, error when write ddr_ctrl,addr=0x%x,pc=0x%x\n",__FUNCTION__, addr, gCPU.pc);
                                                skyeye_exit(-1);
                                }
                        }