_pace.ucf

FPGA 基于PICOBLAZE内核的LCD显示程序,完整,XILINX

#PACE: Start of Constraints generated by PACE

#PACE: Start of PACE I/O Pin Assignments
NET "clk"  LOC = "T9"  ;
NET "lcd_d<4>"  LOC = "B16"  ;
NET "lcd_d<5>"  LOC = "R3"  ;
NET "lcd_d<6>"  LOC = "C16"  ;
NET "lcd_d<7>"  LOC = "D16"  ;
NET "lcd_e"  LOC = "C11"  ;
NET "lcd_rs"  LOC = "E16"  ;
NET "lcd_rw"  LOC = "E10"  ;

#PACE: Start of PACE Area Constraints

#PACE: Start of PACE Prohibit Constraints

#PACE: End of Constraints generated by PACE