scirx_test.c

本程序通过F2812实现SPWM,开发平台CCS

//###########################################################################
//
// FILE:  scirx_test.C
// 
//
//###########################################################################
//
//  Ver | dd mmm yyyy | Who  | Description of changes
// =====|=============|======|===============================================
//  1.2 |22  DEC 2006 | w.h  | 
//      |             |      | 
//      |             |      | 
//###########################################################################

#include "DSP281x_Device.h"     // DSP281x Headerfile Include File
#include "DSP281x_Examples.h"   // DSP281x Examples Include File
//发送数据包括：f_s=1～400(0x0001~0x0190需要两个字节)调制度N=0～99(放大100倍0x00～0x63需要1个字节)
//variable declarations
//unsigned int i=0;
volatile unsigned char ReceivedData[3]={0x00,0x00,0x00};//一次接收三个数据,以发送16进制发送，但是认为是10进制数。
//unsigned char TempBuf1=0;//暂存
//volatile unsigned char data_reg[9];
/*
#define CPU_FREQ 	150E6
#define SCI_FREQ 	9600
#define SCI_PRD 	CPU_FREQ/(SCI_FREQ*32)-1
*/
//subprogram define
void scia_fifo_init(void);
//void scib_send(unsigned int a);
//void Xint1_init(void);
 interrupt void sciaRxFifoIsr(void);
//interrupt void Xint1_ISR(void);

//volatile unsigned int PrwCode;
//volatile unsigned char DATA_L;
//volatile unsigned char DATA_H;
//volatile char Done[2];
//store received data RAM ZONE

//#pragma DATA_SECTION(SciBuf,"SCIBUFFILE");
  // Uint16   SciBuf;
   //Uint16   *SciBufAddr1;
   //Uint16   isc1;

void main(void)
{
   unsigned long j;
   
   //SciBufAddr1=&SciBuf;
   //isc1=0;

   InitSysCtrl();
// Delay for PLL to stabilize
   for(j=0;j<2000;j++)
   { asm("   NOP");}
   //attention: change memory cmd
   //MemCopy(&RamfuncsLoadStart, &RamfuncsLoadEnd, &RamfuncsRunStart);
   //InitFlash();   
   //InitGpio(); 
   
   EALLOW;
   //GpioMuxRegs.GPBMUX.bit.C4TRIP_GPIOB13=0;
   //GpioMuxRegs.GPBMUX.bit.C5TRIP_GPIOB14=0;
   //GpioMuxRegs.GPAMUX.bit.C1TRIP_GPIOA13=0;
  // GpioMuxRegs.GPFMUX.bit.SCITXDA_GPIOG4 = 1;
   //GpioMuxRegs.GPFMUX.bit.SCIRXDA_GPIOG5 = 1; 
   GpioMuxRegs.GPFMUX.bit.SCITXDA_GPIOF4 = 1;
   GpioMuxRegs.GPFMUX.bit.SCIRXDA_GPIOF5 = 1;
   //GpioMuxRegs.GPEMUX.bit.XINT1_XBIO_GPIOE0=1;	//xint1										         
   EDIS;
   
   DINT;
   
// Initialize PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.  
// This function is found in the DSP281x_PieCtrl.c file.
   InitPieCtrl();

// Disable CPU interrupts and clear all CPU interrupt flags:
   IER = 0x0000;
   IFR = 0x0000;

// Initialize the PIE vector table with pointers to the shell Interrupt 
// Service Routines (ISR).  
// This will populate the entire table, even if the interrupt
// is not used in this example.  This is useful for debug purposes.
// The shell ISR routines are found in DSP281x_DefaultIsr.c.
// This function is found in DSP281x_PieVect.c.
   InitPieVectTable();
   
   EALLOW;
   PieVectTable.RXAINT = &sciaRxFifoIsr;
   
   //PieVectTable.XINT1=&Xint1_ISR;
   EDIS;
       
   //InitPeripherals(); 
    scia_fifo_init();  // Init SCI-A
    //Xint1_init();

// Step 5. User specific code, enable interrupts.
   PieCtrlRegs.PIECRTL.bit.ENPIE = 1;   // Enable the PIE block
// Enable CPU INT1 which is connected to CPU-Timer 0:
 //  IER |= 0x0001;  // enable PIEIER1, and INT1
// Enable CPU INT9 which is connected to Scia
   IER |= 0x0100;  // enable PIEIER9, and INT9
// disable TINT0 in the PIE: Group 1 interrupt 7
//   PieCtrlRegs.PIEIER1.bit.INTx7 = 0; 
// Enable all SCIA RXINT interrupt
   PieCtrlRegs.PIEIER9.bit.INTx1 = 1;
// Enable all SCIA TXINT interrupt
  // PieCtrlRegs.PIEIER9.bit.INTx2 = 1;
// Enable all XINT1 interrupt
   //PieCtrlRegs.PIEIER1.bit.INTx4 = 0; 
   EINT;
   EnableInterrupts();

  for(j=0;j<20000;j++)
   { asm("   NOP");}
   
   //memset(SciBuf,0,sizeof(SciBuf));
   
/*#################Begin transmitting && receiving#######################*/

while(1)
   {

   } 
  
}

/*subprogame*/
void scia_fifo_init(void)										
{
   SciaRegs.SCICCR.all =0x0007;   // 1 stop bit,  No loopback 
                                  // parity:EVEN, 8 char bits,
                                  // async mode, idle-line protocol
   SciaRegs.SCICTL1.all =0x0003;  // enable TX, RX, internal SCICLK, 
                                  // Disable RX ERR, SLEEP, TXWAKE
   SciaRegs.SCICTL2.bit.TXINTENA =1; //enable TX interrupt
   SciaRegs.SCICTL2.bit.RXBKINTENA =1;  //enable RX interrupt
   SciaRegs.SCIHBAUD = 0x0001;//0x000f;//0x0007;//0x0000;//0x0001;//1200/2400/4800/9600/
   SciaRegs.SCILBAUD = 0x00E7;//0x0041;//0x00a0;//0x0079;//0x00E7;
   SciaRegs.SCICCR.bit.LOOPBKENA =0; // Disable loop back  
   SciaRegs.SCIFFTX.all=0xC027;//0xE040; 1100 0000 0010 0111
   SciaRegs.SCIFFRX.all=0x2023;//0x204F;
   SciaRegs.SCIFFCT.all=0x00;

   SciaRegs.SCICTL1.all =0x0023;     // Relinquish SCI from Reset 
   SciaRegs.SCIFFTX.bit.TXFIFOXRESET=1;  //Relinquish TXFIFO from Reset
   SciaRegs.SCIFFRX.bit.RXFIFORESET=1;	 //Relinquish RXFIFO from Reset
     									     									    									    									
} 


//SCI-A receive interrupt
interrupt void sciaRxFifoIsr(void)
{   
    unsigned char i;
    //for(i=0;i<9;i++)
    //{ReceivedData[i]=0;} 
    unsigned long j;
    //DINT;
/*  
    while(ScibRegs.SCIFFRX.bit.RXFIFST<9)//judge received data num in FIFO
    {
     ;
    }
  
*/
/*
    TempBuf1=ScibRegs.SCIRXBUF.all;    
    if(TempBuf1==0x55) 
    {
	  ReceivedData[0]=TempBuf1;
	  for(i=1;i<9;i++)
	  {
	    ReceivedData[i]=ScibRegs.SCIRXBUF.all;	 // Read data
	    for(j=0;j<2000;j++)
        {asm("	NOP");}
	  }
	}
*/
	
	  for(i=0;i<3;i++)
	  {
	    ReceivedData[i]=SciaRegs.SCIRXBUF.all;	 // Read data
	  /*	if(isc1<1024)
        {
         isc1++;
         *SciBufAddr1=ReceivedData[i]; 
         SciBufAddr1++;       
        } 
        else
        {
         isc1=0;
         SciBufAddr1=&SciBuf;
        }*/
        for(j=0;j<2000;j++)
        {asm("	NOP");}
	  }

/*
   for(i=0;i<8;i++)
   {
    data_reg[i]=data_reg[i+1];
   }
   data_reg[8]=ScibRegs.SCIRXBUF.all;
   if((data_reg[0])==0x02)
     {
      ReceivedData[0]=data_reg[0];
      for(i=1;i<9;i++)
      {
       ReceivedData[i]=data_reg[i];
      }
     }
*/  	
    EINT;
    EnableInterrupts();                      
    SciaRegs.SCIFFRX.bit.RXFFOVRCLR=1;   // Clear Overflow flag
    SciaRegs.SCIFFRX.bit.RXFFINTCLR=1;   // Clear Interrupt flag
    PieCtrlRegs.PIEACK.all|= PIEACK_GROUP9;       // Issue PIE ack
}


//===========================================================================
// No more.
//===========================================================================