📄 ram.dld
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/* @(#) pSOSystem PowerPC/V2.5.0: bsps/ads8xx/ram_di.lnk 4.2 98/07/30 10:34:43 */
/***********************************************************************/
/* */
/* MODULE: bsps/ad8xx/ram_di.lnk */
/* DATE: 98/07/30 */
/* PURPOSE: Linker command file for Generating ram.xxx with DIAB */
/* Tools */
/* */
/*---------------------------------------------------------------------*/
/* */
/* Copyright 1991 - 1998, Integrated Systems, Inc. */
/* ALL RIGHTS RESERVED */
/* */
/* Permission is hereby granted to licensees of Integrated Systems, */
/* Inc. products to use or abstract this computer program for the */
/* sole purpose of implementing a product based on Integrated */
/* Systems, Inc. products. No other rights to reproduce, use, */
/* or disseminate this computer program, whether in part or in */
/* whole, are granted. */
/* */
/* Integrated Systems, Inc. makes no representation or warranties */
/* with respect to the performance of this computer program, and */
/* specifically disclaims any responsibility for any damages, */
/* special or consequential, connected with the use of this program. */
/* */
/*---------------------------------------------------------------------*/
/* */
/* */
/* */
/***********************************************************************/
MEMORY {
mem1: o=0x00100000 l=0x1F00000
mem2: o=0x001000 l=0x1000
mem3: o=0x002000 l=0x1000
}
SECTIONS
{
.DAE_exp: {
*(.DAE_exp)
} > mem2
.IAE_exp: {
*(.IAE_exp)
} > mem3
GROUP : {
.text : {}
.init : {}
.fini : {}
.eini : {}
.rodata : {}
.sdata2 : {}
.rosdata : {}
} > mem1
GROUP BIND(ADDR(.rosdata)+SIZEOF(.rosdata)) : {
.data : {}
.sdata : {}
.begbss : {}
.sbss : {}
.bss : {}
.freemem : {}
} > mem1
}
FreeMemStart = ADDR(.bss)+SIZEOF(.bss);
/* @(#) pSOSystem PowerPC/V2.5.0: bsps/template/ppc/anchor.lnk 4.1 98/06/24 15:46:23 */
/***********************************************************************/
/* */
/* MODULE: bsps/template/anchor.lnk */
/* DATE: 98/06/24 */
/* PURPOSE: Linker command file which defines anchor, rom_anchor and */
/* cp_anchor variables. */
/* */
/*---------------------------------------------------------------------*/
/* */
/* Copyright 1991 - 1998, Integrated Systems, Inc. */
/* ALL RIGHTS RESERVED */
/* */
/* Permission is hereby granted to licensees of Integrated Systems, */
/* Inc. products to use or abstract this computer program for the */
/* sole purpose of implementing a product based on Integrated */
/* Systems, Inc. products. No other rights to reproduce, use, */
/* or disseminate this computer program, whether in part or in */
/* whole, are granted. */
/* */
/* Integrated Systems, Inc. makes no representation or warranties */
/* with respect to the performance of this computer program, and */
/* specifically disclaims any responsibility for any damages, */
/* special or consequential, connected with the use of this program. */
/* */
/*---------------------------------------------------------------------*/
/* */
/* All the following definitions are assuming RAM is at '0' and that */
/* location of RAM is free of Vector initialization. */
/* */
/* If you think your Board Support Package uses these locations then */
/* change all of them to different addresses where you will not over- */
/* write. */
/* */
/***********************************************************************/
cp_anchor = 0x40; /* Component Anchor for Component Calls */
anchor = 0x44; /* Node Anchor definition. Change it for */
rom_anchor = 0x48; /* Node Anchor of ROMed pSOSystem */
/***********************************************************************/
/* RTEC Library variables: */
/***********************************************************************/
__DATA_START = ADDR (.data);
__DATA_SIZE = SIZEOF(.data) + SIZEOF(.sdata) + SIZEOF(.bss) + SIZEOF(.sbss) + SIZEOF(.begbss);
/***********************************************************************/
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