lcdconf.h

ucgu最新版本 4.14

/*********************************************************************
*                SEGGER MICROCONTROLLER SYSTEME GmbH                 *
*        Solutions for real time microcontroller applications        *
**********************************************************************
*                                                                    *
*        (c) 1996 - 2007  SEGGER Microcontroller Systeme GmbH        *
*                                                                    *
*        Internet: www.segger.com    Support:  [e-mail]    *
*                                                                    *
**********************************************************************

** emWin V4.14 - Graphical user interface for embedded applications **
emWin is protected by international copyright laws.   Knowledge of the
source code may not be used to write a similar product.  This file may
only be used in accordance with a license and should not be re-
distributed in any way. We appreciate your understanding and fairness.
----------------------------------------------------------------------
File        : LCDConf.h
Purpose     : SEGGER internal standard configuration file
----------------------------------------------------------------------
*/

#ifndef LCDCONF_H
#define LCDCONF_H

/*********************************************************************
*
*            Selection of Hardware
*
**********************************************************************
*/
#if defined (__TID__)
  #if (((__TID__ >>8) &0x7f) == 85)          /* IAR V850 */
    #define TARGET_AXEL_BOARD
  #endif
#elif  defined (__ghs__) && defined (__V850)
  #define TARGET_AXEL_BOARD
#endif

#if defined __WATCOMC__
  #ifndef __386__
    #define TARGET_EMBEDDED_PC
  #endif
#endif

/*********************************************************************
*
*       Softune default
*
**********************************************************************
*/
#ifdef __COMPILER_FCC911__	
  #define LCD_XSIZE      (640)   /* X-resolution of LCD, Logical coor. */
  #define LCD_YSIZE      (480)   /* Y-resolution of LCD, Logical coor. */

  #define LCD_BITSPERPIXEL (8)

  #define LCD_CONTROLLER 8720

/*********************************************************************
*
*            AVR default configuration (Slin driver)
*
**********************************************************************
*/

#elif defined (__ICCAVR__)
  #define LCD_XSIZE       240   /* X-resolution of LCD, Logical coor. */
  #define LCD_YSIZE       128   /* Y-resolution of LCD, Logical coor. */
  #define LCD_BITSPERPIXEL  1
  #define LCD_CONTROLLER 6901
  #define LCD_CACHE         0
  #define LCD_INIT_CONTROLLER()
  #define LCD_READ_A0() LCD_X_Read_A0()
  #define LCD_READ_A1() LCD_X_Read_A1()
  #define LCD_WRITE_A0(Data)
  #define LCD_WRITE_A1(Data)
  #define LCD_WAIT()
  #define LCD_EXTENDED_WAIT 0

  unsigned char LCD_X_Read_A0(void);
  unsigned char LCD_X_Read_A1(void);

/*********************************************************************
*
*            X86 - Embedded PC default configuration
*
**********************************************************************
*/
#elif defined (TARGET_EMBEDDED_PC)
  #define LCD_XSIZE            640   /* X-resolution of LCD, Logical coor. */
  #define LCD_YSIZE            480   /* Y-resolution of LCD, Logical coor. */
  #define LCD_BITSPERPIXEL      16
  #define LCD_CONTROLLER      8600
  #define LCD_SWAP_BYTE_ORDER    0
  #define LCD_SWAP_RB            1
  #define LCD_SWAP_XY            0
  #define LCD_MIRROR_X           0
  #define LCD_INIT_CONTROLLER()

/*********************************************************************
*
*            ARM default configuration (COGENT EP7312)
*
**********************************************************************
*/
#elif defined (TARGET_EP7312)
  #define LCD_XSIZE      (320)   /* X-resolution of LCD, Logical coor. */
  #define LCD_YSIZE      (240)   /* Y-resolution of LCD, Logical coor. */
  #define LCD_BITSPERPIXEL (12)
  #define LCD_CONTROLLER  444
  #define LCD_FIXEDPALETTE 44412
  #define LCD_SWAP_BYTE_ORDER (1)
  #define LCD_READ_MEM(Off)            *((U16*)         (0xc0000000+(((U32)(Off))<<1)))
  #define LCD_WRITE_MEM(Off,data)      *((U16*)         (0xc0000000+(((U32)(Off))<<1)))=data
  #define  LCD_INIT_CONTROLLER()

/*********************************************************************
*
*            ARM default configuration (WALMART AT91)
*
**********************************************************************
*/
#elif defined (TARGET_AT91)
  #define LCD_XSIZE      (320)   /* X-resolution of LCD, Logical coor. */
  #define LCD_YSIZE      (240)   /* Y-resolution of LCD, Logical coor. */
  #define LCD_BITSPERPIXEL (8)
  #define LCD_CONTROLLER 1375
  #define LCD_SWAP_BYTE_ORDER (0)

  #define LCD_READ_MEM(Off)            *((U16*)         (0x6000000+(((U32)(Off))<<1)))
  #define LCD_WRITE_MEM(Off,data)      *((U16*)         (0x6000000+(((U32)(Off))<<1)))=data
  #define LCD_READ_REG(Off)            *((volatile U16*)(0x601ffe0+(((U16)(Off))<<1)))
  #define LCD_WRITE_REG(Off,data)      *((volatile U16*)(0x601ffe0+(((U16)(Off))<<1)))=data

/*********************************************************************
*
*                   Define contents of registers
*/

#define LCD_REG0  (0)                                          /* Product code */

#define LCD_REG1  (0x23)                                       /* Mode reg 0.    0 for 4 bit mono LCD */            \
                                                               /*                1 for 8 bit mono LCD */            \
                                                               /*             0x23 for 8 bit color LCD */           \
                 |(1<<2)                                       /*             Mask FPSHIFT during h.non-display */

#define LCD_REG2 ((3<<6)                                       /* Mode reg 1: Bits per pixel 0:1, 1:2, 2:4, 3:8 */  \
                 |(1<<5)                                       /* High performance bit for accel. of CPU access */  \
                 |(1<<4)                                       /* Input clock divide */                             \
                 |(0<<3)                                       /* Display blank */                                  \
                 |(0<<2)                                       /* Frame repeat */                                   \
                 |(0<<1)                                       /* HW video invert enable */                         \
                 |(0<<0))                                      /* SW video invert */

#define LCD_REG3                                               /* Mode reg 2. 0 for 4 bit mono LCD */               \
                  (0<<7)                                       /* LUT bypass */                                     \
                 |(0<<3)                                       /* LCDPWR override */                                \
                 |(0<<2)                                       /* hw power save enable */                           \
                 |(3<<0)                                       /* Software power save :3 = normal operation */

#define LCD_REG4 (LCD_XSIZE/8-1)                               /* horizontal panel size*/
#define LCD_REG5 ((LCD_YSIZE-1)&255)                           /* Vert. panel size, lsb */
#define LCD_REG6 ((LCD_YSIZE-1)>>8)                            /* Vert. panel size, msb */
#define LCD_REG7 (0)                                           /* FPLine start position (TFT only) */
#define LCD_REG8 (31)                                          /* H.non display period   (0 usually O.K.)*/
#define LCD_REG9 (0)                                           /* FPFrame start pos.    (TFT only) */
#define LCD_REGA (0)                                           /* v.non display period  */
#define LCD_REGB (0)                                           /* mod rate register     0: every frame */
#define LCD_REGC (0)                                           /* Screen 1 start lsb    */
#define LCD_REGD (0)                                           /* Screen 1 start msb    */