cis.h

PXA270CF卡代码

/******************************************************************************
**
**  COPYRIGHT (C) 2000, 2001 Intel Corporation.
**
**  This software as well as the software described in it is furnished under 
**  license and may only be used or copied in accordance with the terms of the 
**  license. The information in this file is furnished for informational use 
**  only, is subject to change without notice, and should not be construed as 
**  a commitment by Intel Corporation. Intel Corporation assumes no 
**  responsibility or liability for any errors or inaccuracies that may appear 
**  in this document or any software that may be provided in association with 
**  this document. 
**  Except as permitted by such license, no part of this document may be 
**  reproduced, stored in a retrieval system, or transmitted in any form or by 
**  any means without the express written consent of Intel Corporation. 
**
**  FILENAME:       cis.h
**
**  PURPOSE:        This header file contains the Card Information Structure
**                  definitions used by Card Services.
**
**  LAST MODIFIED:  $Modtime: 7/17/03 1:01p $
******************************************************************************/
#ifndef _cis_h
#define _cis_h

/*
*******************************************************************************
*   LOCAL DEFINITIONS
*******************************************************************************
*/
#define MAX_IO_RANGE 16
#define MAX_MEM_RANGE 8
#define MAX_STRING 32
#define MAX_IO_BASE 16
#define MAX_MEM_BASE 8
#define MAX_CONFIG 16

typedef enum CIS_TupleTypeE {
    CISTPL_Null = 0,
    CISTPL_Device = 1,
    CISTPL_Longlink_MFC = 6,
    CISTPL_Checksum = 16,
    CISTPL_Longlink_A,
    CISTPL_Longlink_C,
    CISTPL_LinkTarget,
    CISTPL_No_Link,
    CISTPL_Vers_1,
    CISTPL_Altstr,
    CISTPL_Device_A,
    CISTPL_Jedec_C,
    CISTPL_Jedec_A,
    CISTPL_Config,
    CISTPL_CFTable_Entry,
    CISTPL_Device_OC,
    CISTPL_Device_OA,
    CISTPL_DeviceGEO,
    CISTPL_DeviceGEO_A,
    CISTPL_Manfid,
    CISTPL_Funcid,
    CISTPL_Funce,
    CISTPL_End = 255
} CIS_TupleTypeT;

typedef enum CIS_DeviceTypeE {
    CIS_DeviceNull = 0,
    CIS_DeviceRom,
    CIS_DeviceOTProm,
    CIS_DeviceEProm,
    CIS_DeviceEEProm,
    CIS_DeviceFlash,
    CIS_DeviceSram,
    CIS_DeviceDram,
    CIS_DeviceFuncspec = 13,
    CIS_DeviceExtend = 14
} CIS_DeviceTypeT;

typedef enum CIS_DeviceSpeedE {
    CIS_DeviceSpeedNull = 0,
    CIS_DeviceSpeed250ns,
    CIS_DeviceSpeed200ns,
    CIS_DeviceSpeed150ns,
    CIS_DeviceSpeed100ns,
    CIS_DeviceSpeedExtend = 7
} CIS_DeviceSpeedT;

typedef enum CIS_UnitSizeE {
    CIS_Unit512 = 0,
    CIS_Unit2K,
    CIS_Unit8K,
    CIS_Unit32K,
    CIS_Unit128K,
    CIS_Unit512K,
    CIS_Unit2M,
    CIS_UnitReserved
} CIS_UnitSizeT;

typedef enum CIS_FunctionTypeE {
    CIS_FunctionMulti = 0,
    CIS_FunctionMemory,
    CIS_FunctionSerial,
    CIS_FunctionParallel,
    CIS_FunctionFixedDisk,
    CIS_FunctionVideo,
    CIS_FunctionNetwork,
    CIS_FunctionAIMS,
    CIS_FunctionNone
} CIS_FunctionTypeT;

typedef enum CIS_PowerTypeE {
    CIS_PowerVoltage = 0,
    CIS_PowerCurrent
} CIS_PowerTypeT;

typedef enum CIS_PowerMaskBitsE {
    CIS_PowerNomVoltage = 0,
    CIS_PowerMinVoltage,
    CIS_PowerMaxVoltage,
    CIS_PowerStaticCurrent,
    CIS_PowerAverageCurrent,
    CIS_PowerPeakCurrent,
    CIS_PowerPdownCurrent
} CIS_PowerMaskBitsT;

typedef struct CIS_PowerS {
    INT mask;
    INT nomVoltage;       // 1uV units
    INT minVoltage;
    INT maxVoltage;
    INT staticCurrent;    // 10nA units
    INT averageCurrent;
    INT peakCurrent;
    INT powerDownCurrent;
} CIS_PowerT;

typedef struct CIS_TimingS {
    INT time;
    INT scale;
} CIS_TimingT;

typedef struct CIS_IoRangeS {
    UINT base;
    UINT length;
} CIS_IoRangeT;

typedef struct CIS_MemRangeS {
    UINT base;
    UINT length;
    UINT host;
} CIS_MemRangeT;

typedef struct CIS_ConfigS {
    UCHAR isValid;
    UCHAR entryNum;
    UCHAR isDefault;

    // Interface description
    UCHAR interfaceType;
    UCHAR bvdActive;
    UCHAR wpActive;
    UCHAR rdyBsyActive;
    UCHAR waitRequired;

    // Power
    CIS_PowerT vcc;
    CIS_PowerT vpp1;
    CIS_PowerT vpp2;

    // Timing
    CIS_TimingT waitTime;
    CIS_TimingT busyTime;
    CIS_TimingT initialTime;

    // IO
    INT numIoAddrBits;
    INT ioMode;
    INT numIoRange;
    CIS_IoRangeT ioRange[MAX_IO_RANGE];

    // IRQ
    UCHAR irqPresent;
    UCHAR irqShare;
    UCHAR irqPulse;
    UCHAR irqLevel;
    UCHAR irqValue;
    UCHAR irqMask;

    // Memory
    INT numMemRange;
    CIS_MemRangeT memRange[MAX_MEM_RANGE];

} CIS_ConfigT;

typedef struct CIS_EntryS {
    INT socket;

    // Device info
    INT deviceType;
    INT wp;
    INT speed;
    INT size;
    INT unitSize;

    // Version info
    INT version;
    CHAR manName[MAX_STRING];
    CHAR prodName[MAX_STRING];
    CHAR prodVersion[MAX_STRING];
    CHAR prodLot[MAX_STRING];

    // Manufacturer info
    INT manfId;
    INT prodId;
    INT versionId;

    // Function info
    INT funcType;
    INT postInit;
    INT expansionRom;

    // Configuration info
    UINT rmsk;                     // Mask of supported conf registers
    UINT radrBase;                 // Base address of conf registers
    INT numIoBase;
    UINT ioBase[MAX_IO_BASE];      // Base address of IO registers
    INT numMemBase;
    UINT memBase[MAX_MEM_BASE];    // Base address of memory window

    // Configuraiton table entries
    INT lastIndex;
    INT selectIndex;
    INT configCount;
    CIS_ConfigT config[MAX_CONFIG];

    // Socket address pointers
    PVOID attSpaceP;
    PVOID ioSpaceP;
    PVOID memSpaceP;
} CIS_EntryT;

#endif // _cis_h