📄 usb_isr.lst
字号:
199 4
200 4 // Break Data into multiple packets if larger than Max Packet
201 4 if (DataSize >= EP0_PACKET_SIZE)
202 4 {
203 5 Fifo_Write(FIFO_EP0, EP0_PACKET_SIZE, (BYTE *)DataPtr);// Put Data on Fifo
204 5 DataPtr += EP0_PACKET_SIZE; // Advance data pointer
205 5 DataSize -= EP0_PACKET_SIZE; // Decrement data size
206 5 DataSent += EP0_PACKET_SIZE; // Increment data sent counter
207 5 }
208 4 else // If data is less than Max Packet size or zero
209 4 {
210 5 Fifo_Write(FIFO_EP0, DataSize, (BYTE *)DataPtr); // Put Data on Fifo
211 5 TempReg |= rbDATAEND; // Add Data End bit to bitmask
212 5 Ep_Status[0] = EP_IDLE; // Return EP 0 to idle state
213 5 }
214 4 if (DataSent == Setup.wLength.i)
215 4 // This case exists when the host requests an even multiple of
216 4 // your endpoint zero max packet size, and you need to exit
217 4 // transmit mode without sending a zero length packet
218 4 {
219 5 TempReg |= rbDATAEND; // Add Data End bit to mask
220 5 Ep_Status[0] = EP_IDLE; // and return Endpoint 0 to an idle state
221 5 }
222 4 POLL_WRITE_BYTE(E0CSR, TempReg); // Write mask to E0CSR
223 4 }
224 3 }
225 2 }
226 1 }
227
228 //-------------------------
229 // Handle_In1
230 //-------------------------
231 // - This routine loads the current value from In_Packet on the Endpoint 1 fifo, after
232 // an interrupt is received from the last packet being transmitted
233 void Handle_In1()
234 {
235 1 BYTE ControlReg;
236 1
237 1 POLL_WRITE_BYTE(INDEX, 1); // Set index to endpoint 1 registers
238 1 POLL_READ_BYTE(EINCSR1, ControlReg); // Read contol register for EP 1
239 1
240 1 if (Ep_Status[1] == EP_HALT) // If endpoint is currently halted, send a stall
C51 COMPILER V7.06 USB_ISR 08/29/2007 09:51:41 PAGE 5
241 1 {
242 2 POLL_WRITE_BYTE(EINCSR1, rbInSDSTL);
243 2 }
244 1
245 1 else // Otherwise send last updated data to host
246 1 {
247 2 if (ControlReg & rbInSTSTL) // Clear sent stall if last packet returned a stall
248 2 {
249 3 POLL_WRITE_BYTE(EINCSR1, rbInCLRDT);
250 3 }
251 2
252 2 if (ControlReg & rbInUNDRUN) // Clear underrun bit if it was set
253 2 {
254 3 POLL_WRITE_BYTE(EINCSR1, 0x00);
255 3 }
256 2
257 2 // Put new data on Fifo
258 2 Fifo_Write(FIFO_EP1, EP1_PACKET_SIZE, (BYTE *)IN_PACKET);
259 2 POLL_WRITE_BYTE(EINCSR1, rbInINPRDY);
260 2 // Set In Packet ready bit, indicating fresh data
261 2 } // on Fifo 1
262 1 }
263
264 //-------------------------
265 // Handle_Out2
266 //-------------------------
267 // Take the received packet from the host off the fifo and put it into the Out_Packet array
268 //
269 void Handle_Out2()
270 {
271 1 BYTE Count = 0;
272 1 BYTE ControlReg;
273 1
274 1 POLL_WRITE_BYTE(INDEX, 2); // Set index to endpoint 2 registers
275 1 POLL_READ_BYTE(EOUTCSR1, ControlReg);
276 1
277 1 if (Ep_Status[2] == EP_HALT) // If endpoint is halted, send a stall
278 1 {
279 2 POLL_WRITE_BYTE(EOUTCSR1, rbOutSDSTL);
280 2 }
281 1
282 1 else // Otherwise read received packet from host
283 1 {
284 2 if (ControlReg & rbOutSTSTL) // Clear sent stall bit if last packet was a stall
285 2 {
286 3 POLL_WRITE_BYTE(EOUTCSR1, rbOutCLRDT);
287 3 }
288 2
289 2 POLL_READ_BYTE(EOUTCNTL, Count);
290 2 if (Count != EP2_PACKET_SIZE) // If host did not send correct packet size, flush buffer
291 2 {
292 3 POLL_WRITE_BYTE(EOUTCNTL, rbOutFLUSH);
293 3 }
294 2 else // Otherwise get the data packet
295 2 {
296 3 Fifo_Read(FIFO_EP2, EP2_PACKET_SIZE, (BYTE*)OUT_PACKET);
297 3 }
298 2 POLL_WRITE_BYTE(EOUTCSR1, 0); // Clear Out Packet ready bit
299 2 }
300 1 }
301
302 //-------------------------
C51 COMPILER V7.06 USB_ISR 08/29/2007 09:51:41 PAGE 6
303 // Usb_Suspend
304 //-------------------------
305 // Enter suspend mode after suspend signalling is present on the bus
306 //
307 void Usb_Suspend(void)
308 { // Add power-down features here if you wish to
309 1 volatile int k; // reduce power consumption during suspend mode
310 1 k++;
311 1 }
312
313 //----------------------------------
314 // FIFO Read
315 //----------------------------------
316 //
317 // Read from the selected endpoint FIFO
318 //
319 // Inputs:
320 // addr: target address
321 // uNumBytes: number of bytes to unload
322 // pData: read data destination
323 //
324 void Fifo_Read(BYTE addr, unsigned int uNumBytes, BYTE * pData)
325 {
326 1 int i;
327 1
328 1 if (uNumBytes) // Check if >0 bytes requested,
329 1 {
330 2 USB0ADR = (addr); // Set address
331 2 USB0ADR |= 0xC0; // Set auto-read and initiate
332 2 // first read
333 2
334 2 // Unload <NumBytes> from the selected FIFO
335 2 for(i=0;i<uNumBytes-1;i++)
336 2 {
337 3 while(USB0ADR & 0x80); // Wait for BUSY->'0' (data ready)
338 3 pData[i] = USB0DAT; // Copy data byte
339 3 }
340 2
341 2 USB0ADR = 0; // Clear auto-read
342 2
343 2 while(USB0ADR & 0x80); // Wait for BUSY->'0' (data ready)
344 2 pData[i] = USB0DAT; // Copy data byte
345 2 }
346 1 }
347
348 //----------------------------------
349 // FIFO Write
350 //----------------------------------
351 //
352 // Write to the selected endpoint FIFO
353 //
354 // Inputs:
355 // addr: target address
356 // uNumBytes: number of bytes to write
357 // pData: location of source data
358 //
359 void Fifo_Write(BYTE addr, unsigned int uNumBytes, BYTE * pData)
360 {
361 1 int i;
362 1
363 1 // If >0 bytes requested,
364 1 if (uNumBytes)
C51 COMPILER V7.06 USB_ISR 08/29/2007 09:51:41 PAGE 7
365 1 {
366 2 while(USB0ADR & 0x80); // Wait for BUSY->'0'
367 2 // (register available)
368 2 USB0ADR = (addr); // Set address (mask out bits7-6)
369 2
370 2 // Write <NumBytes> to the selected FIFO
371 2 for(i=0;i<uNumBytes;i++)
372 2 {
373 3 USB0DAT = pData[i];
374 3 while(USB0ADR & 0x80); // Wait for BUSY->'0' (data ready)
375 3 }
376 2 }
377 1 }
378
379 //-------------------------
380 // Force_Stall
381 //-------------------------
382 // Force a procedural stall to be sent to the host
383 //
384 void Force_Stall(void)
385 {
386 1 POLL_WRITE_BYTE(INDEX, 0);
387 1 POLL_WRITE_BYTE(E0CSR, rbSDSTL); // Set the send stall bit
388 1 Ep_Status[0] = EP_STALL; // Put the endpoint in stall status
389 1 }
390
MODULE INFORMATION: STATIC OVERLAYABLE
CODE SIZE = 981 ----
CONSTANT SIZE = ---- ----
XDATA SIZE = ---- ----
PDATA SIZE = ---- ----
DATA SIZE = 19 19
IDATA SIZE = ---- ----
BIT SIZE = ---- ----
END OF MODULE INFORMATION.
C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -