📄 usb_isr.lst
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C51 COMPILER V7.06 USB_ISR 08/29/2007 09:51:41 PAGE 1
C51 COMPILER V7.06, COMPILATION OF MODULE USB_ISR
OBJECT MODULE PLACED IN USB_ISR.OBJ
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE USB_ISR.c ROM(COMPACT) BROWSE DEBUG OBJECTEXTEND
stmt level source
1 /*
2 File: usb_top_isr.c
3 Author: DM
4 Created: 11/8/02
5
6 Target Device: C8051F320
7
8 Source file for USB firmware. Includes top level isr with Setup,
9 and Endpoint data handlers. Also includes routine for USB suspend,
10 reset, and procedural stall.
11 */
12
13 #include "c8051F320.h"
14 #include "USB_REGISTER.h"
15 #include "USB_MAIN.h"
16 #include "USB_DESCRIPTOR.h"
17
18 extern BYTE OUT_PACKET[];
19 extern BYTE IN_PACKET[];
20
21 BYTE USB_State; // Holds the current USB State def. in USB_MAIN.h
22
23 setup_buffer Setup; // Buffer for current device request information
24
25 unsigned int DataSize; // Size of data to return
26 unsigned int DataSent; // Amount of data sent so far
27 BYTE* DataPtr; // Pointer to data to return
28
29 BYTE Ep_Status[3] = {EP_IDLE, EP_IDLE, EP_IDLE};
30 // Holds the status for each endpoint
31
32 //-------------------------
33 // Usb_ISR
34 //-------------------------
35 // Called after any USB type interrupt, this handler determines which type
36 // of interrupt occurred, and calls the specific routine to handle it.
37 //
38 void Usb_ISR(void) interrupt 8 // Top-level USB ISR
39 {
40 1 BYTE bCommon, bIn, bOut;
41 1 POLL_READ_BYTE(CMINT, bCommon); // Read all interrupt registers
42 1 POLL_READ_BYTE(IN1INT, bIn); // this read also clears the register
43 1 POLL_READ_BYTE(OUT1INT, bOut);
44 1 {
45 2 if (bCommon & rbRSUINT) // Handle Resume interrupt
46 2 {
47 3 Usb_Resume();
48 3 }
49 2 if (bCommon & rbRSTINT) // Handle Reset interrupt
50 2 {
51 3 Usb_Reset();
52 3 }
53 2 if (bIn & rbEP0) // Handle Setup packet received
54 2 { // or packet transmitted if Endpoint 0 is
55 3 Handle_Setup(); // transmit mode
C51 COMPILER V7.06 USB_ISR 08/29/2007 09:51:41 PAGE 2
56 3 }
57 2 if (bIn & rbIN1) // Handle In Packet sent, put new data on
58 2 { // endpoint 1 fifo
59 3 Handle_In1();
60 3 }
61 2 if (bOut & rbOUT2) // Handle Out packet received, take data off
62 2 { // endpoint 2 fifo
63 3 Handle_Out2();
64 3 }
65 2 if (bCommon & rbSUSINT) // Handle Suspend interrupt
66 2 {
67 3 Usb_Suspend();
68 3 }
69 2 }
70 1 }
71
72 //-------------------------
73 // Usb_Resume
74 //-------------------------
75 // Resume normal USB operation
76 //
77 void Usb_Resume(void) // Add code to turn on anything turned off when
78 { // entering suspend mode
79 1 volatile int k;
80 1 k++;
81 1 }
82
83 //-------------------------
84 // Usb_Reset
85 //-------------------------
86 // - Set state to default
87 // - Clear Usb Inhibit bit
88 //
89 void Usb_Reset(void)
90 {
91 1 USB_State = DEV_DEFAULT; // Set device state to default
92 1
93 1 POLL_WRITE_BYTE(POWER, 0x01); // Clear usb inhibit bit to enable USB
94 1 // suspend detection
95 1
96 1 Ep_Status[0] = EP_IDLE; // Set default Endpoint Status
97 1 Ep_Status[1] = EP_HALT;
98 1 Ep_Status[2] = EP_HALT;
99 1 }
100
101 //-------------------------
102 // Handle_Setup
103 //-------------------------
104 // - Decode Incoming Setup requests
105 // - Load data packets on fifo while in transmit mode
106 //
107 void Handle_Setup(void)
108 {
109 1 BYTE ControlReg,TempReg; // Temporary storage for EP control register
110 1
111 1 POLL_WRITE_BYTE(INDEX, 0); // Set Index to Endpoint Zero
112 1 POLL_READ_BYTE(E0CSR, ControlReg); // Read control register
113 1
114 1 if (Ep_Status[0] == EP_ADDRESS) // Handle Status Phase of Set Address command
115 1 {
116 2 POLL_WRITE_BYTE(FADDR, Setup.wValue.c[LSB]);
117 2 Ep_Status[0] = EP_IDLE;
C51 COMPILER V7.06 USB_ISR 08/29/2007 09:51:41 PAGE 3
118 2 }
119 1
120 1 if (ControlReg & rbSTSTL) // If last packet was a sent stall, reset STSTL
121 1 { // bit and return EP0 to idle state
122 2 POLL_WRITE_BYTE(E0CSR, 0);
123 2 Ep_Status[0] = EP_IDLE;
124 2 return;
125 2 }
126 1
127 1 if (ControlReg & rbSUEND) // If last setup transaction was ended prematurely
128 1 { // then set
129 2 POLL_WRITE_BYTE(E0CSR, rbDATAEND);
130 2 POLL_WRITE_BYTE(E0CSR, rbSSUEND); // Serviced Setup End bit and return EP0
131 2 Ep_Status[0] = EP_IDLE; // to idle state
132 2 }
133 1
134 1 if (Ep_Status[0] == EP_IDLE) // If Endpoint 0 is in idle mode
135 1 {
136 2 if (ControlReg & rbOPRDY) // Make sure that EP 0 has an Out Packet ready from host
137 2 { // although if EP0 is idle, this should always be the case
138 3 Fifo_Read(FIFO_EP0, 8, (BYTE *)&Setup);
139 3 // Get Setup Packet off of Fifo, it is currently Big-Endian
140 3
141 3 // Compiler Specific - these next three statements swap the
142 3 // bytes of the setup packet words to Big Endian so they
143 3 // can be compared to other 16-bit values elsewhere properly
144 3 Setup.wValue.i = Setup.wValue.c[MSB] + 256*Setup.wValue.c[LSB];
145 3 Setup.wIndex.i = Setup.wIndex.c[MSB] + 256*Setup.wIndex.c[LSB];
146 3 Setup.wLength.i = Setup.wLength.c[MSB] + 256*Setup.wLength.c[LSB];
147 3
148 3
149 3 switch(Setup.bRequest) // Call correct subroutine to handle each kind of
150 3 { // standard request
151 4 case GET_STATUS:
152 4 Get_Status();
153 4 break;
154 4 case CLEAR_FEATURE:
155 4 Clear_Feature();
156 4 break;
157 4 case SET_FEATURE:
158 4 Set_Feature();
159 4 break;
160 4 case SET_ADDRESS:
161 4 Set_Address();
162 4 break;
163 4 case GET_DESCRIPTOR:
164 4 Get_Descriptor();
165 4 break;
166 4 case GET_CONFIGURATION:
167 4 Get_Configuration();
168 4 break;
169 4 case SET_CONFIGURATION:
170 4 Set_Configuration();
171 4 break;
172 4 case GET_INTERFACE:
173 4 Get_Interface();
174 4 break;
175 4 case SET_INTERFACE:
176 4 Set_Interface();
177 4 break;
178 4 default:
179 4 Force_Stall(); // Send stall to host if invalid request
C51 COMPILER V7.06 USB_ISR 08/29/2007 09:51:41 PAGE 4
180 4 break;
181 4 }
182 3 }
183 2 }
184 1
185 1 if (Ep_Status[0] == EP_TX) // See if the endpoint has data to transmit to host
186 1 {
187 2 if (!(ControlReg & rbINPRDY)) // Make sure you don't overwrite last packet
188 2 {
189 3 // Endpoint 0 transmit mode
190 3 //Delay();
191 3 POLL_READ_BYTE(E0CSR, ControlReg);
192 3 // Read control register
193 3
194 3 if ((!(ControlReg & rbSUEND)) || (!(ControlReg & rbOPRDY)))
195 3 // Check to see if Setup End or Out Packet received, if so
-
196 3 // do not put any new data on FIFO
197 3 {
198 4 TempReg = rbINPRDY; // Add In Packet ready flag to E0CSR bitmask
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