stv199.h

这是DVB tuner驱动部分和其它相关的源码和一些技术资料文档.

/* STV0199A Register AGC1C (0x13) Tuner AGC #1 control */
#define STV0199A_AGC1C_BETA_MSK  (0x07)  /* Tuner AGC #1 control. beta_Agc1 */
#define STV0199A_AGC1C_BETA_SFT  (0)     /* Number of shifts to bit pos. 0 */

/* STV0199A Register ERRSYMB (0x14) Carrier/Noise indicator */
#define STV0199A_ERRSYMB_MSK     (0xFF)  /* Carrier/Noise indicator */
#define STV0199A_ERRSYMB_SFT     (0)     /* Number of shifts to bit pos. 0 */

/* STV0199A Register AGC2O (0x15) M factor & signal AGC #2 coeff */
#define STV0199A_AGC2O_M2_MSK    (0x1F)  /* M factor AGC #2 */
#define STV0199A_AGC2O_M2_SFT    (0)     /* Number of shifts to bit pos. 0 */
#define STV0199A_AGC2O_COEFF_MSK (0x60)  /* Signal AGC #2 coeff */
#define STV0199A_AGC2O_COEFF_SFT (5)     /* Number of shifts to bit pos. 0 */
#define STV0199A_AGC2O_DCO_MSK   (0x80)  /* DC Compensation, 1 = On, 0 = Off */
#define STV0199A_AGC2O_DCO_SFT   (7)     /* Number of shifts to bit pos. 0 */

/* STV0199A Register AGC2G (0x16) AGC #2 integrator value */
#define STV0199A_AGC2G_MSK       (0xFF)  /* AGC #2 integrator value */
#define STV0199A_AGC2G_SFT       (0)     /* Number of shifts to bit pos. 0 */

/* STV0199A Register SFRM (0x17) MSB of expected baud Freq */
#define STV0199A_SFRM_MSK        (0xFF)  /* MSB of expected baud Freq */
#define STV0199A_SFRM_SFT        (0)     /* Number of shifts to bit pos. 0 */

/* STV0199A Register SFRL (0x18) LSB of expected baud Freq */
#define STV0199A_SFRL_MSK        (0xFF)  /* LSB of expected baud Freq */
#define STV0199A_SFRL_SFT        (0)     /* Number of shifts to bit pos. 0 */

/* STV0199A Register ECOL (0x19) Error monitoring reg */
#define STV0199A_ECOL_NOE_MSK    (0x3)   /* Count period in bytes */
#define STV0199A_ECOL_NOE_SFT    (0)     /* Number of shifts to bit pos. 0 */
#define STV0199A_ECOL_ESCE_MSK   (0x30)  /* Error source */
#define STV0199A_ECOL_ESCE_SFT   (4)     /* Number of shifts to bit pos. 0 */
#define STV0199A_ECOL_ERRM_MSK   (0x80)  /* Error Mode. 0 = rate, 1 = count */
#define STV0199A_ECOL_ERRM_SFT   (7)     /* Number of shifts to bit pos. 0 */

/* STV0199A Register ECNTM (0x1A) MSB of error count */
#define STV0199A_ECNTM_MSK       (0xFF)  /* MSB of error count */
#define STV0199A_ECNTM_SFT       (0)     /* Number of shifts to bit pos. 0 */

/* STV0199A Register ECNTL (0x1B) LSB of error count */
#define STV0199A_ECNTL_MSK       (0xFF)  /* LSB of error count */
#define STV0199A_ECNTL_SFT       (0)     /* Number of shifts to bit pos. 0 */

/* STV0199A Register MCR (0x1C) A/D sampling clock Freq, max = 60MHz */
#define STV0199A_MCR_M_MSK       (0x07)  /* A/D sampling clock Freq, max = 60MHz, n */
#define STV0199A_MCR_M_SFT       (0)     /* Number of shifts to bit pos. 0 */
#define STV0199A_MCR_DIRCLK_MSK  (0x08)  /* A/D sampling clock Freq, max = 60MHz, n */
#define STV0199A_MCR_DIRCLK_SFT  (3)     /* Number of shifts to bit pos. 0 */
#define STV0199A_MCR_P_MSK       (0x70)  /* A/D sampling clock Freq, max = 60MHz, n */
#define STV0199A_MCR_P_SFT       (4)     /* Number of shifts to bit pos. 0 */
#define STV0199A_MCR_STDBY_MSK   (0x80)  /* A/D sampling clock Freq, max = 60MHz, n */
#define STV0199A_MCR_STDBY_SFT   (7)     /* Number of shifts to bit pos. 0 */

/* STV0199A Register ACR (0x1D) Auxillary clock programmation */
#define STV0199A_ACR_Q_MSK       (0x0F)  /* Auxillary clock programmation, n */
#define STV0199A_ACR_Q_SFT       (0)     /* Number of shifts to bit pos. 0 */
#define STV0199A_ACR_P_AUX_MSK   (0x10)  /* Auxillary clock programmation, n */
#define STV0199A_ACR_P_AUX_SFT   (4)     /* Number of shifts to bit pos. 0 */
#define STV0199A_ACR_AUX_ENA_MSK (0x20)  /* Auxillary clock programmation, n */
#define STV0199A_ACR_AUX_ENA_SFT (5)     /* Number of shifts to bit pos. 0 */
#define STV0199A_ACR_IP0_MSK     (0x40)  /* Auxillary clock programmation, n */
#define STV0199A_ACR_IP0_SFT     (6)     /* Number of shifts to bit pos. 0 */

/* STV0199A Register F22FR (0x1E) F22 Frequency control for DISEQC */
#define STV0199A_F22FR_MSK       (0xFF)  /* F22 Frequency control for DISEQC */
#define STV0199A_F22FR_SFT       (0)     /* Number of shifts to bit pos. 0 */

/* STV0199A Register F22CR (0x1F) F22 port control */
#define STV0199A_F22CR_P22_MSK   (0x01)  /* F22 port control */
#define STV0199A_F22CR_P22_SFT   (0)     /* Number of shifts to bit pos. 0 */
#define STV0199A_F22CR_F22_ENA_MSK (0x02) /* F22 port control */
#define STV0199A_F22CR_F22_ENA_SFT (1)   /* Number of shifts to bit pos. 0 */
#define STV0199A_F22CR_SY_ASY_MSK (0x04) /* F22 port control */
#define STV0199A_F22CR_SY_ASY_SFT (2)    /* Number of shifts to bit pos. 0 */
#define STV0199A_F22CR_RF22_MSK  (0x04)  /* F22 port control */
#define STV0199A_F22CR_RF22_SFT  (3)     /* Number of shifts to bit pos. 0 */
#define STV0199A_F22CR_OP_MSK    (0x70)  /* F22 port control */
#define STV0199A_F22CR_OP_SFT    (4)     /* Number of shifts to bit pos. 0 */
#define STV0199A_F22CR_OP0_MSK    (0x10)  /* F22 output port 0 control */
#define STV0199A_F22CR_OP1_MSK    (0x20)  /* F22 output port 1 control */
#define STV0199A_F22CR_OP2_MSK    (0x40)  /* F22 output port 2 control */

/* Exported Variables ----------------------------------------------------- */

/* Exported Types --------------------------------------------------------- */

/* Error code */
typedef U32 STV0199A_ErrorCode_t;

/* STV0199A property table -- we define a bitmask on a register allowing us to
 * set/get the property without affecting the rest of the register.
 */
typedef struct
{
    U8 Register;
    U8 BitMask;
} STV0199A_PropertyTable_t;

/* The following enumerations represent offsets into the property table */
typedef enum
{
    STV0199A_IQ,
    STV0199A_ROLL_OFF,
    STV0199A_H,
    STV0199A_TO,
    STV0199A_SN,
    STV0199A_CF,
    STV0199A_LK,
    STV0199A_E,
    STV0199A_ALPHA_TIMING,
    STV0199A_BETA_TIMING,
    STV0199A_TLOOP_FREQUENCY,
    STV0199A_BETA_CARRIER,
    STV0199A_ALGORITHM,
    STV0199A_ALPHA_CARRIER,
    STV0199A_CLOOP_FREQUENCY,
    STV0199A_AGC1_OPEN_DRAIN,
    STV0199A_AGC1_REF,
    STV0199A_AGC1_INTEGRATOR,
    STV0199A_BETA_AGC1,
    STV0199A_AGC2_COEFFICIENT,
    STV0199A_AGC2_REF,
    STV0199A_AGC2_GAIN,
    STV0199A_SYMBOL_MSB,
    STV0199A_SYMBOL_LSB,
    STV0199A_M_DIVISOR,
    STV0199A_DIR_CLOCK,
    STV0199A_P_DIVISOR,
    STV0199A_AUX_ENA,
    STV0199A_P_AUX,
    STV0199A_PUNCTURE_RATE,
    STV0199A_TS_OUTPUT_MODE,
    STV0199A_OUTPUT_CLOCK_CFG,
    STV0199A_OUTPUT_CLOCK_PLR
} STV0199A_Property_t;

/* Low-level device access/status */
typedef struct
{
    void                    *Handle_p;  /* I2C handle pointer */
    U32                     ExternalClock;
    U8                      RegisterMap[STV0199A_NUMBER_REGISTERS];

    /* Properties stored for allowing global reference */
    U32                     MasterClock;
    U32                     SymbolRate;
    U32                     NaturalFrequency1;
    U32                     NaturalFrequency2;
    U32                     DampingFactor1;
    U32                     DampingFactor2;
    U32                     AGC1TimeConstant;
    U32                     AGC2TimeConstant;
    U8                      AlphaCarrier;
    U8                      BetaCarrier;
    U8                      AlphaTiming;
    U8                      BetaTiming;
    S8                      TimingLoopFrequency;
    S8                      CarrierLoopFrequency;
    U8                      RollOff;
    U8                      VENRate;
    U8                      IQ;
    U8                      CF;
    U8                      LK;
    U8                      SN;
    U8                      TO;
    U8                      H;
    U8                      E;
    S8                      AGC1;
    U8                      AGC2;
    U8                      AuxENA;
    U8                      PAux;
    U32                     SignalQuality;
    U32                     BitErrorRate;
    U32                     PowerOutput;
} STV0199A_Device_t;

/* Exported Macros -------------------------------------------------------- */

/* Delay calling task for a period of microseconds */
#define STV0199A_Delay(micro_sec) task_delay((unsigned int) \
                                  (((micro_sec) + 999) / 1000) * \
                                  ST_GetClocksPerSecond() / 1000)

/* Exported Functions ----------------------------------------------------- */

/* Register access routines */
STV0199A_ErrorCode_t STV0199A_Read(STV0199A_Device_t *Hw_p,
								   U8 *Dest_p,
								   U8 Register);
STV0199A_ErrorCode_t STV0199A_Write(STV0199A_Device_t *Hw_p,
									U8 Value,
									U8 Register);
STV0199A_ErrorCode_t STV0199A_ReadBlock(STV0199A_Device_t *Hw_p,
                                        U8 *Dest_p,
                                        U8 Register,
                                        U8 NumberToRead);
STV0199A_ErrorCode_t STV0199A_WriteBlock(STV0199A_Device_t *Hw_p,
                                         U8 *Src_p,
                                         U8 Register,
                                         U8 NumberToWrite);

STV0199A_ErrorCode_t STV0199A_ResetRegisters(STV0199A_Device_t *Hw_p);

/* STV0199A property access routines */
STV0199A_ErrorCode_t STV0199A_GetProperty(STV0199A_Device_t *Device_p,
                                          STV0199A_Property_t Property,
                                          U8 *Dest_p);
STV0199A_ErrorCode_t STV0199A_SetProperty(STV0199A_Device_t *Device_p,
                                          STV0199A_Property_t Property,
                                          U8 Value);

/* Property get */
STV0199A_ErrorCode_t STV0199A_GetMasterClock(STV0199A_Device_t *Hw_p);
STV0199A_ErrorCode_t STV0199A_GetSymbolRate(STV0199A_Device_t *Hw_p);
STV0199A_ErrorCode_t STV0199A_GetCarrierLoopFrequency(STV0199A_Device_t *Hw_p);
STV0199A_ErrorCode_t STV0199A_GetRollOff(STV0199A_Device_t *Hw_p);
STV0199A_ErrorCode_t STV0199A_GetIQ(STV0199A_Device_t *Hw_p);
STV0199A_ErrorCode_t STV0199A_GetCF(STV0199A_Device_t *Hw_p);
STV0199A_ErrorCode_t STV0199A_GetLK(STV0199A_Device_t *Hw_p);
STV0199A_ErrorCode_t STV0199A_GetSN(STV0199A_Device_t *Hw_p);
STV0199A_ErrorCode_t STV0199A_GetTO(STV0199A_Device_t *Hw_p);
STV0199A_ErrorCode_t STV0199A_GetH(STV0199A_Device_t *Hw_p);
STV0199A_ErrorCode_t STV0199A_GetE(STV0199A_Device_t *Hw_p);
STV0199A_ErrorCode_t STV0199A_GetAGC1(STV0199A_Device_t *Hw_p);
STV0199A_ErrorCode_t STV0199A_GetAGC2(STV0199A_Device_t *Hw_p);
STV0199A_ErrorCode_t STV0199A_GetAlphaCarrier(STV0199A_Device_t *Hw_p);
STV0199A_ErrorCode_t STV0199A_GetBetaCarrier(STV0199A_Device_t *Hw_p);
STV0199A_ErrorCode_t STV0199A_GetAlphaTiming(STV0199A_Device_t *Hw_p);
STV0199A_ErrorCode_t STV0199A_GetBetaTiming(STV0199A_Device_t *Hw_p);
STV0199A_ErrorCode_t STV0199A_GetNaturalFrequency1(STV0199A_Device_t *Hw_p);
STV0199A_ErrorCode_t STV0199A_GetNaturalFrequency2(STV0199A_Device_t *Hw_p);
STV0199A_ErrorCode_t STV0199A_GetDampingFactor1(STV0199A_Device_t *Hw_p);
STV0199A_ErrorCode_t STV0199A_GetDampingFactor2(STV0199A_Device_t *Hw_p);
STV0199A_ErrorCode_t STV0199A_GetAGC1TimeConstant(STV0199A_Device_t *Hw_p);
STV0199A_ErrorCode_t STV0199A_GetAGC2TimeConstant(STV0199A_Device_t *Hw_p);
STV0199A_ErrorCode_t STV0199A_GetTimingLoopFrequency(STV0199A_Device_t *Hw_p);
STV0199A_ErrorCode_t STV0199A_GetVENRate(STV0199A_Device_t *Hw_p);
STV0199A_ErrorCode_t STV0199A_GetSignalQuality(STV0199A_Device_t *Hw_p);
STV0199A_ErrorCode_t STV0199A_GetPowerOutput(STV0199A_Device_t *Hw_p);

/* Property set */
STV0199A_ErrorCode_t STV0199A_SetTrigger(STV0199A_Device_t *Hw_p,
                                         BOOL TriggerOn);
STV0199A_ErrorCode_t STV0199A_SetSymbolRate(STV0199A_Device_t *Hw_p,
                                            U32 NewSymbolRate);
STV0199A_ErrorCode_t STV0199A_DeltaSymbolRate(STV0199A_Device_t *Hw_p,
                                              S32 Correction);
STV0199A_ErrorCode_t STV0199A_SetTimingLoopFrequency(STV0199A_Device_t *Hw_p,
                                                     S8 Value);
STV0199A_ErrorCode_t STV0199A_SetCarrierLoopFrequency(STV0199A_Device_t *Hw_p,
                                                      S8 Value);
STV0199A_ErrorCode_t STV0199A_SetIQ(STV0199A_Device_t *Hw_p, U8 Value);
STV0199A_ErrorCode_t STV0199A_SetBetaTiming(STV0199A_Device_t *Hw_p,
                                            U8 Value);
STV0199A_ErrorCode_t STV0199A_SetVENRate(STV0199A_Device_t *Hw_p,
                                         U8 Value);

#endif /* _STV0199A_H */

/* End of stv199.h */