mst7x.c

MST720-DEMO程序

#endif	// FSC_8X
#endif
// select register bank VCF (BANK3)
//===============================================================
	1, GEN_00_REGBK,			
	REGBANKVCF,				// 00h

#if DEMODULELATOR_MODE
	1, BK3_11_COMBCFGB,			// Set to Mode 1
	0x20,					// BK3_11_COMBCFGB
#else
	1, BK3_11_COMBCFGB,			// Set to Mode 0
	0x00,					// BK3_11_COMBCFGB
#endif

#if(MARIA_TYPE_SEL == MARIA_2)

	2, BK3_12_DEMGAIN,
	0x02, 0x80,

	2, BK3_16_FRHTOT_L,
	0x66, 0x66,

	1, BK3_1C,
	0xB0,

	2, BK3_21_COMB2DCFGB,
	0xEF, 0x87,					// BK3_21_COMB2DCFGB, BK3_22_COMB2DCFGC,

	3, BK3_23_COMB2DCFGD,
	0x40, 0x20, 0x18,

	3, BK3_26_THCRMAERR,
	0x00, 0x00, 0x10,

	1, BK3_2F,
	0x00,

	1, BK3_42_TIMDETCFGC,
	0x20,

	1, BK3_44_HSLK_THU,
	0x78,
	
#if (PANEL_TYPE_SEL == PNL_AU102_DT)
	2, BK3_64_REG_BRHT,
	0x80, 0xC0,
#else
	6, BK3_60_IMGCTRL,
	0x50, 0x10, 0xA0,				// BK3_60_IMGCTRL, BK3_61_RSP_NTM, BK3_62
	_INIT_VD_CON, _INIT_VD_BRT, _INIT_VD_SATURATION,//0x92, 0x80, _INIT_VD_SATURATION,		// BK3_63_REG_CTST, BK3_64_REG_BRHT, BK3_65_REG_SAT
#endif

	1, BK3_60_IMGCTRL,
	0xD0,

	1, BK3_6F_MAX_CRMA,
	0x01,

	// For SECAM setting
	2, BK3_A4,
	0x1B, 0x54,

	2, BK3_A7,
	0x66, 0x02,

#else
	4, BK3_12_DEMGAIN,
	// 0x63, 0xAB, 0x79, 0x40,			// BK3.12h, BK3.13h, BK3.14h, BK3.15h (old setting)
	0x62, 0x80, 0x80, 0x00,			// BK3_12_DEMGAIN, BK3_13_CBGAIN, BK3_14_CRGAIN, BK3_15_BURSTREF

	2, BK3_1D_DACSELA,
	0x00, 0x00,				// BK3_1D_DACSELA, BK3_1E_DACSELB

	3, BK3_21_COMB2DCFGB,
	0x4C, 0x0A, 0x00,				// BK3_21_COMB2DCFGB, BK3_22_COMB2DCFGC, BK3_23_COMB2DCFGD

	7, BK3_24_TH2DHOR,			// 2D Comb Adjustment  //Forte0714
	0x02, 0x08, 0x08, 0x08,			// BK3_24_TH2DHOR, BK3_25_TLRNLUMA, BK3_26_THCRMAERR, BK3_27_THHORCHKV
	0x08, 0x10, 0x20,				// BK3_28_TH2DVER, BK3_29_TLRNY, BK3_2A_TLRNC
	
	1, BK3_27_THHORCHKV,					
	0x08,					// BK3_27_THHORCHKV

	2, BK3_40_TIMDETCFGA,
	0x2A, 0x90,				// BK3_40_TIMDETCFGA, BK3_41_TIMDETCFGB

	3, BK3_4A_BSTSRT_THU,
	0x30, 0x10, 0x00,				// BK3_4A_BSTSRT_THU, BK3_4B_BSTSRT_THL, BK3_4C_DEGDETCFG

	2, BK3_51,				// For color shift issue
	0x01, 0x07, 				// BK3_51,BK3_52(20050617)

	6, BK3_60_IMGCTRL,
	0x80, 0x20, 0x00,				// BK3_60_IMGCTRL, BK3_61_RSP_NTM, BK3_62
	0x96, 0x80, _INIT_VD_SATURATION,		// BK3_63_REG_CTST, BK3_64_REG_BRHT, BK3_65_REG_SAT
#endif

#if(MARIA_TYPE_SEL == MARIA_2)
// select register bank LVDS & CCFL (BANK4)
//===============================================================
	1, GEN_00_REGBK,			
	REGBANKLVDS_CCFL,				// 00h

#if (ENABLE_CCFL_FUNCTION)
	1, BK4_6B,
	0x80,
	
	1, BK4_9A,
	0xCF,

	#if CCFL_BURST_MODE
		1, BK4_6E,
		0x0D,
	#else
		1, BK4_6E,
		0x0C,
	#endif
	
	4, BK4_72,  // BK4_72 ,BK4_73,BK4_74,BK4_75
	0xF5, 0xE9, 0x32, 0x22,
	
	2, BK4_78,
	0x12, 0x00,
		
	2, BK4_7A,
	0xFF, 0x38,
	1,BK4_81,
	0x90,
	1, BK4_86,
	0x01,
	
	1, BK4_85,
	0x3C,
	
	1, BK4_8A,
	0x01,
	
	1,BK4_89,
	0x16,

	#if CCFL_BURST_MODE
		1, BK4_8F,
		0x00,

		1, BK4_8E,
		0xAE,
	#endif
	
	1,BK4_91,
	0x00,
	
	1,BK4_90,
	0x80,

	2,BK4_AB,
	0x13, 0x81,
	
	1, BK4_B0,
	0xB3,
	
	2, BK4_B1,
	0x00, 0x0A,
	
	1, BK4_6B,
	0x00,
#endif

#if PANEL_LVDS
	1, BK4_19_LVDS_CTRL,	0x00			// BK4_19_LVDS_CTRL
	#if PANEL_LVDS_TI_MODE
       |_BIT0
       #endif
	#if PANEL_SWAP_LVDS_POL
       | _BIT1
       #endif
       #if PANEL_SWAP_LVDS_CH
       | _BIT2
       #endif
       ,

	1, BK4_1E_MOD_CTRL,
	0x02,

	2, BK4_20_MOD_SEL0,
	0x00, 0x00,

	#if (PANEL_TYPE_SEL == PNL_FUJITSU17_L)
	1, BK4_22_LVDS_T0,
	0x26,
	#else
	1, BK4_22_LVDS_T0,
	0x00,
	#endif
		
#elif PANEL_ANALOG_TCON

	1, BK4_1E_MOD_CTRL,
	0x04,

	#endif
	
#endif

// select register bank scaler (BANK0)
//===============================================================
	1, GEN_00_REGBK,			
	REGBANKSCALER,

	-1,

};

#if (PANEL_TCON+PANEL_ANALOG_TCON)
BYTE code tPanel_TCONInitial[]=
{
	1, GEN_00_REGBK,				// select register bank ADC
	REGBANKADC,
	
	3, BK1_CD_GPO_OEV2_WIDTH,
	SET_OEV2_WIDTH,				// BK1_CD_GPO_OEV2_WIDTH
	SET_OEV3_WIDTH,				// BK1_CE_GPO_OEV3_WIDTH
	SET_OEV_DELTA,				// BK1_CF_GPO_OEV_DELTA
	
	3, BK1_D0_PTC_MODE1,
	(SET_PTC_MODE1&0x7F),			// Initial disable TCON // BK1_D0_PTC_MODE1
#if ((BOARD_TYPE_SEL == BD_DEMO_7985M_IDP)||(BOARD_TYPE_SEL == BD_SOCKET_7985M_IDP)||(BOARD_TYPE_SEL == BD_SOCKET_7915MA_IDP))	// BK1_D1_PTC_MODE2
	(SET_PTC_MODE2&0xFC|0x01),		// Initial set R/L output low and U/D output High for Panel VDD
#else
	(SET_PTC_MODE2&0xFC),			// Initial set R/L and U/D output low
#endif
	SET_PTC_MODE3,				// BK1_D2_PTC_MODE3

	20, BK1_DC_GPO_FRP_TRAN,
	SET_FRP_TRAN,				// BK1_DC_GPO_FRP_TRAN
	SET_STH_START,				// BK1_DD_GPO_STH_STT
	SET_STH_WIDTH,				// BK1_DE_GPO_STH_WIDTH
	SET_OEH_START,				// BK1_DF_GPO_OEH_STT
	SET_OEH_WIDTH,				// BK1_E0_GPO_OEH_WIDTH
	SET_OEV_START,				// BK1_E1_GPO_OEV_STT
	SET_OEV_WIDTH,				// BK1_E2_GPO_OEV_WIDTH
	SET_CKV_START,				// BK1_E3_GPO_CKV_STT
	SET_CKV_START2,				// BK1_E4_GPO_CKV_STT2
	SET_CKV_WIDTH,				// BK1_E5_GPO_CKV_WIDTH
	SET_STV_LINE_TH,			// BK1_E6_GPO_STV_LN_TH
	SET_STV_START,				// BK1_E7_GPO_STV_STT
	SET_STV_WIDTH,				// BK1_E8_GPO_STV_WIDTH
	SET_OEV2_START,				// BK1_E9_GPO_OEV2_STT
	SET_OEV3_START,				// BK1_EA_GPO_OEV3_STT
	SET_H_ST_DLY_L,				// BK1_EB_HSTT_DLY_L
	SET_H_ST_DLY_H,				// BK1_EC_HSTT_DLY_H
	SET_CLK_DLY_SYNC_OUT,			// BK1_ED_CLK_DLY_SYNC_OUT
	SET_CKV_END2,				// BK1_EE_GPO_CKV_END2
	SET_Q1H,				// BK1_EF_Q1H_SETTING

#if PANEL_ANALOG_TCON

	2, BK1_43_BVOM_DC,			// VCOM setting
	SET_BVOM_DC,				// BK1_43_BVOM_DC
	SET_BVOM_OUT,				// BK1_44_BVOM_OUT

	10, BK1_46,				// Power setting
	0x00, 0x00, 0x00, 0x0C,			// BK1_46, BK1_47_C_BUCK, BK1_48_C_CP, BK1_49 // 20050701 update
	0x00, 0x40, 0x55, 0x55,			// BK1_4A, BK1_4B, BK1_4C, BK1_4D
	0xF9, 0x00,				// BK1_4E, BK1_4F

	2, BK1_AA_VDAC_ADJ1,			// DAC output setting
	SET_VDAC_ADJ1,				// BK1_AA_VDAC_ADJ1
	SET_VDAC_ADJ2,				// BK1_AB_VDAC_ADJ2

#else
	2, BK1_45,
	0x01, 0x50,				// BK1_45,BK1_46

	3, BK1_4A,
	0xF1, 0x5F, 0x55,				// BK1_4A, BK1_4B, BK1_4C

	1, BK1_A9_PD_VDAC,
	0x0F,					// BK1_A9_PD_VDAC

#endif	// PANEL_ANALOG_TCON

	1, GEN_00_REGBK,				// select register bank scaler
	REGBANKSCALER,

	-1,

};
#endif	//(PANEL_TCON+PANEL_ANALOG_TCON)

/**********************
* FUNCTION PROTOTYPES *
***********************/
void mstMst7XInit(void)
{
	mstPowerManagement(PM_POWER_ON);		// Enable all of CLK

	mstWriteByte(GEN_00_REGBK, REGBANKSCALER);	// select register bank scaler
	mstWriteByte(BK0_E2_SWRST0, 0x01);		// software reset
	miscDelay1ms(1);
	mstWriteByte(BK0_E2_SWRST0, 0x00);		// software reset
	miscDelay1ms(20);

	// Mst7xxx initial
	mstWriteDataTable(tMST7xInitialize);
	
	// msACE libary initial
	InitACEVar();
	tColorCorrectionMatrix = &(tVideoColorCorrectionMatrix[0][0]);
	//msACEColorCtrl(1);
	msAdjustPCRGB(0x80, 0x80, 0x80);
	msAdjustVideoRGB(0x80, 0x82, 0x80);
	msAdjustHSC(50, 0x80, 0x80);
	msAdjustVideoCbCr(_COLOR_DEF_CB,_COLOR_DEF_CR);
	
	// Panel timing initial
	mstWriteDataTable(tPanel_InitialTable);
	
	// Load ACE initial table
	mstWriteDataTable(tMsACETable);
#if (MARIA_TYPE_SEL == MARIA_1)
	mstWriteByte(GEN_00_REGBK, REGBANKADC);	// Switch bank1 ADC
	g_ucMBRIValue = mstReadByte(BK1_85_M_BRI);
	mstWriteByte(GEN_00_REGBK, REGBANKSCALER);	// Switch bank0 Scaler
#endif

#if (PANEL_TCON+PANEL_ANALOG_TCON)
	mstWriteDataTable(tPanel_TCONInitial);
#else	// (PANEL_TCON+PANEL_ANALOG_TCON)
	mstWriteByte(GEN_00_REGBK, REGBANKADC);	// Switch bank1 ADC
	mstWriteByte(BK1_D0_PTC_MODE1, 0x0C);		// Disable TCON function
	mstWriteByte(GEN_00_REGBK, REGBANKSCALER);	// Switch bank0 Scaler
#endif	// (PANEL_TCON+PANEL_ANALOG_TCON)

#if SSC_ENABLE
	mstEnableSSC();
#endif

#if(MARIA_TYPE_SEL == MARIA_2)
	mstWriteByte( BK0_24_OPL_CTL1, 0x03);
	mstWriteByte( BK0_2D_OPL_TSTA0, 0x00);
	#if (PANEL_LVDS)
		mstWriteByte( BK0_2E_OPL_TSTA1, 0x00);
	#else
		mstWriteByte( BK0_2E_OPL_TSTA1, 0x05);
	#endif
#endif
	// Initialize OSD
	//osdOsdInitial();	//20050908 kevin mask
}