sync.c

MST720-DEMO程序

					mstSyncCVBSModeSet(g_ucSyncStatus);
				#endif
					mstPowerManagement(PM_CVBS);
				}
				else if ((tOSDSourcSELSequence[Display.ucSourceSEL] <= SVIDEO2))
				{
				#if (MARIA_TYPE_SEL == MARIA_2)
					mstSyncSVideoModeSet(g_ucVDStatus);
				#else
					mstSyncSVideoModeSet(g_ucSyncStatus);
				#endif
					mstPowerManagement(PM_SVIDEO);
				}
				else if (tOSDSourcSELSequence[Display.ucSourceSEL] == YPBPR)
				{
					mstSyncYPbPrModeSet(g_ucSyncStatus);
					mstPowerManagement(PM_YCbCr);
				}
				else if (tOSDSourcSELSequence[Display.ucSourceSEL] == VGA)
				{
					mstSyncVGAModeSet(g_ucSyncStatus);
					mstPowerManagement(PM_VGA);
				}
				else if (tOSDSourcSELSequence[Display.ucSourceSEL] == CCIR656)
				{
					mstSyncCCIRModeSet(g_ucSyncStatus);
					mstPowerManagement(PM_CCIR656);
				}
				
				g_uwHStar = mstReadWord(BK0_08_SPRHST_H);
				mstSetScalingMode(Display.ucScalingMode);
				mstSetSaturation(Display.ucSaturation); 	//jordan0609
				miscDelay1ms(100);				// Wait display stable
				
				// Patch black level (Forte 20050629)
			#if(MARIA_TYPE_SEL == MARIA_1)
				if(tOSDSourcSELSequence[Display.ucSourceSEL] <= SVIDEO2)		// If source is CVBS or SVIDEO
				{
					mstWriteByte(GEN_00_REGBK, REGBANKVCF); 	// select register bank VCF
					if ((mstReadByte(BK3_72_COMB_STSC) & 0x07)<0x03) 
					{
						mstWriteByte(GEN_00_REGBK, REGBANKADC);
						mstWriteByte(BK1_85_M_BRI, g_ucMBRIValue);	// Black-Level setup 
					}
					else
					{
						mstWriteByte(GEN_00_REGBK, REGBANKADC);
						mstWriteByte(BK1_85_M_BRI, (g_ucMBRIValue+6));	// Black-Level NO-setup
					}
					mstWriteByte(GEN_00_REGBK, REGBANKSCALER);		//Switch bank0 Scaler
				}
			#endif

			#if (MARIA_TYPE_SEL == MARIA_2) 
			#if ENABLE_VD_DSP
				//g_bEnableVDDSP = 1;
				//VD_DSP_Ctl(TRUE);
				/*for(ucTemp=0; ucTemp < 50; ucTemp++)
				{
					miscDelay1ms(10);
					VD_DSP();
				}*/
			#endif
				// Patch for MARIA 2B VCR setting BK2.6A[7:6] = 11b
				mstWriteByte(GEN_00_REGBK, REGBANKVFE); 	// select register bank2 VFE
				mstWriteByte(BK2_6F, 0x01);					// [7] = 0b video partial reset option
				mstResetVedioDecoder();						// reset AFEC only
				mstWriteByte(GEN_00_REGBK, REGBANKVFE); 	// select register bank2 VFE
				mstWriteByte(BK2_6F, 0x81);					// [7] = 1b video all reset option
				mstWriteByte(GEN_00_REGBK, REGBANKSCALER);		//Switch bank0 Scaler
				miscDelay1ms(100);
			#endif
			
				mstDisableMute();
				g_ucVDGainTimer = 250;

				
			#if 0 //(PANEL_TYPE_SEL == PNL_HANNSTAR96_L)
					//mstWriteByte(BK0_25_OPL_SET0, 0xF1);
					//mstWriteByte(BK0_26_OPL_SET1, 0x15);
					mstWriteByte(BK0_27_OPL_SET2, mstReadByte(BK0_27_OPL_SET2));		// Enable short line tune (redo)
			#endif
				
				mstWriteByte(BK0_18_INTSTA, 0x00);
				mstWriteByte(BK0_1E_INTSTD, 0x00);
			}
			
		
			g_ucSystemFlag &= ~INPUT_TIMING_CHANGE_FLAG;
			g_ucSyncStableCounter = 0;
			
			#if (MARIA_TYPE_SEL == MARIA_2) 
			mstWriteByte(GEN_00_REGBK, REGBANKVCF);		// switch bkan 3 VCF
			ucTemp = mstReadByte(BK3_72_COMB_STSC);
			mstWriteByte(GEN_00_REGBK, REGBANKSCALER);		// Switch bank 0 Scaler
			if ((g_ucSystemFlag & NO_INPUT_SIGNAL_FLAG != 0) && (ucTemp & _BIT3 ==0))
			{
				g_ucSystemFlag |= INPUT_TIMING_CHANGE_FLAG;
				return;
			}
			#endif
			
			if ((Display.ucSystemStauts & POWER_STATUS_FLAG)!=0)
			{
				miscTurnOnPanel();
				SET_LED_ON();

				if ((g_ucSystemFlag & FIRST_AC_ON_FLAG) != FALSE)	//20050908 kevin
				{
					g_ucSystemFlag &= ~FIRST_AC_ON_FLAG;	
					osdOsdInitial();
					//osdOSDDrawSourceLable();
				}
			}
			else
			{
				mstPowerManagement(PM_POWER_OFF);
			}
		}
		
	}
}

#if(MARIA_TYPE_SEL == MARIA_1)
void mstSyncVDGainHandler(BIT bFlag)
{
	BYTE ucBank;
	BYTE ucBackup2_04;
	BYTE ucTemp;

	if(tOSDSourcSELSequence[Display.ucSourceSEL] >= VGA)
		return; 					// If input source isn't video singnal, the function don't need to execute.

	if(g_ucVDGainTimer && !bFlag)			// Check timer is over and compel flag
		return;

	//g_ucVDGainTimer = 100;				// Set timer is 100ms

	ucBank = mstReadByte(GEN_00_REGBK);		// Back up register bank
	mstWriteByte(GEN_00_REGBK, REGBANKVFE);	// Switch to Bank 2 VFE

	ucBackup2_04 = mstReadByte(BK2_04_STATUS_MUX);	// Back up register BK2.04h value

	mstWriteByte(BK2_04_STATUS_MUX, 0x08);		// ??

	ucTemp = mstReadByte(BK2_01_STATUS1);		// Read data from BK2.01h

	mstWriteByte(BK2_04_STATUS_MUX, ucBackup2_04);	// Restore register BK2.04h value

	if(/*bFlag ||*/ ((g_ucVDGainPGA == 1)&&(ucTemp < 0x40)))
	{
	// Switch to PGA X 2
	
		g_ucVDGainPGA = 2;
		mstWriteByte( BK2_43_AGC_CTRL1, 0xF4 );	// Manual gain
		mstWriteByte( BK2_40_PGA_CTRL1, 0x51 );	// Set big gain x2
		mstWriteByte( BK2_44_AGC_FINE, 0xC0 );	// Set fine gain
		mstWriteByte( BK2_43_AGC_CTRL1, 0x14 );	// Auto big gain
		mstWriteByte( BK2_14_SOFT_RST, 0x16 );	// Redo fine gain
		mstWriteByte( BK2_14_SOFT_RST, 0x10 );	// Redo fine gain

		g_ucVDGainTimer = 100;			// Set timer is 100ms
	}
	else if ((g_ucVDGainPGA == 2)&&(ucTemp > 0xC0))
	{
	// Switch to PGA X 1
	
		g_ucVDGainPGA = 1;
		mstWriteByte( BK2_43_AGC_CTRL1, 0xF4 );	// Manual gain
		mstWriteByte( BK2_40_PGA_CTRL1, 0x41 );	// Set big gain x1
		mstWriteByte( BK2_44_AGC_FINE, 0x40 );	// Set fine gain
		mstWriteByte( BK2_43_AGC_CTRL1, 0x14 );	// Auto big gain
		mstWriteByte( BK2_14_SOFT_RST, 0x16 );	// Redo fine gain
		mstWriteByte( BK2_14_SOFT_RST, 0x10 );	// Redo fine gain

		g_ucVDGainTimer = 100;			// Set timer is 100ms
	}
	else if (g_ucSystemFlag & INPUT_SIGNAL_STABLE_FLAG)//20050902
	{
		mstWriteByte(BK2_43_AGC_CTRL1, 0xD4);	
		mstWriteByte(BK2_44_AGC_FINE, ucTemp);	
		
		// 20050922  For AGC Fail Patch by seven---------------------------------------
		ucBackup2_04 = mstReadByte(BK2_04_STATUS_MUX);
		mstWriteByte(BK2_04_STATUS_MUX, 0x02);
		ucTemp = mstReadByte(BK2_02_STATUS2); // Sync Height
		mstWriteByte(BK2_04_STATUS_MUX, ucBackup2_04);
		
		if (ucTemp < 0x30)
		{
			mstWriteByte( BK2_14_SOFT_RST, 0x16 );	// Redo fine gain
			mstWriteByte( BK2_14_SOFT_RST, 0x10 );	// Redo fine gain
		}
		// -----------------------------------------------------------------
	}

	mstWriteByte(GEN_00_REGBK, ucBank);
	
}

void mstHTotalCalibrateHandle(void)
{
	BYTE IDATA ucTemp;
	
	if(g_ucHTtuneTimer)
		return;
	
	if((g_ucHTtuneCount == 0) && (g_uwHTtuneValue == 0))
	{
		g_uwHTtuneValue = mstReadWord(BK0_55_HDTOT_H);
	}
	else
	{
		if(g_ucHTtuneCount < 10)
		{
			if(g_uwHTtuneValue != mstReadWord(BK0_55_HDTOT_H))
			{
				g_ucHTtuneCount = 0;
				g_uwHTtuneValue = 0;
			}
			//sysWriteString("Htotal:");
			//sysWriteDec(g_uwHTtuneValue);
			//sysWriteString(tChangeLine);
			//sysWriteString("HTCNT:");
			//sysWriteDec((WORD)g_ucHTtuneCount);
			//sysWriteString(tChangeLine);
		}
		else
		{
			if ((tOSDSourcSELSequence[Display.ucSourceSEL] <= SVIDEO2))
			{
				ucTemp = mstReadByte(BK0_57_OSCTRL1);
				ucTemp &= ~_BIT1;
				//ucTemp |= _BIT0;
				mstWriteByte(BK0_57_OSCTRL1, ucTemp);
			}
		}
		g_ucHTtuneCount++;
		g_ucHTtuneTimer = 20;
	}

}
#endif

//kevin 
void mstPatchFullOddField(void)
{
	mstWriteByte(GEN_00_REGBK, REGBANKSCALER);
	
	if ((mstReadByte(BK0_EF_STATUS2) & _BIT3) == 0x00)
	{
		mstWriteByte(GEN_00_REGBK, REGBANKADC);
		mstWriteByte(BK1_D2_PTC_MODE3, (SET_PTC_MODE3 & 0xFB));
	}
	else
	{
		mstWriteByte(GEN_00_REGBK, REGBANKADC);
		mstWriteByte(BK1_D2_PTC_MODE3, SET_PTC_MODE3);
	}
	
	mstWriteByte(GEN_00_REGBK, REGBANKSCALER);
}

#if 0 //(MARIA_TYPE_SEL == MARIA_2)	//20050930 Antony
void mstVDSetupMode(BOOL bFSC443)
{
	BYTE ucBank;

	ucBank = mstReadByte( GEN_00_REGBK );
	if( bFSC443 ) // PAL-BDGIK
	{
		mstWriteByte( GEN_00_REGBK, REGBANKVFE );
		mstWriteByte( BK2_77, 0x50 ); // AFEC 656_BLANK_MAX
		mstWriteByte( BK2_7B_656_HDEW, 0xFF ); // 656_HDEW
		mstWriteByte( BK2_9D_DPL_NSPL_HIGH, 0x8D ); // Number of samples per line for 656 digital PLL.
		mstWriteByte( BK2_9E_DPL_NSPL_LOW, 0xC0 ); // Number of samples per line for 656 digital PLL.
		mstWriteByte( GEN_00_REGBK, REGBANKVCF );
		mstWriteByte( BK3_12_DEMGAIN, (mstReadByte( BK3_12_DEMGAIN) | _BIT6) ); // Free run counter mode: PAL
		mstWriteByte( BK3_1C, (mstReadByte( BK3_1C) & ~_BIT0 | _BIT1) ); 
	}
	else // NTSC-M
	{
		mstWriteByte( GEN_00_REGBK, REGBANKVFE);
		mstWriteByte( BK2_77, 0x60 ); // AFEC 656_BLANK_MAX
		mstWriteByte( BK2_7B_656_HDEW, 0xC0 ); // 656_HDEW
		mstWriteByte( BK2_9D_DPL_NSPL_HIGH, 0x71 ); // Number of samples per line for 656 digital PLL.
		mstWriteByte( BK2_9E_DPL_NSPL_LOW, 0xA0 ); // Number of samples per line for 656 digital PLL.
		mstWriteByte( GEN_00_REGBK, REGBANKVCF );
		mstWriteByte( BK3_12_DEMGAIN, (mstReadByte( BK3_12_DEMGAIN) & ~ _BIT6) ); // Free run counter mode: PAL
		mstWriteByte( BK3_1C, (mstReadByte( BK3_1C) & ~(_BIT0 + _BIT1)) ); 
	}
	mstWriteByte( GEN_00_REGBK, ucBank );
}
#endif

#if ENABLE_VD_COLOR_DETECT
#if(MARIA_TYPE_SEL == MARIA_2)
void mstVDColorKill(BOOL bColorKill)
{
	BYTE ucBank;
	ucBank = mstReadByte( GEN_00_REGBK );
	mstWriteByte( GEN_00_REGBK, REGBANKVFE);
	if( bColorKill ) // COLOR_OFF
	{
		mstVDDSPWriteByte( 0x20, 0x00 );
		mstVDDSPWriteByte( 0x21, 0x80 );
		mstWriteByte( BK2_23_APLL_TRANGE, mstReadByte( BK2_23_APLL_TRANGE ) | _BIT0);
		mstWriteByte( BK2_27_APL_K2_NORMAL, 0 ); // APL_K2
	}
	else // COLOR return
	{
		mstVDDSPWriteByte( 0x20, 0x00 );
		mstVDDSPWriteByte( 0x21, 0x00 );
		mstWriteByte( BK2_23_APLL_TRANGE, mstReadByte( BK2_23_APLL_TRANGE ) & ~_BIT0);
		mstWriteByte( BK2_27_APL_K2_NORMAL, 0x08 ); // APL_K2
	}
	mstWriteByte( GEN_00_REGBK, ucBank );

}
#else
void mstVDColorKill(BOOL bColorKill)
{
	BYTE ucBank;
	ucBank = mstReadByte( GEN_00_REGBK );
	mstWriteByte( GEN_00_REGBK, REGBANKVCF);
	if( bColorKill )
	{
		mstWriteByte( BK3_11_COMBCFGB , mstReadByte( BK3_11_COMBCFGB ) | _BIT0);
		mstWriteByte(BK3_65_REG_SAT, 0x00 );
	}
	else
	{
		mstWriteByte( BK3_11_COMBCFGB , mstReadByte( BK3_11_COMBCFGB ) & ~_BIT0);
		if((g_ucSyncStatus & PAL_MODE_B) != 0)
			mstWriteByte(BK3_65_REG_SAT, 0x50 ); //20050624 David tune for High frequency green leaves flicker
		else
			mstWriteByte(BK3_65_REG_SAT, 0x80 ); //20050624 David tune for High frequency green leaves flicker
	}
	mstWriteByte( GEN_00_REGBK, ucBank );
}
#endif

void mstVDColorBurstHandler(BYTE ucFlag)
{
	bit bCurColorBurstStatus;
	BYTE ucBank;

	ucBank = mstReadByte( GEN_00_REGBK );

	if( ucFlag & VD_COLOR_BURST_HANDLER_RESET )
	{
		mstVDColorKill(FALSE);
		bCurColorBurstStatus = 1;
		g_bVDColorBurstHandler_LastColorBurstStatus = 1;
		g_ucVDColorBurstHandlerStableCounter = 0xFF;
	}
	else if( g_ucVDColorBurstHandlerTimer == 0 )
	{
		g_ucVDColorBurstHandlerTimer = 40;

#if(MARIA_TYPE_SEL == MARIA_2)
		bCurColorBurstStatus = !(bit)(mstVDDSPReadByte(0xB0)&_BIT0);
#else
		mstWriteByte( GEN_00_REGBK, REGBANKVFE );
		if( (mstReadByte( BK2_02_STATUS2) & 0x0C) == 0x04)		// VD has color burst
			bCurColorBurstStatus = 1;
#endif
		if( bCurColorBurstStatus == g_bVDColorBurstHandler_LastColorBurstStatus )
		{
			if( g_ucVDColorBurstHandlerStableCounter < 0xFF )
				g_ucVDColorBurstHandlerStableCounter ++;
			if( g_ucVDColorBurstHandlerStableCounter == 5 )
			{
				if( bCurColorBurstStatus ) // Has color
				{
					mstVDColorKill(FALSE);
				}
				else // No color
				{
					mstVDColorKill(TRUE);
				}
			}
		}
		else
		{
			g_ucVDColorBurstHandlerStableCounter = 0;
			g_bVDColorBurstHandler_LastColorBurstStatus = bCurColorBurstStatus;
		}
	}
	mstWriteByte( GEN_00_REGBK, ucBank );
}
#endif	// ENABLE_VD_COLOR_DETECT