f632reg.c

NT68521源代码

/*----------------------------------------*/
/* NT68F632 System Register Declare		  */
/* Date : 2002/10/08					  */
/*----------------------------------------*/
#include "F632REG.H"

/* General I/O Port Control Registers */
xdata unsigned char PortA _at_ 0xf000;
xdata unsigned char PortB _at_ 0xf001;
xdata unsigned char PortC _at_ 0xf002;
xdata unsigned char PortD _at_ 0xf003;
xdata unsigned char PortE _at_ 0xf004;
/* GPIO R/W Direction Control */
xdata unsigned char RDPA_REG _at_ 0xf005;
xdata unsigned char RDPB_REG _at_ 0xf006;
xdata unsigned char RDPC_REG _at_ 0xf007;
xdata unsigned char RDPD_REG _at_ 0xf008;
xdata unsigned char RDPE_REG _at_ 0xf009;

/* Watch-Dog Timer */
xdata unsigned char CLRWDT _at_ 0xf00a;

/* A/D Converter */
xdata unsigned char ADC_CON _at_ 0xf00b;             // (-W-) : $00
xdata unsigned char ADC_REG[4] _at_ 0xf00c;  // (-R-) : ADC0 Value

/* PWM D/A Converters */
xdata unsigned char ENPWM_LB _at_ 0xf010;  // (-W-) : Enable PWM01-PWM00
xdata unsigned char ENPWM_HB _at_ 0xf011;  // (-W-) : Enable PWM09-PWM02
xdata unsigned char PWM_REG[10] _at_ 0xf012;

/* DDC Port-0 PB4,PB5 */
xdata unsigned char DDC_CTRL_0 _at_ 0xf01c;
xdata unsigned char DDC_ADDR_0 _at_ 0xf01d;

/* DDC Port-1 PB6,PB7 */
xdata unsigned char DDC_CTRL_1 _at_ 0xf01e;
xdata unsigned char DDC_ADDR_1 _at_ 0xf01f;


/* Interrupt Sources */
xdata unsigned char INT_SRC _at_ 0xf020;

/* External Interrupt */
xdata unsigned char INTEXT_FLG _at_ 0xf021;
xdata unsigned char INTEXT_EN _at_ 0xf022;

/* SyncProcessor */
/* Sync Processor Interrupt */
xdata unsigned char INTHV_FLG _at_ 0xf023;
xdata unsigned char INTHV_EN _at_ 0xf024;

/* Sync Procesor Control Register */
xdata unsigned char SYNC_REG _at_ 0xf025;
xdata unsigned char HVO_REG _at_ 0xf026;
xdata unsigned char HVI_REG _at_ 0xf027;
xdata unsigned char HPW_REG _at_ 0xf028;
xdata unsigned char HFLT_REG _at_ 0xf029;
xdata unsigned char CLMP_REG _at_ 0xf02a;
xdata unsigned char PAT_LT _at_ 0xf02b;
xdata unsigned char PAT_RT _at_ 0xf02c;
xdata unsigned char PAT_UP _at_ 0xf02d;
xdata unsigned char PAT_DN _at_ 0xf02e;
xdata unsigned char HVCNT_CTRL _at_ 0xf02f;

xdata unsigned char HCNT_LB _at_ 0xf030;
xdata unsigned char HCNT_HB _at_ 0xf031;
xdata unsigned char VCNT_LB _at_ 0xf032;
xdata unsigned char VCNT_HB _at_ 0xf033;

/*
SysRegX HCNT _at_ 0xf03b;
SysRegX VCNT _at_ 0xf03d;
*/

xdata unsigned char DCNT_LB _at_ 0xf034;
xdata unsigned char DCNT_HB _at_ 0xf035;
xdata unsigned char LCNT_LB _at_ 0xf036;
xdata unsigned char LCNT_HB _at_ 0xf037;
xdata unsigned char MUTE_CTRL _at_ 0xf038;

/*I2C Port-0 (PB4,PB5) Control Register*/
xdata unsigned char IIC0_CFG _at_ 0xf039;
xdata unsigned char IIC0_STATUS _at_ 0xf03a;
xdata unsigned char IIC0_INT_EN _at_ 0xf03b;
xdata unsigned char IIC0INT_FLG _at_ 0xf03c;
xdata unsigned char IIC0INT_CLR _at_ 0xf03d;
xdata unsigned char IIC0_TXDATA _at_ 0xf03e;
xdata unsigned char IIC0_RXDATA _at_ 0xf03f;
xdata unsigned char IIC0_ADDR _at_ 0xf040;

/*I2C Port-1 (PB6,PB7) Control Register*/
xdata unsigned char IIC1_CFG _at_ 0xf041;
xdata unsigned char IIC1_STATUS _at_ 0xf042;
xdata unsigned char IIC1_INT_EN _at_ 0xf043;
xdata unsigned char IIC1INT_FLG _at_ 0xf044;
xdata unsigned char IIC1INT_CLR _at_ 0xf045;
xdata unsigned char IIC1_TXDATA _at_ 0xf046;
xdata unsigned char IIC1_RXDATA _at_ 0xf047;
xdata unsigned char IIC1_ADDR _at_ 0xf048;

/* Flash Memory */
xdata unsigned char ISP_REG _at_ 0xf049;
xdata unsigned char FLASH_BUF _at_ 0xf04a;

xdata unsigned char DDCPtr0 _at_ 0xF800;					//  (R/W) : $07 
xdata unsigned char DDCPtr1 _at_ 0xF900;					//  (R/W) : $07