📄 exp_06.std
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F0 == 0
RTCC == 1
PC == 2
STATUS == 3
IND == 4
P5 == 5
P6 == 6
P7 == 7
C_WDT == 0XE
R_ACC == 0X10
R_ACC2 == 0X11
R_BIT == 0X12
P_LED == 0X6
ORG 0
0000 0080 MAIN CLRA
0001 000E IOW C_WDT
0002 1807 MOV A, @7
0003 0002 CONTW
0004 00C5 CLR P5
0005 00C6 CLR P6
0006 18FF MOV A, @255
0007 0005 IOW P5
0008 0080 CLRA
0009 0006 IOW P6
000A 1811 MOV A, @17
000B 0050 MOV R_ACC, A
000C 0410 _D000 MOV A, R_ACC
000D 0044 MOV IND, A
000E 00C0 CLR F0
000F 0550 INC R_ACC
0010 1816 MOV A, @22
0011 0310 XOR A, R_ACC
0012 0E83 JBS 3, 2
0013 140C JMP _D000
0014 1801 MOV A, @1
0015 0046 MOV P_LED, A
0016 102B LOOP CALL DELAY
0017 0C12 JBC R_BIT, 0
0018 1422 JMP _I002
0019 0FC6 JBS P_LED, 7
001A 141F JMP _I000
001B 0A12 BS R_BIT, 0
001C 0803 BC 3, 0
001D 0646 RRC P_LED
001E 1421 JMP _I001
001F 0A03 _I000 BS 3, 0
0020 06C6 RLC P_LED
0021 142A _I001 JMP _I004
0022 0C46 _I002 JBC P_LED, 1
0023 1428 JMP _I003
0024 0812 BC R_BIT, 0
0025 0A03 BS 3, 0
0026 06C6 RLC P_LED
0027 142A JMP _I004
0028 0803 _I003 BC 3, 0
0029 0646 RRC P_LED
002A 1416 _I004 JMP LOOP
002B 00D0 DELAY CLR R_ACC
002C 00D1 CLR R_ACC2
002D 05D0 _D001 DJZ R_ACC
002E 142D JMP _D001
002F 05D1 DJZ R_ACC2
0030 142D JMP _D001
0031 0012 RET
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