📄 fet430_wdt01.s43
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;******************************************************************************
; MSP-FET430P430 Demo - WDT Toggle P5.1 Interval overflow ISR, DCO SMCLK
;
; Description; Toggle P5.1 using software timed by the WDT ISR. Toggle rate
; is approximately 31ms based on default ~ 1.048MHz DCO/SMCLK clock source
; used in this example for the WDT.
; ACLK = n/a, MCLK = SMCLK = default DCO ~ 1.048MHz
;
; MSP430FG439
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; | P5.1|-->LED
;
; M.Buccini
; Texas Instruments, Inc
; June 2004
;******************************************************************************
#include "msp430xG43x.h"
;------------------------------------------------------------------------------
ORG 01100h ; Program Start
;------------------------------------------------------------------------------
RESET mov.w #0A00h,SP ; Initialize stack pointer
SetupWDT mov.w #WDT_MDLY_32,&WDTCTL ; WDT ~31ms interval timer
bis.b #WDTIE,&IE1 ; Enable WDT interrupt
SetupP5 bis.b #002h,&P5DIR ; P5.1 output
;
Mainloop bis.w #CPUOFF+GIE,SR ; Enter LPM0, enable interrupts
nop ; Required only for debugger
;
;------------------------------------------------------------------------------
WDT_ISR; Toggle P5.1
;------------------------------------------------------------------------------
xor.b #002h,&P5OUT ; Toggle P5.1
reti ;
;
;-----------------------------------------------------------------------------
; Interrupt Vectors Used MSP430x4xx
;-----------------------------------------------------------------------------
ORG 0FFFEh ; MSP430 RESET Vector
DW RESET ;
ORG 0FFF4h ; WDT Vector
DW WDT_ISR ;
END
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