📄 music.lst
字号:
__start:
__text_start:
0015 E5CF LDI R28,0x5F
0016 E0D4 LDI R29,4
0017 BFCD OUT 0x3D,R28
0018 BFDE OUT 0x3E,R29
0019 51C0 SUBI R28,0x10
001A 40D0 SBCI R29,0
001B EA0A LDI R16,0xAA
001C 8308 STD Y+0,R16
001D 2400 CLR R0
001E E6E4 LDI R30,0x64
001F E0F0 LDI R31,0
0020 E010 LDI R17,0
0021 36E4 CPI R30,0x64
0022 07F1 CPC R31,R17
0023 F011 BEQ 0x0026
0024 9201 ST R0,Z+
0025 CFFB RJMP 0x0021
0026 8300 STD Z+0,R16
0027 E2E6 LDI R30,0x26
0028 E0F0 LDI R31,0
0029 E6A0 LDI R26,0x60
002A E0B0 LDI R27,0
002B E010 LDI R17,0
002C 32EA CPI R30,0x2A
002D 07F1 CPC R31,R17
002E F021 BEQ 0x0033
002F 95C8 LPM
0030 9631 ADIW R30,1
0031 920D ST R0,X+
0032 CFF9 RJMP 0x002C
0033 D039 RCALL _main
_exit:
0034 CFFF RJMP _exit
FILE: C:\DOCUME~1\asdf\MYDOCU~1\11111111111\music.c
(0001) #include <iom8v.h>
(0002) #include <macros.h>
(0003) #include "do_le_mi.h"
(0004) int T=0xFF00;
(0005) int N=0xFF00;
(0006)
(0007) void GPIO_INIT(void)
(0008) {
(0009) DDRB=0x00; //定义 PB为输入
_GPIO_INIT:
0035 2422 CLR R2
0036 BA27 OUT 0x17,R2
(0010) //SFIOR&=~BIT(PUD); // SFIOR寄存器的上拉电阻控制位PUD置0，
(0011) PORTB|=0xFF; // 将 PORT 置1，满足上拉电阻的另一个条件
0037 B388 IN R24,0x18
0038 6F8F ORI R24,0xFF
0039 BB88 OUT 0x18,R24
(0012) DDRC=0x01; //定义 PC0为输出
003A E081 LDI R24,1
003B BB84 OUT 0x14,R24
(0013) //PORTC=~BIT(0); // PC0 输出高电平
(0014) PORTC=0xFF; // PC0 输出高电平
003C EF8F LDI R24,0xFF
003D BB85 OUT 0x15,R24
(0015) DDRD=0x80;
003E E880 LDI R24,0x80
003F BB81 OUT 0x11,R24
(0016) PORTD=0x80;
0040 BB82 OUT 0x12,R24
(0017)
(0018)
(0019) }
0041 9508 RET
(0020) void timer1_init(void)
(0021) {
(0022) TCCR1B = 0x00; //stop
_timer1_init:
0042 2422 CLR R2
0043 BC2E OUT 0x2E,R2
(0023) TCNT1=65535-T;
0044 90200060 LDS R2,0x60
0046 90300061 LDS R3,0x61
0048 EF8F LDI R24,0xFF
0049 EF9F LDI R25,0xFF
004A 1982 SUB R24,R2
004B 0993 SBC R25,R3
004C BD9D OUT 0x2D,R25
004D BD8C OUT 0x2C,R24
(0024) TCCR1A = 0x00;//can be ignored
004E 2422 CLR R2
004F BC2F OUT 0x2F,R2
(0025) TCCR1B = 0x01; //start Timer devide 1
0050 E081 LDI R24,1
0051 BD8E OUT 0x2E,R24
(0026) //TCCR1B = 0x04; //start Timer devide 256
(0027) }
0052 9508 RET
_timer1_ovf_isr:
0053 922A ST R2,-Y
0054 923A ST R3,-Y
0055 938A ST R24,-Y
0056 939A ST R25,-Y
0057 B62F IN R2,0x3F
0058 922A ST R2,-Y
(0028) #pragma interrupt_handler timer1_ovf_isr:9
(0029) void timer1_ovf_isr(void)
(0030) {
(0031) TCNT1=65535-T;
0059 90200060 LDS R2,0x60
005B 90300061 LDS R3,0x61
005D EF8F LDI R24,0xFF
005E EF9F LDI R25,0xFF
005F 1982 SUB R24,R2
0060 0993 SBC R25,R3
0061 BD9D OUT 0x2D,R25
0062 BD8C OUT 0x2C,R24
(0032) PORTC=~PORTC;
0063 B225 IN R2,0x15
0064 9420 COM R2
0065 BA25 OUT 0x15,R2
(0033) }
0066 9029 LD R2,Y+
0067 BE2F OUT 0x3F,R2
0068 9199 LD R25,Y+
0069 9189 LD R24,Y+
006A 9039 LD R3,Y+
006B 9029 LD R2,Y+
006C 9518 RETI
(0034) void main(void)
(0035)
(0036) {
(0037) char x;
(0038) int y;
(0039) //int a,b;
(0040) //开中断
(0041) CLI(); //disable all interrupts
_main:
x --> R20
y --> R22
006D 94F8 BCLR 7
(0042) OSCCAL=0XBA;
006E EB8A LDI R24,0xBA
006F BF81 OUT 0x31,R24
(0043) MCUCR = 0x00;
0070 2422 CLR R2
0071 BE25 OUT 0x35,R2
(0044) GICR = 0x00;
0072 BE2B OUT 0x3B,R2
(0045) TIMSK=0x04;
0073 E084 LDI R24,4
0074 BF89 OUT 0x39,R24
(0046) timer1_init();
0075 DFCC RCALL _timer1_init
(0047) SEI(); //re-enable interrupts
0076 9478 BSET 7
(0048) GPIO_INIT();
0077 DFBD RCALL _GPIO_INIT
0078 C0CC RJMP 0x0145
(0049)
(0050)
(0051) while(1)
(0052) {
(0053)
(0054) x=read_key();
0079 D0DE RCALL _read_key
007A 2F40 MOV R20,R16
(0055) //x=~0xFF01;
(0056) y=(int)x;
007B 2F64 MOV R22,R20
007C 2777 CLR R23
(0057)
(0058) switch(y)
007D 3D6F CPI R22,0xDF
007E E0E0 LDI R30,0
007F 077E CPC R23,R30
0080 F409 BNE 0x0082
0081 C069 RJMP 0x00EB
0082 ED8F LDI R24,0xDF
0083 E090 LDI R25,0
0084 1786 CP R24,R22
0085 0797 CPC R25,R23
0086 F104 BLT 0x00A7
0087 3B6D CPI R22,0xBD
0088 E0E0 LDI R30,0
0089 077E CPC R23,R30
008A F409 BNE 0x008C
008B C07B RJMP 0x0107
008C 3B6F CPI R22,0xBF
008D E0E0 LDI R30,0
008E 077E CPC R23,R30
008F F409 BNE 0x0091
0090 C061 RJMP 0x00F2
0091 EB8F LDI R24,0xBF
0092 E090 LDI R25,0
0093 1786 CP R24,R22
0094 0797 CPC R25,R23
0095 F05C BLT 0x00A1
0096 376E CPI R22,0x7E
0097 E0E0 LDI R30,0
0098 077E CPC R23,R30
0099 F409 BNE 0x009B
009A C065 RJMP 0x0100
009B 376F CPI R22,0x7F
009C E0E0 LDI R30,0
009D 077E CPC R23,R30
009E F409 BNE 0x00A0
009F C059 RJMP 0x00F9
00A0 C07B RJMP 0x011C
00A1 3D6B CPI R22,0xDB
00A2 E0E0 LDI R30,0
00A3 077E CPC R23,R30
00A4 F409 BNE 0x00A6
00A5 C068 RJMP 0x010E
00A6 C075 RJMP 0x011C
00A7 3E6F CPI R22,0xEF
00A8 E0E0 LDI R30,0
00A9 077E CPC R23,R30
00AA F409 BNE 0x00AC
00AB C038 RJMP 0x00E4
00AC EE8F LDI R24,0xEF
00AD E090 LDI R25,0
00AE 1786 CP R24,R22
00AF 0797 CPC R25,R23
00B0 F034 BLT 0x00B7
00B1 3E67 CPI R22,0xE7
00B2 E0E0 LDI R30,0
00B3 077E CPC R23,R30
00B4 F409 BNE 0x00B6
00B5 C05F RJMP 0x0115
00B6 C065 RJMP 0x011C
00B7 3F67 CPI R22,0xF7
00B8 E0E0 LDI R30,0
00B9 077E CPC R23,R30
00BA F111 BEQ 0x00DD
00BB 3F6B CPI R22,0xFB
00BC E0E0 LDI R30,0
00BD 077E CPC R23,R30
00BE F0B9 BEQ 0x00D6
00BF 3F6D CPI R22,0xFD
00C0 E0E0 LDI R30,0
00C1 077E CPC R23,R30
00C2 F061 BEQ 0x00CF
00C3 3F6E CPI R22,0xFE
00C4 E0E0 LDI R30,0
00C5 077E CPC R23,R30
00C6 F009 BEQ 0x00C8
00C7 C054 RJMP 0x011C
(0059) {
(0060) case ~0xFF01:N=L7;break;
00C8 EF84 LDI R24,0xF4
00C9 E093 LDI R25,3
00CA 93900063 STS 0x63,R25
00CC 93800062 STS 0x62,R24
00CE C056 RJMP 0x0125
(0061) case ~0xFF02:N=M1;break;
00CF EB8C LDI R24,0xBC
00D0 E093 LDI R25,3
00D1 93900063 STS 0x63,R25
00D3 93800062 STS 0x62,R24
00D5 C04F RJMP 0x0125
(0062) case ~0xFF04:N=M2;break;
00D6 E48A LDI R24,0x4A
00D7 E093 LDI R25,3
00D8 93900063 STS 0x63,R25
00DA 93800062 STS 0x62,R24
00DC C048 RJMP 0x0125
(0063) case ~0xFF08:N=M3;break;
00DD EF86 LDI R24,0xF6
00DE E092 LDI R25,2
00DF 93900063 STS 0x63,R25
00E1 93800062 STS 0x62,R24
00E3 C041 RJMP 0x0125
(0064) case ~0xFF10:N=M4;break;
00E4 EC8C LDI R24,0xCC
00E5 E092 LDI R25,2
00E6 93900063 STS 0x63,R25
00E8 93800062 STS 0x62,R24
00EA C03A RJMP 0x0125
(0065) case ~0xFF20:N=M5;break;
00EB E78D LDI R24,0x7D
00EC E092 LDI R25,2
00ED 93900063 STS 0x63,R25
00EF 93800062 STS 0x62,R24
00F1 C033 RJMP 0x0125
(0066) case ~0xFF40:N=M6;break;
00F2 E388 LDI R24,0x38
00F3 E092 LDI R25,2
00F4 93900063 STS 0x63,R25
00F6 93800062 STS 0x62,R24
00F8 C02C RJMP 0x0125
(0067) case ~0xFF80:N=M7;break;
00F9 EF8A LDI R24,0xFA
00FA E091 LDI R25,1
00FB 93900063 STS 0x63,R25
00FD 93800062 STS 0x62,R24
00FF C025 RJMP 0x0125
(0068) case ~0xFF81:N=L5;break;
0100 EF8B LDI R24,0xFB
0101 E094 LDI R25,4
0102 93900063 STS 0x63,R25
0104 93800062 STS 0x62,R24
0106 C01E RJMP 0x0125
(0069) case ~0xFF42:N=L6;break;
0107 E780 LDI R24,0x70
0108 E094 LDI R25,4
0109 93900063 STS 0x63,R25
010B 93800062 STS 0x62,R24
010D C017 RJMP 0x0125
(0070) case ~0xFF24:N=H1;break;
010E ED8E LDI R24,0xDE
010F E091 LDI R25,1
0110 93900063 STS 0x63,R25
0112 93800062 STS 0x62,R24
0114 C010 RJMP 0x0125
(0071) case ~0xFF18:N=H2;break;
0115 EA89 LDI R24,0xA9
0116 E091 LDI R25,1
0117 93900063 STS 0x63,R25
0119 93800062 STS 0x62,R24
011B C009 RJMP 0x0125
(0072) default:N=EM;TCCR1B=0x00;PORTC=0x00;
011C EE88 LDI R24,0xE8
011D E093 LDI R25,3
011E 93900063 STS 0x63,R25
0120 93800062 STS 0x62,R24
0122 2422 CLR R2
0123 BC2E OUT 0x2E,R2
0124 BA25 OUT 0x15,R2
(0073) /*
(0074) case ~0xFF01:N=400;break;
(0075) case ~0xFF02:N=401;break;
(0076) case ~0xFF04:N=402;break;
(0077) case ~0xFF08:N=403;break;
(0078) case ~0xFF10:N=404;break;
(0079) case ~0xFF20:N=405;break;
(0080) case ~0xFF40:N=406;break;
(0081) case ~0xFF80:N=407;break;
(0082) case ~0xFF81:N=408;break;
(0083) case ~0xFF42:N=409;break;
(0084) case ~0xFF24:N=410;break;
(0085) case ~0xFF18:N=411;break;
(0086) default:N=399;TCCR1B=0x00;PORTC=0x00;
(0087) */
(0088) }
(0089) if (T==N)
0125 90200062 LDS R2,0x62
0127 90300063 LDS R3,0x63
0129 90400060 LDS R4,0x60
012B 90500061 LDS R5,0x61
012D 1442 CP R4,R2
012E 0453 CPC R5,R3
012F F409 BNE 0x0131
(0090) ;
0130 C014 RJMP 0x0145
(0091) else
(0092) {
(0093) T=N;
0131 90200062 LDS R2,0x62
0133 90300063 LDS R3,0x63
0135 92300061 STS 0x61,R3
0137 92200060 STS 0x60,R2
(0094) TCCR1B=0x01;
0139 E081 LDI R24,1
013A BD8E OUT 0x2E,R24
(0095) TCNT1=65535-T;
013B 90200060 LDS R2,0x60
013D 90300061 LDS R3,0x61
013F EF8F LDI R24,0xFF
0140 EF9F LDI R25,0xFF
0141 1982 SUB R24,R2
0142 0993 SBC R25,R3
0143 BD9D OUT 0x2D,R25
0144 BD8C OUT 0x2C,R24
0145 CF33 RJMP 0x0079
(0096) }
(0097)
(0098)
(0099)
(0100) }
(0101) }
0146 9508 RET
FILE: C:\DOCUME~1\asdf\MYDOCU~1\11111111111\READ_KEY2.c
(0001) #include<iom8v.h>
(0002) #include<macros.h>
(0003) void delay_1ms(void)
(0004) {
(0005) int i,j;
(0006) for(i=0;i<10;i++)
_delay_1ms:
i --> R16
j --> R18
0147 2700 CLR R16
0148 2711 CLR R17
(0007) for(j=0;j<100;j++);
0149 2722 CLR R18
014A 2733 CLR R19
014B 5F2F SUBI R18,0xFF
014C 4F3F SBCI R19,0xFF
014D 3624 CPI R18,0x64
014E E0E0 LDI R30,0
014F 073E CPC R19,R30
0150 F3D4 BLT 0x014B
0151 5F0F SUBI R16,0xFF
0152 4F1F SBCI R17,0xFF
0153 300A CPI R16,0xA
0154 E0E0 LDI R30,0
0155 071E CPC R17,R30
0156 F394 BLT 0x0149
(0008) }
0157 9508 RET
_read_key:
key --> R20
a --> Y+0
i --> R22
0158 D040 RCALL push_gset2
0159 9725 SBIW R28,5
(0009) char read_key(void)
(0010) {
(0011) int i;
(0012) char a[5],key;
(0013) for(i=0;i<5;i++)
015A 2766 CLR R22
015B 2777 CLR R23
(0014) {
(0015) delay_1ms();
015C DFEA RCALL _delay_1ms
(0016) a[i]=PINB;
015D 01CE MOVW R24,R28
015E 01FB MOVW R30,R22
015F 0FE8 ADD R30,R24
0160 1FF9 ADC R31,R25
0161 B226 IN R2,0x16
0162 8220 STD Z+0,R2
0163 5F6F SUBI R22,0xFF
0164 4F7F SBCI R23,0xFF
0165 3065 CPI R22,5
0166 E0E0 LDI R30,0
0167 077E CPC R23,R30
0168 F39C BLT 0x015C
(0017) }
(0018) if((a[0]==a[1])&&(a[1]==a[2])&&(a[2]==a[3])&&(a[3]==a[4]))
0169 8029 LDD R2,Y+1
016A 8038 LDD R3,Y+0
016B 1432 CP R3,R2
016C F471 BNE 0x017B
016D 802A LDD R2,Y+2
016E 8039 LDD R3,Y+1
016F 1432 CP R3,R2
0170 F451 BNE 0x017B
0171 802B LDD R2,Y+3
0172 803A LDD R3,Y+2
0173 1432 CP R3,R2
0174 F431 BNE 0x017B
0175 802C LDD R2,Y+4
0176 803B LDD R3,Y+3
0177 1432 CP R3,R2
0178 F411 BNE 0x017B
(0019) key=a[4];
0179 2D42 MOV R20,R2
017A C001 RJMP 0x017C
(0020) else
(0021) key=0xFF;
017B EF4F LDI R20,0xFF
(0022) return key;
FILE: <library>
017C 2F04 MOV R16,R20
017D 9625 ADIW R28,5
017E D001 RCALL pop_gset2
017F 9508 RET
pop_gset2:
0180 E0E2 LDI R30,2
0181 C004 RJMP pop
push_gset1:
0182 935A ST R21,-Y
0183 934A ST R20,-Y
0184 9508 RET
pop_gset1:
0185 E0E1 LDI R30,1
pop:
0186 9149 LD R20,Y+
0187 9159 LD R21,Y+
0188 FDE0 SBRC R30,0
0189 9508 RET
018A 9169 LD R22,Y+
018B 9179 LD R23,Y+
018C FDE1 SBRC R30,1
018D 9508 RET
018E 90A9 LD R10,Y+
018F 90B9 LD R11,Y+
0190 FDE2 SBRC R30,2
0191 9508 RET
0192 90C9 LD R12,Y+
0193 90D9 LD R13,Y+
0194 FDE3 SBRC R30,3
0195 9508 RET
0196 90E9 LD R14,Y+
0197 90F9 LD R15,Y+
0198 9508 RET
push_gset2:
0199 937A ST R23,-Y
019A 936A ST R22,-Y
019B CFE6 RJMP push_gset1
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