_primary.vhd

arm7的IP软核代码

library verilog;
use verilog.vl_types.all;
entity ALUShell is
    port(
        out_ALUWriteEnable: out    vl_logic;
        out_ALUWriteBus : out    vl_logic_vector(31 downto 0);
        out_CPSR        : out    vl_logic_vector(31 downto 0);
        out_SPSR        : out    vl_logic_vector(31 downto 0);
        out_ALUTargetRegister: out    vl_logic_vector(7 downto 0);
        out_SimpleALUResult: out    vl_logic_vector(31 downto 0);
        out_SimpleALUTargetRegister: out    vl_logic_vector(7 downto 0);
        out_MEMType     : out    vl_logic_vector(7 downto 0);
        out_MEMTargetRegister: out    vl_logic_vector(7 downto 0);
        out_SimpleMEMType: out    vl_logic_vector(7 downto 0);
        out_SimpleMEMTargetRegister: out    vl_logic_vector(7 downto 0);
        out_StoredValue : out    vl_logic_vector(31 downto 0);
        out_ALUPSRType  : out    vl_logic_vector(7 downto 0);
        out_MEMPSRType  : out    vl_logic_vector(7 downto 0);
        out_IsLoadToPC  : out    vl_logic;
        out_IfChangeState: out    vl_logic;
        out_ChangeStateAction: out    vl_logic_vector(4 downto 0);
        out_MEMStoreDelayBranchTarget: out    vl_logic;
        out_MEMDelayBranch: out    vl_logic;
        out_MemAccessUserBankRegister: out    vl_logic;
        in_ALUEnable    : in     vl_logic;
        in_ALUType      : in     vl_logic_vector(7 downto 0);
        in_ALULeftRegister: in     vl_logic_vector(7 downto 0);
        in_ALURightRegister: in     vl_logic_vector(7 downto 0);
        in_ALUThirdRegister: in     vl_logic_vector(7 downto 0);
        in_ALULeftFromImm: in     vl_logic;
        in_ALURightFromImm: in     vl_logic;
        in_ALUThirdFromImm: in     vl_logic;
        in_CPSRFromImm  : in     vl_logic;
        in_SPSRFromImm  : in     vl_logic;
        in_ALURightShiftType: in     vl_logic_vector(1 downto 0);
        in_ALULeftReadBus: in     vl_logic_vector(31 downto 0);
        in_ALURightReadBus: in     vl_logic_vector(31 downto 0);
        in_ALUThirdReadBus: in     vl_logic_vector(31 downto 0);
        in_ALUCPSRReadBus: in     vl_logic_vector(31 downto 0);
        in_ALUSPSRReadBus: in     vl_logic_vector(31 downto 0);
        in_ALUTargetRegister: in     vl_logic_vector(7 downto 0);
        in_SimpleALUType: in     vl_logic_vector(7 downto 0);
        in_SimpleALUTargetRegister: in     vl_logic_vector(7 downto 0);
        in_ALUMisc      : in     vl_logic_vector(31 downto 0);
        in_ALUPSRType   : in     vl_logic_vector(7 downto 0);
        in_NextAddressGoWithInstruction2ALU: in     vl_logic_vector(31 downto 0);
        in_MEMEnable    : in     vl_logic;
        in_MEMType      : in     vl_logic_vector(7 downto 0);
        in_MEMTargetRegister: in     vl_logic_vector(7 downto 0);
        in_SimpleMEMType: in     vl_logic_vector(7 downto 0);
        in_SimpleMEMTargetRegister: in     vl_logic_vector(7 downto 0);
        in_MEMPSRType   : in     vl_logic_vector(7 downto 0);
        in_MEMWriteEnable: in     vl_logic;
        in_MEMWriteResult: in     vl_logic_vector(31 downto 0);
        in_MEMTargetRegister2WB: in     vl_logic_vector(7 downto 0);
        in_SimpleMEMResult: in     vl_logic_vector(31 downto 0);
        in_SimpleMEMTargetRegister2WB: in     vl_logic_vector(7 downto 0);
        in_MEMPSRType2WB: in     vl_logic_vector(7 downto 0);
        in_MEMCPSR2WB   : in     vl_logic_vector(31 downto 0);
        in_MEMSPSR2WB   : in     vl_logic_vector(31 downto 0);
        ALUCombResult   : in     vl_logic_vector(31 downto 0);
        in_Carry        : in     vl_logic;
        in_Zero         : in     vl_logic;
        in_Neg          : in     vl_logic;
        in_Overflow     : in     vl_logic;
        ALUComb_ALUType : out    vl_logic_vector(7 downto 0);
        ALUComb_LeftOperand: out    vl_logic_vector(31 downto 0);
        ALUComb_RightOperand: out    vl_logic_vector(31 downto 0);
        ALUComb_ThirdOperand: out    vl_logic_vector(31 downto 0);
        ALUComb_RightOperandShiftType: out    vl_logic_vector(1 downto 0);
        ALUComb_RightOperandShiftCount: out    vl_logic_vector(4 downto 0);
        ALUComb_ShiftCountInReg: out    vl_logic;
        ALUComb_ShiftCountHigh3Bit: out    vl_logic_vector(2 downto 0);
        ALUComb_Operand2IsReg: out    vl_logic;
        ALUComb_Carry   : out    vl_logic;
        ALUComb_Neg     : out    vl_logic;
        ALUComb_Overflow: out    vl_logic;
        ALUComb_Zero    : out    vl_logic;
        out_ChangePC    : out    vl_logic;
        out_NewPC       : out    vl_logic_vector(31 downto 0);
        out_ALUOwnCanGo : out    vl_logic;
        in_MEMCanGo     : in     vl_logic;
        in_MEMChangePC  : in     vl_logic;
        in_ThumbState   : in     vl_logic;
        clock           : in     vl_logic;
        reset           : in     vl_logic
    );
end ALUShell;