mtv230.c

mtv230 的源程序,供大家参考.

#include "Globe.h"

BYTE xdata byM230_PadMode1  _at_ 0xF2B; // HIICE IIICE HVE HclpE - - FclkE P62E
BYTE xdata byM230_PadMode2  _at_ 0xF2C; // DA3E  DA2E DA1E DA0E AD3E AD2E AD1E AD0E
BYTE xdata byM230_PadMode3  _at_ 0xF2D; // P47oe P46oe P45oe P44oe P43oe P42oe P41oe P40oe
BYTE xdata byM230_PadMode4  _at_ 0xF2E; // P57oe P56oe P55oe P54oe P53oe P52oe P51oe P50oe
BYTE xdata byM230_Option1   _at_ 0xF2F; // PWMF DIV253 SlvAbs1 SlvAbs0 ENSCL Msel MIICF1 MIICF0
//I/O ports
BYTE xdata byM230_Port40    _at_ 0xF30;
BYTE xdata byM230_Port41    _at_ 0xF31;
BYTE xdata byM230_Port42    _at_ 0xF32;
BYTE xdata byM230_Port43    _at_ 0xF33;
BYTE xdata byM230_Port44    _at_ 0xF34;
BYTE xdata byM230_Port45    _at_ 0xF35;
BYTE xdata byM230_Port46    _at_ 0xF36;
BYTE xdata byM230_Port47    _at_ 0xF37;

BYTE xdata byM230_Port50    _at_ 0xF38;
BYTE xdata byM230_Port51    _at_ 0xF39;
BYTE xdata byM230_Port52    _at_ 0xF3A;
BYTE xdata byM230_Port53    _at_ 0xF3B;
BYTE xdata byM230_Port54    _at_ 0xF3C;
BYTE xdata byM230_Port55    _at_ 0xF3D;
BYTE xdata byM230_Port56    _at_ 0xF3E;
BYTE xdata byM230_Port57    _at_ 0xF3F;
BYTE xdata byM230_Port60    _at_ 0xF28;
BYTE xdata byM230_Port61    _at_ 0xF29;
BYTE xdata byM230_Port62    _at_ 0xF2A;
// define MTV230M's PWM DAC register
BYTE xdata byM230_DA0	    _at_ 0xF20; // pulse width of PWM DAC0
BYTE xdata byM230_DA1	    _at_ 0xF21;
BYTE xdata byM230_DA2	    _at_ 0xF22;
BYTE xdata byM230_DA3	    _at_ 0xF23;
//define MTV230M's H/V Sync processor register
BYTE xdata byM230_HVSTUS    _at_ 0xF40; // CVpre - Hpol Vpol Hpre Vpre Hiff Voff
#define byM230_HVCTR0 byM230_HVSTUS
//BYTE xdata byM230_HVCTR0    _at_ 0xF40;
BYTE xdata byM230_HCNTH     _at_ 0xF41; // Hovf - HF13 HF12 HF11 HF10 HF9 HF8
BYTE xdata byM230_HCNTL     _at_ 0xF42; // HF7 HF6 HF5 HF4 HF3 HF2 HF1 HF0
BYTE xdata byM230_VCNTH     _at_ 0xF43; // Vvof - - - VF11 VF10 VF9 VF8
//#define byM230_HVCTR3 byM230_VCNTH
BYTE xdata byM230_VCNTL     _at_ 0xF44; // VF7 VF6 VF5 VF4 VF3 VF2 VF1 VF0
//#define byM230_HVCTR4 byM230_VCNTL
BYTE xdata byM230_INTFLG    _at_ 0xF48; // HPRchg VPRchg HPLchg VPLchg HFchg VFchg - Vsync
BYTE xdata byM230_INTEN     _at_ 0xF49; // EHPR EVPR EHPL EVPL EHF EVF - EVsync
//define MTV230's DDC&IIC's control
BYTE xdata byM230_IIC_CTR         _at_ 0xF00; // IIC interface control
BYTE xdata byM230_IIC_STUS1       _at_ 0xF01; // IIC interface status
BYTE xdata byM230_IIC_STUS2       _at_ 0xF02;
BYTE xdata byM230_IIC_INTFLG	    _at_ 0xF03; // interrupt flag 
BYTE xdata byM230_IIC_INTEN	    _at_ 0xF04; // interrupt enable
BYTE xdata byM230_IIC_MBUF	       _at_ 0xF05; // master IIC data shiftregister
BYTE xdata byM230_IIC_TXRCABUF    _at_ 0xF06; // slave A IIC receive/transmit buffer 
BYTE xdata byM230_IIC_SLVAADR     _at_ 0xF07; // ENSlvA  slave A IIC address
BYTE xdata byM230_IIC_TXRCBBUF    _at_ 0xF08; // slave B IIC receive/transmit buffer
BYTE xdata byM230_IIC_SLVBADR     _at_ 0xF09; // ENSlvB  slave B IIC address
//BYTE xdata byM230_IIC_DBUF      _at_ 0xF0A;
// ISP
BYTE xdata byM230_ISPSLV         _at_ 0xF0B; // ISP slave address
BYTE xdata byM230_ISPEN          _at_ 0xF0C; // write 0x93H to enable ISP mode
//define MTV230's A/D converter
BYTE xdata byM230_WDT	    _at_ 0xF18; // WEN WCLR - - - WDT2 WDT1 WDT0
//define OSD register
BYTE xdata byM230_OSDRA 	     	_at_ 0xFA0;
BYTE xdata byM230_OSDCA  	     	_at_ 0xFA1;
BYTE xdata byM230_OSDDT0  	      _at_ 0xFA2;
BYTE xdata byM230_OSDDT1  	      _at_ 0xFA3;
//BYTE xdata byM230_WinReg[12]     _at_ 0xFC0;
BYTE xdata byM230_W1ROW          _at_ 0xFC0;
BYTE xdata byM230_W1COL1         _at_ 0xFC1;
BYTE xdata byM230_W1COL2         _at_ 0xFC2;
BYTE xdata byM230_W2ROW          _at_ 0xFC3;
BYTE xdata byM230_W2COL1         _at_ 0xFC4;
BYTE xdata byM230_W2COL2         _at_ 0xFC5;
BYTE xdata byM230_W3ROW          _at_ 0xFC6;
BYTE xdata byM230_W3COL1         _at_ 0xFC7;
BYTE xdata byM230_W3COL2         _at_ 0xFC8;
BYTE xdata byM230_W4ROW          _at_ 0xFC9;
BYTE xdata byM230_W4COL1         _at_ 0xFCA;
BYTE xdata byM230_W4COL2         _at_ 0xFCB;
BYTE xdata byM230_VERTD  	     	_at_ 0xFCC;
BYTE xdata byM230_HORD           _at_ 0xFCD;
BYTE xdata byM230_CH 		     	_at_ 0xFCE;
BYTE xdata byM230_RSPACE  	      _at_ 0xFD0;
BYTE xdata byM230_OSDCON  	      _at_ 0xFD1;
BYTE xdata byM230_OSDCON1  	  	_at_ 0xFD2;
BYTE xdata byM230_CHSC  	      _at_ 0xFD3;
BYTE xdata byM230_FSSTP  	     	_at_ 0xFD4;
BYTE xdata byM230_WINSW  	     	_at_ 0xFD5;
BYTE xdata byM230_WINSH  	     	_at_ 0xFD6;
BYTE xdata byM230_WINSC  	     	_at_ 0xFD7;
BYTE xdata byM230_WINSC1  	      _at_ 0xFD8;
BYTE xdata byM230_XDEL           _at_ 0xFD9;

void initial_MTV230(void)
{   

	POWER_STANDBY = 0;

	byM230_Option1 = 0x80; 		//master IIC block connect to HSCL/HSDA pins
	byM230_PadMode1 = 0xc1;	//bit7 HIICE=1: HSCL/HSDA
								//bit6 IIICE=1: ISCL/ISDA
								//bit5 HVE=0: P4.7
								//bit4 HclpE=0: P4.5
								//bit1 FclkE=0: CPU at normal rate
								//bit0 P62E=1: P6.2
	byM230_PadMode2 = 0xf0;	//enable DA0~DA3
	byM230_PadMode3 = 0xFC;       //p4.1=ISP VSYNC, P4.0=HSYNC
   	byM230_PadMode4 = 0xff;       // P5.1~~P5.7  are  output  pins


	byM230_IIC_INTEN = 0xe0;		/////enable		TXBBUF  RCBBUF  slave B		interrupt
	byM230_IIC_SLVBADR = 0x80|(0xC6>>1);		//C6=Address(7 bit) + WR bit
			
	byM230_HVCTR0 = 0xc3;		////////MTV 230 datasheet PAGE11
	byM230_WDT= 0x00;			//disable watchdog
	byM230_INTFLG = 0x00;		//clear HSYNC VSYNC's change  flags and VSYNC interrupt flag
	byM230_INTEN  = 0x00;		//disable the interrupt about HSYNC and VSYNC

	byM230_IIC_INTFLG = 0;		//clear SlvBMI SlvAMI and Master IIC interrupt flag
	byM230_IIC_SLVAADR = 0x50;       // disable slaveA,address:- 1 0 1 0 0 0 0
	// byM230_IIC_SLVBADR = 0x80|(0xc6>>1);       // disable slaveB,address:- 0 1 0 0 1 1 0 
	// byM230_IIC_INTEN = 0xe1;         // enable master

	//byM230_OSDCON1=0x0c;
	//PowerCtrl = 1;			//power on control pin
	//POWER_STANDBY = 1;	//power on flag
}

void initial_MCU(void)
{
	EA  = 0;            //disable all interrupt

	SCON=0;
	TMOD = 0x21;		// 16 bit timer/counter
	IT1 = 0;      // set INT1 type=falling edge
	//IT1 = 1;      // set INT1 type=falling edge
	IE1 = 0;      // extern interrupt 1 flag
	EX1 = 1;      // enable   INT1

	EX0 = 1;
	IT0 = 1;
	ET0 = 1;      // enable   TIMER0
	ES  = 0;
	PX1 = 1;      // INT1 priority high
	PT0 = 0;      // set TIMER0 priority low

	TH0 = HiByte(65536-TIME_BASE1*1000);   //set next interrupt time TIME_BASE1 ms
	TL0 = LoByte(65536-TIME_BASE1*1000);

	TR0 = 1;      //  start timer
	EA = 1;         // enable all interrupt

}