📄 main.c
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/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
/* ELIGIBILITY FOR ANY PURPOSES. */
/* (C) Fujitsu Microelectronics Europe GmbH */
/*---------------------------------------------------------------------------
MAIN.C
- description
- See README.TXT for project description and disclaimer.
/*---------------------------------------------------------------------------*/
#include "mb90425.h"
/*---------------------------------------------------------------------------
#Defines
/*---------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------
Globals
/*---------------------------------------------------------------------------*/
unsigned int PPGduty0;
unsigned int PPGduty1;
unsigned int PPGduty2;
unsigned long delay;
/*---------------------------------------------------------------------------
Functions
/*---------------------------------------------------------------------------*/
/* Note:
The -A and -B versions include a CPU Detection Reset Circuit.
This must be cleared periodically to prevent program reset.
The conditions for clearing the counter of this circuit are given below:
1. Writing 0 to CL bit of LVRC register
2. Internal reset
3. Stopping main oscillation clock
4. Transition to sleep mode
5. Transition to time-base timer mode or timer mode
6. Starting hold
*/
void clear_CPU_operation_detection (void)
{
LVRC = 0x35; /* clears CPU operation detection */
}
/*---------------------------------------------------------------------------
Interrupts
/*---------------------------------------------------------------------------*/
void InitPPG0(unsigned int period, unsigned int duty)
{
/* ensure that values for PPG period and duty are written, before PPG is started */
PCSR0 = period; /* set PPG period */
PDUT0 = duty; /* set duty ratio */
PCNTH0_CNTE = 0; /* disable PPG timer */
PCNTH0_STGR = 0; /* Software trigger bit*/
PCNTH0_MDSE = 0; /* Mode selection bit: '0'(default) PWM mode; '1' single-shot mode */
PCNTH0_RTRG = 1; /* retriggering bit to choose if PPG could be retriggerd during operation */
PCNTH0_CKS1 = 0; /* clock selection: internal clock used, no Pre-Scaler */
PCNTH0_CKS0 = 0; /* clock selection: internal clock used, no Pre-Scaler */
PCNTH0_PGMS = 0; /* output mask bit */
PCNTL0_EGS1 = 0; /* Trigger Edge Selection: disabled */
PCNTL0_EGS0 = 0; /* Trigger Edge Selection: disabled */
PCNTL0_IREN = 0; /* interrupt enable bit */
PCNTL0_IRQF = 0; /* interupt request flag */
PCNTL0_IRS1 = 1; /* ISR1-0: interrupt selection bits */
PCNTL0_IRS0 = 0;
PCNTL0_POEN = 1; /* PPG output enable bit */
PCNTL0_OSEL = 0; /* output polarity selection bit */
PCNTH0_CNTE = 1; /* enable PPG timer */
PCNTH0_STGR = 1; /* Software trigger bit*/
}
void InitPPG1(unsigned int period, unsigned int duty)
{
/* ensure that values for PPG period and duty are written, before PPG is started */
PCSR1 = period; /* set PPG period */
PDUT1 = duty; /* set duty ratio */
PCNTH1_CNTE = 0; /* disable PPG timer */
PCNTH1_STGR = 0; /* Software trigger bit*/
PCNTH1_MDSE = 0; /* Mode selection bit: '0'(default) PWM mode; '1' single-shot mode */
PCNTH1_RTRG = 1; /* retriggering bit to choose if PPG could be retriggerd during operation */
PCNTH1_CKS1 = 0; /* clock selection: internal clock used, no Pre-Scaler */
PCNTH1_CKS0 = 0; /* clock selection: internal clock used, no Pre-Scaler */
PCNTH1_PGMS = 0; /* output mask bit */
PCNTL1_EGS1 = 0; /* Trigger Edge Selection: disabled */
PCNTL1_EGS0 = 0; /* Trigger Edge Selection: disabled */
PCNTL1_IREN = 0; /* interrupt enable bit */
PCNTL1_IRQF = 0; /* interupt request flag */
PCNTL1_IRS1 = 1; /* ISR1-0: interrupt selection bits */
PCNTL1_IRS0 = 0;
PCNTL1_POEN = 1; /* PPG output enable bit */
PCNTL1_OSEL = 0; /* output polarity selection bit */
PCNTH1_CNTE = 1; /* enable PPG timer */
PCNTH1_STGR = 1; /* Software trigger bit*/
}
void InitPPG2(unsigned int period, unsigned int duty)
{
/* ensure that values for PPG period and duty are written, before PPG is started */
PCSR2 = period; /* set PPG period */
PDUT2 = duty; /* set duty ratio */
PCNTH2_CNTE = 0; /* disable PPG timer */
PCNTH2_STGR = 0; /* Software trigger bit*/
PCNTH2_MDSE = 0; /* Mode selection bit: '0'(default) PWM mode; '1' single-shot mode */
PCNTH2_RTRG = 1; /* retriggering bit to choose if PPG could be retriggerd during operation */
PCNTH2_CKS1 = 0; /* clock selction: internal clock used, no Pre-Scaler */
PCNTH2_CKS0 = 0; /* clock selction: internal clock used, no Pre-Scaler */
PCNTH2_PGMS = 0; /* output mask bit */
PCNTL2_EGS1 = 0; /* Trigger Edge Selection: disabled */
PCNTL2_EGS0 = 0; /* Trigger Edge Selection: disabled */
PCNTL2_IREN = 0; /* interrupt enable bit */
PCNTL2_IRQF = 0; /* interupt request flag */
PCNTL2_IRS1 = 1; /* ISR1-0: interrupt selection bits */
PCNTL2_IRS0 = 0;
PCNTL2_POEN = 1; /* PPG output enable bit */
PCNTL2_OSEL = 0; /* output polarity selection bit */
PCNTH2_CNTE = 1; /* enable PPG timer */
PCNTH2_STGR = 1; /* Software trigger bit*/
}
/*---------------------------------------------------------------------------
MAIN.C
/*---------------------------------------------------------------------------*/
void main(void)
{
InitIrqLevels();
__set_il(7); /* allow all levels */
__EI(); /* globaly enable interrupts */
PPGduty0 = 0x1000;
PPGduty1 = 0x4000;
PPGduty2 = 0x7000;
InitPPG0(0xffff, PPGduty0);
InitPPG1(0xffff, PPGduty1);
InitPPG2(0xffff, PPGduty2);
for (delay=0; delay < 50000; delay++)
clear_CPU_operation_detection();
while(1)
{
clear_CPU_operation_detection();
InitPPG0(0xffff, PPGduty0);
InitPPG1(0xffff, PPGduty1);
InitPPG2(0xffff, PPGduty2);
PPGduty0 = PPGduty0 + 500;
PPGduty1 = PPGduty1 + 1000;
PPGduty2 = PPGduty2 + 2000;
for (delay=0; delay < 5000; delay++)
clear_CPU_operation_detection();
}// while(1)
}// main()
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