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📄 ar5416_eeprom.c

📁 Atheros wifi driver source code
💻 C
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                } else {                    twiceMaxEdgePower = twiceMinEdgePower;                    break;                }            }        }        minCtlPower = (u_int8_t)AH_MIN(twiceMaxEdgePower, scaledPower);        /* ==Apply ctl mode to correct target power set== */        switch(pCtlMode[ctlMode]) {        case CTL_11B:            for (i = 0; i < N(targetPowerCck.tPow2x); i++) {                targetPowerCck.tPow2x[i] = (u_int8_t)AH_MIN(targetPowerCck.tPow2x[i], minCtlPower);            }            break;        case CTL_11A:        case CTL_11G:            for (i = 0; i < N(targetPowerOfdm.tPow2x); i++) {                targetPowerOfdm.tPow2x[i] = (u_int8_t)AH_MIN(targetPowerOfdm.tPow2x[i], minCtlPower);            }            break;        case CTL_5GHT20:        case CTL_2GHT20:            for (i = 0; i < N(targetPowerHt20.tPow2x); i++) {                targetPowerHt20.tPow2x[i] = (u_int8_t)AH_MIN(targetPowerHt20.tPow2x[i], minCtlPower);            }            break;        case CTL_11B_EXT:            targetPowerCckExt.tPow2x[0] = (u_int8_t)AH_MIN(targetPowerCckExt.tPow2x[0], minCtlPower);            break;        case CTL_11A_EXT:        case CTL_11G_EXT:            targetPowerOfdmExt.tPow2x[0] = (u_int8_t)AH_MIN(targetPowerOfdmExt.tPow2x[0], minCtlPower);            break;        case CTL_5GHT40:        case CTL_2GHT40:            for (i = 0; i < N(targetPowerHt40.tPow2x); i++) {                targetPowerHt40.tPow2x[i] = (u_int8_t)AH_MIN(targetPowerHt40.tPow2x[i], minCtlPower);            }            break;        default:            HALASSERT(0);            break;        }    } /* end ctl mode checking */    /* Set rates Array from collected data */    ratesArray[rate6mb] = ratesArray[rate9mb] = ratesArray[rate12mb] = ratesArray[rate18mb] = ratesArray[rate24mb] = targetPowerOfdm.tPow2x[0];    ratesArray[rate36mb] = targetPowerOfdm.tPow2x[1];    ratesArray[rate48mb] = targetPowerOfdm.tPow2x[2];    ratesArray[rate54mb] = targetPowerOfdm.tPow2x[3];    ratesArray[rateXr] = targetPowerOfdm.tPow2x[0];    for (i = 0; i < N(targetPowerHt20.tPow2x); i++) {        ratesArray[rateHt20_0 + i] = targetPowerHt20.tPow2x[i];    }    if (IS_CHAN_2GHZ(chan)) {        ratesArray[rate1l]  = targetPowerCck.tPow2x[0];        ratesArray[rate2s] = ratesArray[rate2l]  = targetPowerCck.tPow2x[1];        ratesArray[rate5_5s] = ratesArray[rate5_5l] = targetPowerCck.tPow2x[2];;        ratesArray[rate11s] = ratesArray[rate11l] = targetPowerCck.tPow2x[3];;    }    if (ht && ht->ht_phymode == HAL_HT_PHYMODE_2040) {        for (i = 0; i < N(targetPowerHt40.tPow2x); i++) {            ratesArray[rateHt40_0 + i] = targetPowerHt40.tPow2x[i];        }        ratesArray[rateDupOfdm] = targetPowerHt40.tPow2x[0];        ratesArray[rateDupCck]  = targetPowerHt40.tPow2x[0];        ratesArray[rateExtOfdm] = targetPowerOfdmExt.tPow2x[0];        if (IS_CHAN_2GHZ(chan)) {            ratesArray[rateExtCck]  = targetPowerCckExt.tPow2x[0];        }    }    return AH_TRUE;#undef EXT_ADDITIVE#undef CTL_11A_EXT#undef CTL_11G_EXT#undef CTL_11B_EXT}/************************************************************** * ar5416GetMaxEdgePower * * Find the maximum conformance test limit for the given channel and CTL info */static u_int16_tar5416GetMaxEdgePower(u_int16_t freq, CAL_CTL_EDGES *pRdEdgesPower, HAL_BOOL is2GHz){    u_int16_t twiceMaxEdgePower = AR5416_MAX_RATE_POWER;    int      i;    /* Get the edge power */    for (i = 0; (i < AR5416_NUM_BAND_EDGES) && (pRdEdgesPower[i].bChannel != AR5416_BCHAN_UNUSED) ; i++) {        /*         * If there's an exact channel match or an inband flag set         * on the lower channel use the given rdEdgePower         */        if (freq == fbin2freq(pRdEdgesPower[i].bChannel, is2GHz)) {            twiceMaxEdgePower = pRdEdgesPower[i].tPower;            break;        } else if ((i > 0) && (freq < fbin2freq(pRdEdgesPower[i].bChannel, is2GHz))) {            if (fbin2freq(pRdEdgesPower[i - 1].bChannel, is2GHz) < freq && pRdEdgesPower[i - 1].flag) {                twiceMaxEdgePower = pRdEdgesPower[i - 1].tPower;            }            /* Leave loop - no more affecting edges possible in this monotonic increasing list */            break;        }    }    HALASSERT(twiceMaxEdgePower > 0);    return twiceMaxEdgePower;}/************************************************************** * ar5416GetTargetPowers * * Return the four rates of target power for the given target power table * channel, and number of channels */static voidar5416GetTargetPowers(struct ath_hal *ah, HAL_HT *ht, HAL_CHANNEL_INTERNAL *chan,                      CAL_TARGET_POWER_HT *powInfo, u_int16_t numChannels,                      CAL_TARGET_POWER_HT *pNewPower, u_int16_t numRates,                      HAL_BOOL isHt40Target){    u_int16_t clo, chi;    int i;    int matchIndex = -1, lowIndex = -1;    u_int16_t freq;    CHAN_CENTERS centers;    ar5416GetChannelCenters(ah, ht, chan, &centers);    freq = isHt40Target ? centers.synth_center : centers.ctl_center;    /* Copy the target powers into the temp channel list */    if (freq <= fbin2freq(powInfo[0].bChannel, IS_CHAN_2GHZ(chan))) {        matchIndex = 0;    } else {        for (i = 0; (i < numChannels) && (powInfo[i].bChannel != AR5416_BCHAN_UNUSED); i++) {            if (freq == fbin2freq(powInfo[i].bChannel, IS_CHAN_2GHZ(chan))) {                matchIndex = i;                break;            } else if ((freq < fbin2freq(powInfo[i].bChannel, IS_CHAN_2GHZ(chan))) &&                       (freq > fbin2freq(powInfo[i - 1].bChannel, IS_CHAN_2GHZ(chan))))            {                lowIndex = i - 1;                break;            }        }        if ((matchIndex == -1) && (lowIndex == -1)) {            HALASSERT(freq > fbin2freq(powInfo[i - 1].bChannel, IS_CHAN_2GHZ(chan)));            matchIndex = i - 1;        }    }    if (matchIndex != -1) {        *pNewPower = powInfo[matchIndex];    } else {        HALASSERT(lowIndex != -1);        /*         * Get the lower and upper channels, target powers,         * and interpolate between them.         */        clo = fbin2freq(powInfo[lowIndex].bChannel, IS_CHAN_2GHZ(chan));        chi = fbin2freq(powInfo[lowIndex + 1].bChannel, IS_CHAN_2GHZ(chan));        for (i = 0; i < numRates; i++) {            pNewPower->tPow2x[i] = (u_int8_t)interpolate(freq, clo, chi,                                   powInfo[lowIndex].tPow2x[i], powInfo[lowIndex + 1].tPow2x[i]);        }    }}static voidar5416GetTargetPowersLeg(struct ath_hal *ah, HAL_HT *ht,                         HAL_CHANNEL_INTERNAL *chan,                         CAL_TARGET_POWER_LEG *powInfo, u_int16_t numChannels,                         CAL_TARGET_POWER_LEG *pNewPower, u_int16_t numRates,			 HAL_BOOL isExtTarget){    u_int16_t clo, chi;    int i;    int matchIndex = -1, lowIndex = -1;    u_int16_t freq;    CHAN_CENTERS centers;    ar5416GetChannelCenters(ah, ht, chan, &centers);    freq = (isExtTarget) ? centers.ext_center :centers.ctl_center;    /* Copy the target powers into the temp channel list */    if (freq <= fbin2freq(powInfo[0].bChannel, IS_CHAN_2GHZ(chan))) {        matchIndex = 0;    } else {        for (i = 0; (i < numChannels) && (powInfo[i].bChannel != AR5416_BCHAN_UNUSED); i++) {            if (freq == fbin2freq(powInfo[i].bChannel, IS_CHAN_2GHZ(chan))) {                matchIndex = i;                break;            } else if ((freq < fbin2freq(powInfo[i].bChannel, IS_CHAN_2GHZ(chan))) &&                       (freq > fbin2freq(powInfo[i - 1].bChannel, IS_CHAN_2GHZ(chan))))            {                lowIndex = i - 1;                break;            }        }        if ((matchIndex == -1) && (lowIndex == -1)) {            HALASSERT(freq > fbin2freq(powInfo[i - 1].bChannel, IS_CHAN_2GHZ(chan)));            matchIndex = i - 1;        }    }    if (matchIndex != -1) {        *pNewPower = powInfo[matchIndex];    } else {        HALASSERT(lowIndex != -1);        /*         * Get the lower and upper channels, target powers,         * and interpolate between them.         */        clo = fbin2freq(powInfo[lowIndex].bChannel, IS_CHAN_2GHZ(chan));        chi = fbin2freq(powInfo[lowIndex + 1].bChannel, IS_CHAN_2GHZ(chan));        for (i = 0; i < numRates; i++) {            pNewPower->tPow2x[i] = (u_int8_t)interpolate(freq, clo, chi,                                   powInfo[lowIndex].tPow2x[i], powInfo[lowIndex + 1].tPow2x[i]);        }    }}/************************************************************** * ar5416SetPowerCalTable * * Pull the PDADC piers from cal data and interpolate them across the given * points as well as from the nearest pier(s) to get a power detector * linear voltage to power level table. */static HAL_BOOLar5416SetPowerCalTable(struct ath_hal *ah, HAL_HT *ht, ar5416_eeprom_t *pEepData, HAL_CHANNEL_INTERNAL *chan, int16_t *pTxPowerIndexOffset){    CAL_DATA_PER_FREQ *pRawDataset;    u_int8_t  *pCalBChans = AH_NULL;    u_int16_t pdGainOverlap_t2;    static u_int8_t  pdadcValues[AR5416_NUM_PDADC_VALUES];    u_int16_t gainBoundaries[AR5416_PD_GAINS_IN_MASK];    u_int16_t numPiers, i, j;    int16_t  tMinCalPower;    u_int16_t numXpdGain, xpdMask;    u_int16_t xpdGainValues[AR5416_NUM_PD_GAINS];    u_int32_t reg32, regOffset, regChainOffset;    pdGainOverlap_t2 = (u_int16_t)(MS(OS_REG_READ(ah, AR_PHY_TPCRG5), AR_PHY_TPCRG5_PD_GAIN_OVERLAP));    if (IS_CHAN_2GHZ(chan)) {        pCalBChans = pEepData->calFreqPier2G;        numPiers = AR5416_NUM_2G_CAL_PIERS;        xpdMask = pEepData->modalHeader[1].xpdGain;    } else {        pCalBChans = pEepData->calFreqPier5G;        numPiers = AR5416_NUM_5G_CAL_PIERS;        xpdMask = pEepData->modalHeader[0].xpdGain;    }    numXpdGain = 0;    /* Calculate the value of xpdgains from the xpdGain Mask */    for (i = 1; i <= AR5416_PD_GAINS_IN_MASK; i++) {        if ((xpdMask >> (AR5416_PD_GAINS_IN_MASK - i)) & 1) {            if (numXpdGain >= AR5416_NUM_PD_GAINS) {                HALASSERT(0);                break;            }            xpdGainValues[numXpdGain] = (u_int16_t)(AR5416_PD_GAINS_IN_MASK - i);            numXpdGain++;        }    }    OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN, (numXpdGain - 1) & 0x3);    for (i = 0; i < AR5416_MAX_CHAINS; i++) {            if ( !(IS_5416V1(ah) ) &&	    //if ((AH_PRIVATE(ah)->ah_macRev >= AR_SREV_REVISION_OWL_20) &&             (pEepData->baseEepHeader.txMask == 0x5) && (i != 0)) {            /* Regs are swapped from chain 2 to 1 for 5416 2_0 with              * only chains 0 and 2 populated              */            regChainOffset = (i == 1) ? 0x2000 : 0x1000;        } else {            regChainOffset = i * 0x1000;        }        if (pEepData->baseEepHeader.txMask & (1 << i)) {            if (IS_CHAN_2GHZ(chan)) {                pRawDataset = pEepData->calPierData2G[i];            } else {                pRawDataset = pEepData->calPierData5G[i];            }            ar5416GetGainBoundariesAndPdadcs(ah, ht, chan, pRawDataset,                                             pCalBChans, numPiers,                                             pdGainOverlap_t2,                                             &tMinCalPower, gainBoundaries,                                             pdadcValues, numXpdGain);            if ((i == 0) || !(IS_5416V1(ah))) {	    	//(AH_PRIVATE(ah)->ah_macRev >= AR_SREV_REVISION_OWL_20)) {                /*                 * Note the pdadc table may not start at 0 dBm power, could be                 * negative or greater than 0.  Need to offset the power                 * values by the amount of minPower for griffin                 */                OS_REG_WRITE(ah, AR_PHY_TPCRG5 + regChainOffset,                     SM(pdGainOverlap_t2, AR_PHY_TPCRG5_PD_GAIN_OVERLAP) |                     SM(gainBoundaries[0], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1)  |                     SM(gainBoundaries[1], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2)  |                     SM(gainBoundaries[2], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3)  |                     SM(gainBoundaries[3], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4));//printf("SNOOP: a26c = %x\n",//                     (pdGainOverlap_t2 & 0xf) |//                     ((gainBoundaries[0] & 0x3f) << 4)  |//                     ((gainBoundaries[1] & 0x3f) << 10) |//                     ((gainBoundaries[2] & 0x3f) << 16) |//                     ((gainBoundaries[3] & 0x3f) << 22));

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