📄 2-1.asm
字号:
.ref start
.def DMAINT0 ; DMA中断0
.def TIMERINT1 ; 定时器1中断
SPCR0 .equ 018c0008h
PCR0 .equ 018c0024h
SPCR1 .equ 01900008h
PCR1 .equ 01900024h
SPCR2 .equ 01A40008h
PCR2 .equ 01A40024h ; 定义缓冲串口寄存器
XBGC .equ 01880000h
XCECTL0 .equ 01880008h
XCECTL1 .equ 01880004h
XCECTL2 .equ 01880010h
XCECTL3 .equ 01880014h ; 定义扩展总线寄存器
GBLCNTA .equ 01840028h
GBLCNTB .equ 0184002Ch
GBLIDXA .equ 01840030h
GBLIDXB .equ 01840034h
GBLADDRA .equ 01840038h
GBLADDRB .equ 0184003Ch
GBLADDRC .equ 01840068h
GBLADDRD .equ 0184006Ch ; 定义DMA全局寄存器
PRICLT0 .equ 01840000h
SECCTL0 .equ 01840008h
SRC0 .equ 01840010h
DST0 .equ 01840018h
XFRCNT0 .equ 01840020h ; 定义DMA通道0寄存器
CTL0 .equ 01940000h
PRD0 .equ 01940004h
CNT0 .equ 01940008h
CTL1 .equ 01980000h
PRD1 .equ 01980004h
CNT1 .equ 01980008h ; 定义定时器寄存器
.data
.global a1
.text
start:
interrupt_init: ; 初始化中断
SUB A0,A0, A0
MVC CSR,B0
MVC A0,ISTP
AND 0x0FFFFFFFE,B0,B0
MVKL 08102H,A0 ; 使能定时器1、DMA0和NMI中断
MVKLH 0000h,A0
MVC B0,CSR ; 禁止所有的可屏蔽中断
MVC A0,IER
MVKL 064H,A15 ; 设置寄存器a15，用于累计DMA0中断的次数
MVKLH 000H,A15
start_timer0:
MVKL 0, B0 ; 初始化定时器0
MVKLH 0194h, B0
MVKL 1, A1
MVKLH 0h, A1
MVKL 0301h ,A0
MVKLH 0000h ,A0
STW A0, *B0++[1]
NOP 2
STW A1, *B0++[1]
NOP 2
STW A1, *B0--[2]
NOP 2
MVKL 03C1h, A0
MVKLH 0, A0
STW A0, *B0
NOP 3
mcbsps0_init: ; 初始化缓冲串口0
MVKL SPCR0,B0 ; 将缓冲串口引脚设置成通用I/O引脚
MVKH SPCR0,B0
LDW *B0,A0
NOP 3
MVKL 0FFFEh,A1
MVKLH 0FFFEh,A1
AND A1,A0,A0
STW A0,*B0
NOP 3
MVKL PCR0, B0
MVKH PCR0,B0
LDW *B0,A0
NOP 3
MVKL 00003020h,A1
MVKH 00003020h,A1
OR A1,A0,A0
STW A0,*B0
NOP 3
mcbsps1_init: ; 初始化缓冲串口1
MVKL SPCR1,B0
MVKH SPCR1,B0
LDW *B0,A0
NOP 3
MVKL 0FFFEh,A1
MVKLH 0FFFEh,A1
AND A1,A0,A0
STW A0,*B0
MVKL PCR1, B0
MVKH PCR1,B0
LDW *B0,A0
NOP 3
MVKL 00006020h,A1 ; 设置DX1引脚状态为高
MVKH 00006020h,A1
OR A1,A0,A0
STW A0,*B0
NOP 2
NOP
NOP
MVKL 5A00H, A1
MVKLH 065h, A1
WAIT_FOR_FIFO0: ; 等待FIFO0初始化结束
NOP
SUB A1,1,A1
NOP
[A1] B WAIT_FOR_FIFO0
NOP 5
MVKL PCR1,B0
MVKH PCR1,B0
LDW *B0,A0
NOP 3
MVKL 03000h,A1 ; 设置DX1引脚状态为低
MVKH 00h,A1
STW A1,*B0
NOP 5
STW A1,*B0
NOP 5
MVKL 5A00H, A1 ; 设置FIFO部分复位
MVKLH 065h, A1
WAIT_FOR_FIFO1: ; 等待FIFO1初始化结束
NOP 3
SUB A1,1,A1
NOP 3
[A1] B WAIT_FOR_FIFO1
NOP 6
MVKL PCR1, B0 ; 清空FIFO内容
MVKH PCR1,B0
LDW *B0,A0
NOP 3
MVKL 00006020h,A1 ; 设置DX1引脚状态为高
MVKH 00006020h,A1
OR A1,A0,A0
STW A0,*B0
NOP 2
NOP
NOP
MVKL 5A00H, A1
MVKLH 065h, A1
WAIT_FOR_FIFO2: ; 等待FIFO2初始化结束
NOP 3
SUB A1,1,A1
NOP 3
[A1] B WAIT_FOR_FIFO2
NOP 6
xbus_init: ; 初始化扩展总线
MVKL XBGC, B0
MVKH XBGC, B0
LDW *B0,A0
MVKL 04000h,A1
MVKH 00000h,A1
OR A1,A0,A0
STW A0,*B0
NOP 3
MVKL XBGC, B0
MVKH XBGC, B0
LDW *B0,A0
MVKL 04000h,A1
MVKH 00000h,A1
OR A1,A0,A0
STW A0,*B0
NOP 3
MVKL XCECTL3,B0 ; 初始化XCE3空间控制寄存器
MVKH XCECTL3,B0 ; 选择接口类型为32bitFIFO
LDW *B0,A0 ; 设置读写时序的参数
MVKL 0201h,A1
MVKLH 0201h,A1
STW A1,*B0
NOP 3
dma_0_init: ; 初始化DMA通道0
MVKL PRICLT0,B0 ; 工作方式为帧同步，32bit
MVKH PRICLT0,B0 ; 源地址不变，目的地址自增
MVKL 0040h,A1 ; 同步事件为外部中断4
MVKLH 0E01h,A1 ; DMA通道0停止
STW A1,*B0
NOP 3 ; 初始化DMA通道0第二控制寄存器
; 电平触发方式，高有效
MVKL SECCTL0,B0
MVKH SECCTL0,B0
LDW *B0,A0
NOP 3
MVKL 0A080h,A1
MVKLH 0008h,A1
STW A1,*B0
NOP 3
MVKL SRC0,B0 ; 初始化源地址寄存器
MVKH SRC0,B0
MVKL 0000h,A0
MVKLH 7000h,A0
STW A0,*B0
NOP 3 ; 设定SRC0指向XCE3空间
MVKL DST0,B0 ; 初始化目的地址寄存器
MVKH DST0,B0
MVKL 1000h,A0
MVKLH 8000h,A0
STW A0,*B0
NOP 3 ; 设定DST0指向内部地址80001000h
MVKL XFRCNT0 ,B0 ; 设定每次中断时DMA读取的数据个数
MVKH XFRCNT0 ,B0 ; 初始化传输计数寄存器
MVKL 02800h,A1 ; 设置成1帧，每帧1024个数据
MVKLH 0000h,A1
STW A1,*B0
NOP 3
MVKL GBLCNTA ,B0
MVKH GBLCNTA ,B0
MVKL 02800h,A1
MVKLH 0000h,A1
NOP 3
STW A1,*B0
NOP 3
MVKL 0FFFCh,A1
MVKLH 0h,A1
AND A0,A1,A0
NOP 3
DX0_CLEAR: ; 打开FIFO0和FIFO1
MVKL PCR0,B0
MVKH PCR0,B0
LDW *B0,A0
NOP 3
MVKL 0FFFFFFDFh,A1
MVKH 0FFFFFFDFh,A1
AND A1,A0,A0
STW A0,*B0
NOP 5
STW A0,*B0
NOP 5
MVC CSR, B0 ; 开中断
OR 01H,B0,B0
MVC B0,CSR
NOP 3
timer1init:
MVKL 064H,A15 ; 设定a15为DMA0中断次数为100次
MVKLH 000H,A15
MVKL 0, B0 ; 设置定时器1寄存器
MVKLH 0198H,B0
MVKL 0300h,A0
MVKLH 00h, A0
STW A0, *B0
NOP 4
MVKL 04H, B0
MVKLH 0198H, B0
;MVKL 08480h,A0
;MVKLH 01Eh, A0
MVKL 06EE0h,A0
MVKLH 01Fh, A0
STW A0, *B0
NOP 4
SUB A0,A0,A0
NOP 4
MVKL 08H, B0
MVKLH 0198H, B0
STW A0, *B0
NOP 4
MVKL 0, B0
MVKLH 0198H,B0
MVKL 03E0h,A0
MVKLH 00h, A0
STW A0,*B0
NOP 4
waittimer1: ; 等待DMA0中断
NOP
NOP
NOP
NOP
NOP
NOP
NOP
B waittimer1
NOP 5
NOP
NOP
DMAINT0: ; DMA0中断服务程序
NOP 3
MVKL 000H,A8
MVKLH 000H,A8
MVKL 1000H,A3
MVKLH 08000H,A3
MVKL 02800H,B1 ; 累加数据的格式
LOOP:
MVKL 000H,A8
MVKLH 000H,A8
NOP 4
STW A8,*A3
MVKL 003FFFH,B5
MVKLH 0,B5
NOP 3
LDW *A3,A4
NOP 4
AND B5,A4,A5
SHL A4,18,B4
SHR B4,18,A4
STW A4,*A3++
NOP 3
[B1] SUB B1,1,B1
NOP
NOP
[B1] B LOOP
NOP 5
NOP
NOP
; 累计DMA中断的次数
SUB A15,1,A15
SHL A15,0,B1
[!B1] B ENDDMA
NOP 5
NOP
NOP
MVKL DST0,B0
MVKH DST0,B0
MVKL 1000h,A0
MVKLH 8000h,A0
STW A0,*B0
NOP 3
MVKL SECCTL0,B0
MVKH SECCTL0,B0
LDW *B0,A0
NOP 3
MVKL 0A080h,A1
MVKLH 0008h,A1
STW A1,*B0
NOP 3
MVKL XFRCNT0 ,B0 ; 设定每次DMA中断读取数据的个数
MVKH XFRCNT0 ,B0
MVKL 02800h,A1
MVKLH 0000h,A1
STW A1,*B0
NOP 3
MVKL PRICLT0,B0 ; 开启DMA通道0
MVKH PRICLT0,B0
LDW *B0,A0
MVKL 0001h,A1
MVKLH 0000h,A1
NOP 3
OR A0,A1,A0
NOP 3
B IRP
STW A0,*B0
NOP 3
NOP
NOP
ENDDMA:
MVKL dma_0_init,A1
MVKH dma_0_init,A1
MVC A1,IRP
NOP 3
B IRP
NOP 5
NOP
NOP
TIMERINT1: ; 定时器1中断，表明FIFO已经满
MVKL PCR0, B0 ; 禁止FIFO存储数据
MVKH PCR0,B0
LDW *B0,A0
NOP 3
MVKL 00003020h,A1
MVKH 00003020h,A1
OR A1,A0,A0
STW A0,*B0
NOP 3
STW A0,*B0
NOP 3
MVKL 0, B0 ; 禁止定时器1
MVKLH 0198H,B0
MVKL 0300h,A0
MVKLH 0,A0
STW A0,*B0
NOP 3
NOP
MVKL open_dma0,A1
MVKH open_dma0,A1
;MVKL mcbsps0_init,A1
;MVKH mcbsps0_init,A1
MVC A1,IRP
NOP 3
B IRP
NOP 5
NOP
NOP
open_dma0:
MVKL PRICLT0,B0
MVKH PRICLT0,B0
MVKL 0040h,A1
MVKLH 0E01h,A1
STW A1,*B0
NOP 3
MVKL SECCTL0,B0
MVKH SECCTL0,B0
LDW *B0,A0
NOP 3
MVKL 0A080h,A1
MVKLH 0008h,A1
STW A1,*B0
NOP 3
MVKL SRC0,B0
MVKH SRC0,B0
MVKL 0000h,A0
MVKLH 7000h,A0
STW A0,*B0
NOP 3
MVKL DST0,B0
MVKH DST0,B0
MVKL 1000h,A0
MVKLH 8000h,A0
STW A0,*B0
NOP 3 ; 设定DST0指向内部数据空间地址 80001000h
MVKL XFRCNT0 ,B0
MVKH XFRCNT0 ,B0
MVKL 02800h,A1
MVKLH 0000h,A1
STW A1,*B0
NOP 3
MVKL GBLCNTA ,B0
MVKH GBLCNTA ,B0
MVKL 02800h,A1
MVKLH 0000h,A1
NOP 3
STW A1,*B0
NOP 3
MVKL PRICLT0,B0
MVKH PRICLT0,B0
LDW *B0,A0
MVKL 0001h,A1
MVKLH 0000h,A1
NOP 3
OR A0,A1,A0
STW A0,*B0
NOP 5
waiting:
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
B waiting
NOP 5
.end
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