📄 m64.lst
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03BB E050 LDI R21,0
03BC E060 LDI R22,0
03BD E070 LDI R23,0
03BE 0E24 ADD R2,R20
03BF 1E35 ADC R3,R21
03C0 1E46 ADC R4,R22
03C1 1E57 ADC R5,R23
03C2 9220009C STS 0x9C,R2
(0260) while(!(UCSR1A&(1<<UDRE1)));
03C4 9020009B LDS R2,0x9B
03C6 FE25 SBRS R2,5
03C7 CFFC RJMP 0x03C4
(0261) UDR1=(n/10)%10+48;
03C8 E04A LDI R20,0xA
03C9 E050 LDI R21,0
03CA E060 LDI R22,0
03CB E070 LDI R23,0
03CC 01FE MOVW R30,R28
03CD 8020 LDD R2,Z+0
03CE 8031 LDD R3,Z+1
03CF 8042 LDD R4,Z+2
03D0 8053 LDD R5,Z+3
03D1 937A ST R23,-Y
03D2 936A ST R22,-Y
03D3 935A ST R21,-Y
03D4 934A ST R20,-Y
03D5 0181 MOVW R16,R2
03D6 0192 MOVW R18,R4
03D7 940E0612 CALL div32s
03D9 E04A LDI R20,0xA
03DA E050 LDI R21,0
03DB E060 LDI R22,0
03DC E070 LDI R23,0
03DD 937A ST R23,-Y
03DE 936A ST R22,-Y
03DF 935A ST R21,-Y
03E0 934A ST R20,-Y
03E1 940E0614 CALL mod32s
03E3 0118 MOVW R2,R16
03E4 0129 MOVW R4,R18
03E5 E340 LDI R20,0x30
03E6 E050 LDI R21,0
03E7 E060 LDI R22,0
03E8 E070 LDI R23,0
03E9 0E24 ADD R2,R20
03EA 1E35 ADC R3,R21
03EB 1E46 ADC R4,R22
03EC 1E57 ADC R5,R23
03ED 9220009C STS 0x9C,R2
(0262) while(!(UCSR1A&(1<<UDRE1)));
03EF 9020009B LDS R2,0x9B
03F1 FE25 SBRS R2,5
03F2 CFFC RJMP 0x03EF
(0263) UDR1=n%10+48;
03F3 E04A LDI R20,0xA
03F4 E050 LDI R21,0
03F5 E060 LDI R22,0
03F6 E070 LDI R23,0
03F7 01FE MOVW R30,R28
03F8 8020 LDD R2,Z+0
03F9 8031 LDD R3,Z+1
03FA 8042 LDD R4,Z+2
03FB 8053 LDD R5,Z+3
03FC 937A ST R23,-Y
03FD 936A ST R22,-Y
03FE 935A ST R21,-Y
03FF 934A ST R20,-Y
0400 0181 MOVW R16,R2
0401 0192 MOVW R18,R4
0402 940E0614 CALL mod32s
0404 0118 MOVW R2,R16
0405 0129 MOVW R4,R18
0406 E340 LDI R20,0x30
0407 E050 LDI R21,0
0408 E060 LDI R22,0
0409 E070 LDI R23,0
040A 0E24 ADD R2,R20
040B 1E35 ADC R3,R21
040C 1E46 ADC R4,R22
040D 1E57 ADC R5,R23
040E 9220009C STS 0x9C,R2
(0264) if (huanhang)
0410 20AA TST R10
0411 F079 BEQ 0x0421
(0265) {
(0266) while(!(UCSR1A&(1<<UDRE1)));
0412 9020009B LDS R2,0x9B
0414 FE25 SBRS R2,5
0415 CFFC RJMP 0x0412
(0267) UDR1=0x0d;
0416 E08D LDI R24,0xD
0417 9380009C STS 0x9C,R24
(0268) while(!(UCSR1A&(1<<UDRE1)));
0419 9020009B LDS R2,0x9B
041B FE25 SBRS R2,5
041C CFFC RJMP 0x0419
(0269) UDR1=0x0a;
041D E08A LDI R24,0xA
041E 9380009C STS 0x9C,R24
(0270) }
0420 C00E RJMP 0x042F
(0271) else
(0272) {
(0273) while(!(UCSR1A&(1<<UDRE1)));
0421 9020009B LDS R2,0x9B
0423 FE25 SBRS R2,5
0424 CFFC RJMP 0x0421
(0274) UDR1=0x20;
0425 E280 LDI R24,0x20
0426 9380009C STS 0x9C,R24
(0275) while(!(UCSR1A&(1<<UDRE1)));
0428 9020009B LDS R2,0x9B
042A FE25 SBRS R2,5
042B CFFC RJMP 0x0428
(0276) UDR1=0x20;
042C E280 LDI R24,0x20
042D 9380009C STS 0x9C,R24
(0277) }
042F 9624 ADIW R28,4
0430 940E0690 CALL pop_gset3
0432 9624 ADIW R28,4
0433 9508 RET
(0278) }
(0279)
(0280)
(0281)
(0282) //TIMER0 initialize - prescale:64
(0283) // WGM: PWM Fast
(0284) // desired value: 1KHz
(0285) // actual value: 0.488KHz (-104.8%)
(0286) void timer0_init(void)
(0287) {
(0288) TCCR0 = 0x00; //stop
_timer0_init:
0434 2422 CLR R2
0435 BE23 OUT 0x33,R2
(0289) ASSR = 0x00; //set async mode
0436 BE20 OUT 0x30,R2
(0290) TCNT0 = 0x01; //set count
0437 E081 LDI R24,1
0438 BF82 OUT 0x32,R24
(0291) OCR0 = 0x0f;
0439 E08F LDI R24,0xF
043A BF81 OUT 0x31,R24
(0292) TCCR0 = 0x6C; //start timer
043B E68C LDI R24,0x6C
043C BF83 OUT 0x33,R24
043D 9508 RET
(0293) }
(0294)
(0295) //TIMER1 initialize - prescale:64
(0296) // WGM: 5) PWM 8bit fast, TOP=0x00FF
(0297) // desired value: 1KHz
(0298) // actual value: 0.488KHz (104.8%)
(0299) void timer1_init(void)
(0300) {
(0301) TCCR1B = 0x00; //stop
_timer1_init:
043E 2422 CLR R2
043F BC2E OUT 0x2E,R2
(0302) TCNT1H = 0xFF; //setup
0440 EF8F LDI R24,0xFF
0441 BD8D OUT 0x2D,R24
(0303) TCNT1L = 0x01;
0442 E081 LDI R24,1
0443 BD8C OUT 0x2C,R24
(0304) OCR1AH = 0x00;
0444 BC2B OUT 0x2B,R2
(0305) OCR1AL = 0x0f;
0445 E08F LDI R24,0xF
0446 BD8A OUT 0x2A,R24
(0306) OCR1BH = 0x00;
0447 BC29 OUT 0x29,R2
(0307) OCR1BL = 0x0f;
0448 BD88 OUT 0x28,R24
(0308) OCR1CH = 0x00;
0449 92200079 STS 0x79,R2
(0309) OCR1CL = 0x0f;
044B 93800078 STS 0x78,R24
(0310) ICR1H = 0x00;
044D BC27 OUT 0x27,R2
(0311) ICR1L = 0xFF;
044E EF8F LDI R24,0xFF
044F BD86 OUT 0x26,R24
(0312) TCCR1A = 0xA9;
0450 EA89 LDI R24,0xA9
0451 BD8F OUT 0x2F,R24
(0313) TCCR1B = 0x0B; //start Timer
0452 E08B LDI R24,0xB
0453 BD8E OUT 0x2E,R24
0454 9508 RET
_int0_isr:
0455 922A ST R2,-Y
0456 923A ST R3,-Y
0457 938A ST R24,-Y
0458 B62F IN R2,0x3F
0459 922A ST R2,-Y
(0314) }
(0315) unsigned char shuliang=0;
(0316) unsigned char xuanze=0;
(0317) #pragma interrupt_handler int0_isr:2
(0318) void int0_isr(void)
(0319) {
(0320) //external interupt on INT0
(0321)
(0322) x_adc=0;y_adc=0;
045A 2422 CLR R2
045B 9220012E STS x_adc,R2
045D 9220012D STS y_adc,R2
(0323) chang=1;
045F E081 LDI R24,1
0460 93800128 STS chang,R24
(0324) shuliang=ms;
0462 90200104 LDS R2,ms
0464 90300105 LDS R3,ms+1
0466 9220012B STS shuliang,R2
(0325) ms=0;
0468 2422 CLR R2
0469 2433 CLR R3
046A 92300105 STS ms+1,R3
046C 92200104 STS ms,R2
046E 9029 LD R2,Y+
046F BE2F OUT 0x3F,R2
0470 9189 LD R24,Y+
0471 9039 LD R3,Y+
0472 9029 LD R2,Y+
0473 9518 RETI
_int1_isr:
0474 922A ST R2,-Y
0475 923A ST R3,-Y
0476 938A ST R24,-Y
0477 939A ST R25,-Y
0478 B62F IN R2,0x3F
0479 922A ST R2,-Y
(0326)
(0327) }
(0328)
(0329) #pragma interrupt_handler int1_isr:3
(0330) void int1_isr(void)
(0331) {//CLI();
(0332) //external interupt on INT1
(0333) /*while(x_adc<video_x)
(0334) { v_temp[y_adc*video_x + x_adc] =0;x_adc++;}*/
(0335) if(xuanze++>5){xuanze=0;x_adc=0;y_adc++;}
047A 9020012C LDS R2,xuanze
047C 2433 CLR R3
047D 2D82 MOV R24,R2
047E 5F8F SUBI R24,0xFF
047F 9380012C STS xuanze,R24
0481 E085 LDI R24,5
0482 1582 CP R24,R2
0483 F450 BCC 0x048E
0484 2422 CLR R2
0485 9220012C STS xuanze,R2
0487 9220012E STS x_adc,R2
0489 9180012D LDS R24,y_adc
048B 5F8F SUBI R24,0xFF
048C 9380012D STS y_adc,R24
(0336)
(0337) x_adc=video_x+1;
048E E281 LDI R24,0x21
048F 9380012E STS x_adc,R24
(0338) //v_num=(v_num/video_x+1)*video_x;
(0339) ms++;
0491 91800104 LDS R24,ms
0493 91900105 LDS R25,ms+1
0495 9601 ADIW R24,1
0496 93900105 STS ms+1,R25
0498 93800104 STS ms,R24
049A 9029 LD R2,Y+
049B BE2F OUT 0x3F,R2
049C 9199 LD R25,Y+
049D 9189 LD R24,Y+
049E 9039 LD R3,Y+
049F 9029 LD R2,Y+
04A0 9518 RETI
_main:
n --> Y+2
v_num_now --> R10
n_sec --> R10
n_juli --> R10
n_jiaodu --> R10
yv --> R10
xv --> R12
04A1 9721 SBIW R28,1
(0340) //hang=1;
(0341) //SEI();
(0342) }
(0343)
(0344) #define PWM_ON DDRB|= R_pwm0 | R_pwm1 | L_pwm0 | L_pwm1;
(0345) #define PWM_OFF DDRB&= ~(R_pwm0 | R_pwm1 | L_pwm0 | L_pwm1);
(0346)
(0347) main()
(0348) {int n;
(0349) unsigned char n_jiaodu=0,n_juli=0;
04A2 24AA CLR R10
(0350) unsigned char n_sec=0;
(0351)
(0352) unsigned int v_num_now=0;//x_now,y_now;
04A3 24BB CLR R11
(0353) unsigned char xv,yv;
(0354)
(0355) init_devices();
04A4 DC14 RCALL _init_devices
(0356) //timer1_init();timer0_init();
(0357) //OCR1AH = 0x00;
(0358) /* OCR1AL = 64;
(0359) //OCR1BH = 0x00;
(0360) OCR1BL = 64;
(0361) //OCR1CH = 0x00;
(0362) OCR1CL = 64;
(0363) OCR0=64;*/
(0364) PORTD|=0x03;//外部中断
04A5 B382 IN R24,0x12
04A6 6083 ORI R24,3
04A7 BB82 OUT 0x12,R24
(0365) DDRD&=~03;
04A8 B381 IN R24,0x11
04A9 7F8C ANDI R24,0xFC
04AA BB81 OUT 0x11,R24
(0366) //while(1);
(0367) DDRE|=0x38;//while(1);
04AB B182 IN R24,0x02
04AC 6388 ORI R24,0x38
04AD B982 OUT 0x02,R24
(0368) /////////LCD
(0369) /* DDRB = 0xBF; //SI输入，SO，SCK，SS输出
(0370) SPCR = 0x50; //setup SPI
(0371) SPSR = 0x01; //setup SPI*/
(0372) /*while(!(UCSR0A&(1<<UDRE0)));
(0373) UDR0='a';while(!(UCSR0A&(1<<UDRE0)));
(0374) UDR0='a';while(!(UCSR0A&(1<<UDRE0)));
(0375) UDR0='a';while(!(UCSR0A&(1<<UDRE0)));
(0376) UDR0='a';*/
(0377) delay_ms(3000);
04AE EB08 LDI R16,0xB8
04AF E01B LDI R17,0xB
04B0 940E05BA CALL _delay_ms
(0378) number_uart1(1010,1);
04B2 E081 LDI R24,1
04B3 8388 STD Y+0,R24
04B4 EF02 LDI R16,0xF2
04B5 E013 LDI R17,3
04B6 E020 LDI R18,0
04B7 E030 LDI R19,0
04B8 DE48 RCALL _number_uart1
(0379) number_uart1(xx,0);
04B9 2422 CLR R2
04BA 8228 STD Y+0,R2
04BB 91200108 LDS R18,xx+2
04BD 91300109 LDS R19,xx+3
04BF 91000106 LDS R16,xx
04C1 91100107 LDS R17,xx+1
04C3 DE3D RCALL _number_uart1
(0380) number_uart1(ADCjohu,1);
04C4 E081 LDI R24,1
04C5 8388 STD Y+0,R24
04C6 91200102 LDS R18,ADCjohu+2
04C8 91300103 LDS R19,ADCjohu+3
04CA 91000100 LDS R16,ADCjohu
04CC 91100101 LDS R17,ADCjohu+1
04CE DE32 RCALL _number_uart1
(0381) delay_ms(3000);
04CF EB08 LDI R16,0xB8
04D0 E01B LDI R17,0xB
04D1 940E05BA CALL _delay_ms
(0382) xx=0;
04D3 E040 LDI R20,0
04D4 E050 LDI R21,0
04D5 E060 LDI R22,0
04D6 E070 LDI R23,0
04D7 93500107 STS xx+1,R21
04D9 93400106 STS xx,R20
04DB 93700109 STS xx+3,R23
04DD 93600108 STS xx+2,R22
(0383) //LCD_Init();
(0384) //LCD_clear();
(0385) DDRE &= ~0x7c;//if (!(PORTE & STOP)) if (!(PORTE & VOLDOWN)) if (!(PORTE & VOLUP)) if (!(PORTE & NEXTSONG)) if (!(PORTE & PREVSONG))
04DF B182 IN R24,0x02
04E0 7883 ANDI R24,0x83
04E1 B982 OUT 0x02,R24
(0386) PORTE |=0x7c;
04E2 B183 IN R24,0x03
04E3 678C ORI R24,0x7C
04E4 B983 OUT 0x03,R24
(0387) DDRE=0x00;PORTE=0xff;
04E5 2422 CLR R2
04E6 B822 OUT 0x02,R2
04E7 EF8F LDI R24,0xFF
04E8 B983 OUT 0x03,R24
04E9 C0BB RJMP 0x05A5
(0388) //number(0,0,4,-999,1);
(0389) /* OCR1AL = pwm_pingjun;
(0390) OCR1BL = pwm_pingjun;
(0391) OCR1CL = pwm_pingjun;
(0392) OCR0=pwm_pingjun;*/
(0393) while(1)
(0394) {
(0395)
(0396) //for(xv=0;xv<video_x;xv++)
(0397) ADMUX = 0x01; // A/D converter input pin number = 0
04EA E081 LDI R24,1
04EB B987 OUT 0x07,R24
(0398) ADCSRA = 0xc2;//|ADATE; // single A/D conversion, fCK/32, conversion now started
04EC EC82 LDI R24,0xC2
04ED B986 OUT 0x06,R24
(0399) //for(y_adc=0;y_adc<video_y;y_adc++)
(0400) //while(PINE!=0xff)
(0401) if (xuanze==0)
04EE 9020012C LDS R2,xuanze
04F0 2022 TST R2
04F1 F009 BEQ 0x04F3
04F2 C04C RJMP 0x053F
(0402) {
(0403) for(x_adc=0;x_adc<video_x;x_adc++)
04F3 2422 CLR R2
04F4 9220012E STS x_adc,R2
04F6 C043 RJMP 0x053A
(0404) {
(0405) do
(0406) {
(0407) //PORTE=~PORTE;
(0408) } while(!(ADCSRA&(1<<ADIF)));// ADSC // Wait for A/D conversion to finish
04F7 9B34 SBIS 0x06,4
04F8 CFFE RJMP 0x04F7
(0409) /*count = 6;
(0410) do // Customize this loop to 66 cycles !!
(0411) {
(0412) } while(--count);*/ // wait some cycles
(0413) ADCSRA |= 0x40; // start new A/D conversion
04F9 9A36 SBI 0x06,6
(0414) //write_to_flash(ADC-0x1D5); // read data, convert to 8 bit and store in flash
(0415) if ( (xuanze!=0) && (xuanze<2) )//滤波均值
04FA 9020012C LDS R2,xuanze
04FC 2022 TST R2
04FD F121 BEQ 0x0522
04FE 2D82 MOV R24,R2
04FF 3082 CPI R24,2
0500 F508 BCC 0x0522
(0416) v_temp[y_adc][x_adc]=v_temp[y_adc][x_adc]/4+ADC/4;
0501 9020012D LDS R2,y_adc
0503 E280 LDI R24,0x20
0504 9D82 MUL R24,R2
0505 0110 MOVW R2,R0
0506 E28F LDI R24,0x2F
0507 E091 LDI R25,1
0508 0E28 ADD R2,R24
0509 1E39 ADC R3,R25
050A 9040012E LDS R4,x_adc
050C 2455 CLR R5
050D 0C42 ADD R4,R2
050E 1C53 ADC R5,R3
050F E024 LDI R18,4
0510 E030 LDI R19,0
0511 01F2 MOVW R30,R4
0512 8100 LDD R16,Z+0
0513 2711 CLR R17
0514 940E05D6 CALL div16s
0516 0118 MOVW R2,R16
0517 B064 IN R6,0x04
0518 B075 IN R7,0x05
0519 9476 LSR R7
051A 9467 ROR R6
051B 9476 LSR R7
051C 9467 ROR R6
051D 0C26 ADD R2,R6
051E 1C37 ADC R3,R7
051F 01F2 MOVW R30,R4
0520 8220 STD Z+0,R2
0521 C013 RJMP 0x0535
(0417) else /**/
(0418) v_temp[y_adc][x_adc]=ADC>>1;
0522 9020012D LDS R2,y_adc
0524 E280 LDI R24,0x20
0525 9D82 MUL R24,R2
0526 0110 MOVW R2,R0
0527 E28F LDI R24,0x2F
0528 E091 LDI R25,1
0529 0E28 ADD R2,R24
052A 1E39 ADC R3,R25
052B 91E0012E LDS R30,x_adc
052D 27FF CLR R31
052E 0DE2 ADD R30,R2
052F 1DF3 ADC R31,R3
0530 B024 IN R2,0x04
0531 B035 IN R3,0x05
0532 9436 LSR R3
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