m64.lst

avr的视频采集

__start:
__text_start:
    005D EFCF      LDI	R28,0xFF
    005E E1D0      LDI	R29,0x10
    005F BFCD      OUT	0x3D,R28
    0060 BFDE      OUT	0x3E,R29
    0061 51C0      SUBI	R28,0x10
    0062 40D0      SBCI	R29,0
    0063 EA0A      LDI	R16,0xAA
    0064 8308      STD	Y+0,R16
    0065 2400      CLR	R0
    0066 E2ED      LDI	R30,0x2D
    0067 E0F1      LDI	R31,1
    0068 E017      LDI	R17,7
    0069 32EF      CPI	R30,0x2F
    006A 07F1      CPC	R31,R17
    006B F011      BEQ	0x006E
    006C 9201      ST	R0,Z+
    006D CFFB      RJMP	0x0069
    006E 8300      STD	Z+0,R16
    006F E8EC      LDI	R30,0x8C
    0070 E0F0      LDI	R31,0
    0071 E0A0      LDI	R26,0
    0072 E0B1      LDI	R27,1
    0073 E010      LDI	R17,0
    0074 3BE9      CPI	R30,0xB9
    0075 07F1      CPC	R31,R17
    0076 F021      BEQ	0x007B
    0077 95C8      LPM
    0078 9631      ADIW	R30,1
    0079 920D      ST	R0,X+
    007A CFF9      RJMP	0x0074
    007B 940E04A1  CALL	_main
_exit:
    007D CFFF      RJMP	_exit
FILE: D:\PROTEU~1.7\PROTEU~1.7\JOHU\1视频处理\main.c
(0001) //////////////////////////////
(0002) //////////////////////////////   22967为近似180度
(0003) 
(0004) #include <iom64v.h>
(0005) #include <macros.h>
(0006) 
(0007) #define PREVSONG   BIT(2)
(0008) #define NEXTSONG   BIT(3)
(0009) #define VOLDOWN    BIT(4)
(0010) #define VOLUP      BIT(5)
(0011) #define STOP       BIT(6)
(0012) 
(0013) #define R_pwm0       BIT(4)
(0014) #define R_pwm1       BIT(5)
(0015) #define L_pwm0       BIT(6)
(0016) #define L_pwm1       BIT(7)
(0017) 
(0018) 
(0019) long ADCjohu=0;
(0020) int ms=0;
(0021) long xx=0;
(0022) //int adc=0;
(0023) 
(0024) #define REF 483
(0025) unsigned char lvbo=0;
(0026) long lvbo_num=0;
(0027) 
(0028) unsigned char pwm_pingjun=254;//平均速度
(0029) unsigned char Rpwm0=0;
(0030) unsigned char Rpwm1=0;
(0031) unsigned char Lpwm0=0;
(0032) unsigned char Lpwm1=0;
(0033) unsigned char all=0, a=0,b=0,c=0,d=0,e=0,f=0;
(0034) #define CIR 1
(0035) #define LINE 2
(0036) #define CLS 3
(0037) long jiaodu=0,juli=0;
(0038) int time=0;
(0039) unsigned char sec=0;
(0040) 
(0041) #define video_x 32
(0042) #define video_y 48
(0043) unsigned int  v_num=0;
(0044) unsigned char v_temp[video_y][video_x],chang=0,hang=0,   adc1=0;;
(0045) 
(0046) unsigned char x_adc;
(0047) unsigned char  y_adc;
(0048) 
(0049) void port_init(void)
(0050) {
(0051)  PORTA = 0x00;
_port_init:
    007E 2422      CLR	R2
    007F BA2B      OUT	0x1B,R2
(0052)  DDRA  = 0x00;
    0080 BA2A      OUT	0x1A,R2
(0053)  PORTB = 0x00;
    0081 BA28      OUT	0x18,R2
(0054)  DDRB  = 0x00;
    0082 BA27      OUT	0x17,R2
(0055)  PORTC = 0x00; //m103 output only
    0083 BA25      OUT	0x15,R2
(0056)  DDRC  = 0x00;
    0084 BA24      OUT	0x14,R2
(0057)  PORTD = 0x00;
    0085 BA22      OUT	0x12,R2
(0058)  DDRD  = 0x00;
    0086 BA21      OUT	0x11,R2
(0059)  PORTE = 0x00;
    0087 B823      OUT	0x03,R2
(0060)  DDRE  = 0x00;
    0088 B822      OUT	0x02,R2
(0061)  PORTF = 0x00;
    0089 92200062  STS	0x62,R2
(0062)  DDRF  = 0x00;
    008B 92200061  STS	0x61,R2
(0063)  PORTG = 0x00;
    008D 92200065  STS	0x65,R2
(0064)  DDRG  = 0x00;
    008F 92200064  STS	0x64,R2
    0091 9508      RET
(0065) }
(0066) 
(0067) //TIMER2 initialize - prescale:64
(0068) // WGM: Normal
(0069) // desired value: 1mSec
(0070) // actual value:  1.000mSec (0.0%)
(0071) void timer2_init(void)
(0072) {
(0073)  TCCR2 = 0x00; //stop
_timer2_init:
    0092 2422      CLR	R2
    0093 BC25      OUT	0x25,R2
(0074)  TCNT2 = 0x83; //setup
    0094 E883      LDI	R24,0x83
    0095 BD84      OUT	0x24,R24
(0075)  OCR2  = 0x7D;
    0096 E78D      LDI	R24,0x7D
    0097 BD83      OUT	0x23,R24
(0076)  TCCR2 = 0x03; //start
    0098 E083      LDI	R24,3
    0099 BD85      OUT	0x25,R24
    009A 9508      RET
_timer0_ovf_isr:
    009B 938A      ST	R24,-Y
    009C B78F      IN	R24,0x3F
    009D 938A      ST	R24,-Y
(0077) }
(0078) 
(0079) 
(0080) #pragma interrupt_handler timer0_ovf_isr:11
(0081) void timer0_ovf_isr(void)
(0082) {
(0083)  TCNT0 = 0x83; //reload counter value
    009E E883      LDI	R24,0x83
    009F BF82      OUT	0x32,R24
(0084)  return;//
    00A0 9189      LD	R24,Y+
    00A1 BF8F      OUT	0x3F,R24
    00A2 9189      LD	R24,Y+
    00A3 9518      RETI
(0085)  /*if (time>500){sec++;time=0;}
(0086)  time++;
(0087)  ADCjohu=ADCL;
(0088)  ADCjohu|=ADCH << 8;
(0089) ///////////////////////////////////////////////////////////////////平均值滤波  1毫秒采样滤波，10毫秒输出
(0090)  if (lvbo==0) {lvbo_num=ADCjohu/2;lvbo++;return;}
(0091)  if (lvbo<10) {lvbo_num+=ADCjohu/2;lvbo++;return;}
(0092)  	else lvbo=0;
(0093) //////////////////////////////////////////////////////////////////////////////
(0094)  if ( (ADCjohu<REF-6) || (ADCjohu>REF+6))
(0095)  	{
(0096) 	 //ADCjohu-=511-10;//-511+31-3.27371     -10
(0097)  	 xx=xx+ADCjohu-REF;//
(0098) 	}
(0099)  ms=1;*/
(0100) }
(0101) 
(0102) //ADC initialize
(0103) // Conversion time: 3uS
(0104) void adc_init(void)
(0105) {
(0106)  ADCSRA = 0x00; //disable adc
_adc_init:
    00A4 2422      CLR	R2
    00A5 B826      OUT	0x06,R2
(0107)  ADMUX = 0x01; //select adc input 0
    00A6 E081      LDI	R24,1
    00A7 B987      OUT	0x07,R24
(0108)  ACSR  = 0x80;
    00A8 E880      LDI	R24,0x80
    00A9 B988      OUT	0x08,R24
(0109)  ADCSRB = 0x00;
    00AA 9220008E  STS	0x8E,R2
(0110)  ADCSRA = 0xEa;
    00AC EE8A      LDI	R24,0xEA
    00AD B986      OUT	0x06,R24
    00AE 9508      RET
_adc_isr:
    00AF 938A      ST	R24,-Y
    00B0 B78F      IN	R24,0x3F
    00B1 938A      ST	R24,-Y
(0111) }
(0112) 
(0113) #pragma interrupt_handler adc_isr:22
(0114) void adc_isr(void)
(0115) {
(0116)  //conversion complete, read value (int) using...
(0117)  // value=ADCL;            //Read 8 low bits first (important)
(0118)  // value|=(int)ADCH << 8; //read 2 high bits and shift into top byte
(0119)  //ADCjohu==ADCL;
(0120)  //ADCjohu|=(int)ADCH << 8;
(0121)  //PORTD=ADCjohu;
(0122)  //adc=1; 
(0123)  //if (v_x==32) return;
(0124)  adc1=1;
    00B2 E081      LDI	R24,1
    00B3 9380012A  STS	adc1,R24
(0125) 
(0126)  //PORTA=ADCL;
(0127)  
(0128)  return;
    00B5 9189      LD	R24,Y+
    00B6 BF8F      OUT	0x3F,R24
    00B7 9189      LD	R24,Y+
    00B8 9518      RETI
(0129) }
(0130) 
(0131) //call this routine to initialize all peripherals
(0132) void init_devices(void)
(0133) {
(0134)  //stop errant interrupts until set up
(0135)  CLI(); //disable all interrupts
_init_devices:
    00B9 94F8      BCLR	7
(0136)  XDIV  = 0x00; //xtal divider
    00BA 2422      CLR	R2
    00BB BE2C      OUT	0x3C,R2
(0137)  XMCRA = 0x00; //external memory
    00BC 9220006D  STS	0x6D,R2
(0138)  port_init();
    00BE DFBF      RCALL	_port_init
(0139)  timer2_init(); 
    00BF DFD2      RCALL	_timer2_init
(0140) 
(0141) //adc_init();
(0142) uart1_init();
    00C0 D00D      RCALL	_uart1_init
(0143) 
(0144)  MCUCR = 0x00;
    00C1 2422      CLR	R2
    00C2 BE25      OUT	0x35,R2
(0145)  EICRA = 0x0A; //extended ext ints
    00C3 E08A      LDI	R24,0xA
    00C4 9380006A  STS	0x6A,R24
(0146)  EICRB = 0x00; //extended ext ints
    00C6 BE2A      OUT	0x3A,R2
(0147)  EIMSK = 0x03;
    00C7 E083      LDI	R24,3
    00C8 BF89      OUT	0x39,R24
(0148)  //TIMSK = 0x40; //timer interrupt sources
(0149)  TIMSK = 0x00;
    00C9 BE27      OUT	0x37,R2
(0150)  ETIMSK = 0x00; //extended timer interrupt sources
    00CA 9220007D  STS	0x7D,R2
(0151)  SEI(); //re-enable interrupts
    00CC 9478      BSET	7
    00CD 9508      RET
(0152)  //all peripherals are now initialized
(0153) }
(0154) //UART1 initialize
(0155) // desired baud rate:19200
(0156) // actual baud rate:19231 (0.2%)
(0157) void uart1_init(void)
(0158) {
(0159)  UCSR1B = 0x00; //disable while setting baud rate
_uart1_init:
    00CE 2422      CLR	R2
    00CF 9220009A  STS	0x9A,R2
(0160)  UCSR1A = 0x00;
    00D1 9220009B  STS	0x9B,R2
(0161)  UCSR1C = 0x06;
    00D3 E086      LDI	R24,6
    00D4 9380009D  STS	0x9D,R24
(0162)  UBRR1L = 0x40; //set baud rate lo
    00D6 E480      LDI	R24,0x40
    00D7 93800099  STS	0x99,R24
(0163)  UBRR1H = 0x00; //set baud rate hi
    00D9 92200098  STS	0x98,R2
(0164)  UCSR1B = 0x98;
    00DB E988      LDI	R24,0x98
    00DC 9380009A  STS	0x9A,R24
    00DE 9508      RET
_uart1_rx_isr:
    00DF 920A      ST	R0,-Y
    00E0 921A      ST	R1,-Y
    00E1 922A      ST	R2,-Y
    00E2 923A      ST	R3,-Y
    00E3 924A      ST	R4,-Y
    00E4 925A      ST	R5,-Y
    00E5 930A      ST	R16,-Y
    00E6 931A      ST	R17,-Y
    00E7 932A      ST	R18,-Y
    00E8 933A      ST	R19,-Y
    00E9 938A      ST	R24,-Y
    00EA 939A      ST	R25,-Y
    00EB 93EA      ST	R30,-Y
    00EC 93FA      ST	R31,-Y
    00ED B60F      IN	R0,0x3F
    00EE 920A      ST	R0,-Y
    00EF 940E0699  CALL	push_gset2
(0165) }
(0166) 
(0167) #pragma interrupt_handler uart1_rx_isr:31
(0168) //cir+00100
(0169) void uart1_rx_isr(void)
(0170) {
(0171)  //uart has received a character in UDR
(0172)  if (all==CIR)
    00F1 91800114  LDS	R24,all
    00F3 3081      CPI	R24,1
    00F4 F009      BEQ	0x00F6
    00F5 C0B8      RJMP	0x01AE
(0173)  	{
(0174) 	   a=b;
    00F6 90200116  LDS	R2,b
    00F8 92200115  STS	a,R2
(0175) 	   b=c;
    00FA 90200117  LDS	R2,c
    00FC 92200116  STS	b,R2
(0176) 	   c=d;
    00FE 90200118  LDS	R2,d
    0100 92200117  STS	c,R2
(0177) 	   d=e;
    0102 90200119  LDS	R2,e
    0104 92200118  STS	d,R2
(0178) 	   e=f;
    0106 9020011A  LDS	R2,f
    0108 92200119  STS	e,R2
(0179) 	   f=UDR1;
    010A 9020009C  LDS	R2,0x9C
    010C 9220011A  STS	f,R2
(0180) 	   if ((f<'0')||(f>'9'))return;
    010E 2D82      MOV	R24,R2
    010F 3380      CPI	R24,0x30
    0110 F018      BCS	0x0114
    0111 E389      LDI	R24,0x39
    0112 1582      CP	R24,R2
    0113 F408      BCC	0x0115
    0114 C1D9      RJMP	0x02EE
(0181) 	   if (a=='+')//0x2b
    0115 91800115  LDS	R24,a
    0117 328B      CPI	R24,0x2B
    0118 F009      BEQ	0x011A
    0119 C041      RJMP	0x015B
(0182) 	   	  {jiaodu=(b-48)*10000+(c-48)*1000+(d-48)*100+(e-48)*10+(f-48);
    011A 91200117  LDS	R18,c
    011C 2733      CLR	R19
    011D EE08      LDI	R16,0xE8
    011E E013      LDI	R17,3
    011F 940E067D  CALL	empy16s
    0121 01C8      MOVW	R24,R16
    0122 5880      SUBI	R24,0x80
    0123 4B9B      SBCI	R25,0xBB
    0124 91200116  LDS	R18,b
    0126 2733      CLR	R19
    0127 E100      LDI	R16,0x10
    0128 E217      LDI	R17,0x27
    0129 940E067D  CALL	empy16s
    012B 01F8      MOVW	R30,R16
    012C 50E0      SUBI	R30,0
    012D 45F3      SBCI	R31,0x53
    012E 0FE8      ADD	R30,R24
    012F 1FF9      ADC	R31,R25
    0130 90200118  LDS	R2,d
    0132 E684      LDI	R24,0x64
    0133 9D82      MUL	R24,R2
    0134 01C0      MOVW	R24,R0
    0135 5C80      SUBI	R24,0xC0
    0136 4192      SBCI	R25,0x12
    0137 0FE8      ADD	R30,R24
    0138 1FF9      ADC	R31,R25
    0139 90200119  LDS	R2,e
    013B E08A      LDI	R24,0xA
    013C 9D82      MUL	R24,R2
    013D 01C0      MOVW	R24,R0
    013E 5E80      SUBI	R24,0xE0
    013F 4091      SBCI	R25,1
    0140 0FE8      ADD	R30,R24
    0141 1FF9      ADC	R31,R25
    0142 9180011A  LDS	R24,f
    0144 2799      CLR	R25
    0145 97C0      SBIW	R24,0x30
    0146 0FE8      ADD	R30,R24
    0147 1FF9      ADC	R31,R25
    0148 011F      MOVW	R2,R30
    0149 2444      CLR	R4
    014A FC37      SBRC	R3,7
    014B 9440      COM	R4
    014C 2455      CLR	R5
    014D FC47      SBRC	R4,7
    014E 9450      COM	R5
    014F 9230011C  STS	jiaodu+1,R3
    0151 9220011B  STS	jiaodu,R2
    0153 9250011E  STS	jiaodu+3,R5
    0155 9240011D  STS	jiaodu+2,R4
(0183) 		   all=0;return;}
    0157 2422      CLR	R2
    0158 92200114  STS	all,R2
    015A C193      RJMP	0x02EE
(0184) 	   else if (a=='-')//0x2d
    015B 91800115  LDS	R24,a
    015D 328D      CPI	R24,0x2D
    015E F009      BEQ	0x0160
    015F C045      RJMP	0x01A5
(0185) 	   	  {jiaodu=-((b-48)*10000+(c-48)*1000+(d-48)*100+(e-48)*10+(f-48));
    0160 91200117  LDS	R18,c
    0162 2733      CLR	R19
    0163 EE08      LDI	R16,0xE8
    0164 E013      LDI	R17,3
    0165 940E067D  CALL	empy16s
    0167 01C8      MOVW	R24,R16
    0168 5880      SUBI	R24,0x80
    0169 4B9B      SBCI	R25,0xBB
    016A 91200116  LDS	R18,b
    016C 2733      CLR	R19
    016D E100      LDI	R16,0x10
    016E E217      LDI	R17,0x27
    016F 940E067D  CALL	empy16s
    0171 01F8      MOVW	R30,R16
    0172 50E0      SUBI	R30,0
    0173 45F3      SBCI	R31,0x53
    0174 0FE8      ADD	R30,R24
    0175 1FF9      ADC	R31,R25
    0176 90200118  LDS	R2,d
    0178 E684      LDI	R24,0x64
    0179 9D82      MUL	R24,R2
    017A 01C0      MOVW	R24,R0
    017B 5C80      SUBI	R24,0xC0
    017C 4192      SBCI	R25,0x12
    017D 0FE8      ADD	R30,R24
    017E 1FF9      ADC	R31,R25
    017F 90200119  LDS	R2,e
    0181 E08A      LDI	R24,0xA
    0182 9D82      MUL	R24,R2
    0183 01C0      MOVW	R24,R0
    0184 5E80      SUBI	R24,0xE0
    0185 4091      SBCI	R25,1
    0186 0FE8      ADD	R30,R24
    0187 1FF9      ADC	R31,R25
    0188 9180011A  LDS	R24,f
    018A 2799      CLR	R25
    018B 97C0      SBIW	R24,0x30
    018C 0FE8      ADD	R30,R24
    018D 1FF9      ADC	R31,R25
    018E 95E0      COM	R30
    018F 95F0      COM	R31
    0190 5FEF      SUBI	R30,0xFF
    0191 4FFF      SBCI	R31,0xFF
    0192 011F      MOVW	R2,R30
    0193 2444      CLR	R4
    0194 FC37      SBRC	R3,7
    0195 9440      COM	R4
    0196 2455      CLR	R5
    0197 FC47      SBRC	R4,7
    0198 9450      COM	R5
    0199 9230011C  STS	jiaodu+1,R3
    019B 9220011B  STS	jiaodu,R2
    019D 9250011E  STS	jiaodu+3,R5
    019F 9240011D  STS	jiaodu+2,R4
(0186) 		   all=0;return;}
    01A1 2422      CLR	R2
    01A2 92200114  STS	all,R2
    01A4 C149      RJMP	0x02EE
(0187) 	   if (a!=0) {all=0;return;}
    01A5 90200115  LDS	R2,a
    01A7 2022      TST	R2
    01A8 F409      BNE	0x01AA
    01A9 C144      RJMP	0x02EE
    01AA 2422      CLR	R2
    01AB 92200114  STS	all,R2
    01AD C140      RJMP	0x02EE
(0188) 	     //PORTF=jiaodu;//while(1);
(0189) 	}
(0190)  else if (all==LINE)
    01AE 91800114  LDS	R24,all
    01B0 3082      CPI	R24,2
    01B1 F009      BEQ	0x01B3
    01B2 C0B8      RJMP	0x026B
(0191)  	{
(0192) 	   a=b;