m64.lst

avr的视频采集

__text_start:
__start:
    005D EFCF      LDI	R28,0xFF
    005E E1D0      LDI	R29,0x10
    005F BFCD      OUT	0x3D,R28
    0060 BFDE      OUT	0x3E,R29
    0061 51C0      SUBI	R28,0x10
    0062 40D0      SBCI	R29,0
    0063 EA0A      LDI	R16,0xAA
    0064 8308      STD	Y+0,R16
    0065 2400      CLR	R0
    0066 E2ED      LDI	R30,0x2D
    0067 E0F1      LDI	R31,1
    0068 E017      LDI	R17,7
    0069 32EF      CPI	R30,0x2F
    006A 07F1      CPC	R31,R17
    006B F011      BEQ	0x006E
    006C 9201      ST	R0,Z+
    006D CFFB      RJMP	0x0069
    006E 8300      STD	Z+0,R16
    006F E8EC      LDI	R30,0x8C
    0070 E0F0      LDI	R31,0
    0071 E0A0      LDI	R26,0
    0072 E0B1      LDI	R27,1
    0073 E010      LDI	R17,0
    0074 3BE9      CPI	R30,0xB9
    0075 07F1      CPC	R31,R17
    0076 F021      BEQ	0x007B
    0077 95C8      LPM
    0078 9631      ADIW	R30,1
    0079 920D      ST	R0,X+
    007A CFF9      RJMP	0x0074
    007B 940E04C4  CALL	_main
_exit:
    007D CFFF      RJMP	_exit
FILE: D:\PROTEU~1.7\PROTEU~1.7\JOHU\1视频处理\fang__2\main.c
(0001) //////////////////////////////
(0002) //////////////////////////////   22967为近似180度
(0003) 
(0004) #include <iom64v.h>
(0005) #include <macros.h>
(0006) 
(0007) #define PREVSONG   BIT(2)
(0008) #define NEXTSONG   BIT(3)
(0009) #define VOLDOWN    BIT(4)
(0010) #define VOLUP      BIT(5)
(0011) #define STOP       BIT(6)
(0012) 
(0013) #define R_pwm0       BIT(4)
(0014) #define R_pwm1       BIT(5)
(0015) #define L_pwm0       BIT(6)
(0016) #define L_pwm1       BIT(7)
(0017) 
(0018) 
(0019) long ADCjohu=0;
(0020) int ms=0;
(0021) long xx=0;
(0022) //int adc=0;
(0023) 
(0024) #define REF 483
(0025) unsigned char lvbo=0;
(0026) long lvbo_num=0;
(0027) 
(0028) unsigned char pwm_pingjun=254;//平均速度
(0029) unsigned char Rpwm0=0;
(0030) unsigned char Rpwm1=0;
(0031) unsigned char Lpwm0=0;
(0032) unsigned char Lpwm1=0;
(0033) unsigned char all=0, a=0,b=0,c=0,d=0,e=0,f=0;
(0034) #define CIR 1
(0035) #define LINE 2
(0036) #define CLS 3
(0037) long jiaodu=0,juli=0;
(0038) int time=0;
(0039) unsigned char sec=0;
(0040) 
(0041) #define video_x 32
(0042) #define video_y 48
(0043) unsigned int  v_num=0;
(0044) unsigned char v_temp[video_y][video_x],chang=0,hang=0,   adc1=0;;
(0045) 
(0046) unsigned char x_adc;
(0047) unsigned char  y_adc;
(0048) 
(0049) void port_init(void)
(0050) {
(0051)  PORTA = 0x00;
_port_init:
    007E 2422      CLR	R2
    007F BA2B      OUT	0x1B,R2
(0052)  DDRA  = 0x00;
    0080 BA2A      OUT	0x1A,R2
(0053)  PORTB = 0x00;
    0081 BA28      OUT	0x18,R2
(0054)  DDRB  = 0x00;
    0082 BA27      OUT	0x17,R2
(0055)  PORTC = 0x00; //m103 output only
    0083 BA25      OUT	0x15,R2
(0056)  DDRC  = 0x00;
    0084 BA24      OUT	0x14,R2
(0057)  PORTD = 0x00;
    0085 BA22      OUT	0x12,R2
(0058)  DDRD  = 0x00;
    0086 BA21      OUT	0x11,R2
(0059)  PORTE = 0x00;
    0087 B823      OUT	0x03,R2
(0060)  DDRE  = 0x00;
    0088 B822      OUT	0x02,R2
(0061)  PORTF = 0x00;
    0089 92200062  STS	0x62,R2
(0062)  DDRF  = 0x00;
    008B 92200061  STS	0x61,R2
(0063)  PORTG = 0x00;
    008D 92200065  STS	0x65,R2
(0064)  DDRG  = 0x00;
    008F 92200064  STS	0x64,R2
    0091 9508      RET
(0065) }
(0066) 
(0067) 
(0068) //call this routine to initialize all peripherals
(0069) void init_devices(void)
(0070) {
(0071)  //stop errant interrupts until set up
(0072)  CLI(); //disable all interrupts
_init_devices:
    0092 94F8      BCLR	7
(0073)  XDIV  = 0x00; //xtal divider
    0093 2422      CLR	R2
    0094 BE2C      OUT	0x3C,R2
(0074)  XMCRA = 0x00; //external memory
    0095 9220006D  STS	0x6D,R2
(0075)  port_init();
    0097 DFE6      RCALL	_port_init
(0076) //adc_init();
(0077) uart1_init();
    0098 D00D      RCALL	_uart1_init
(0078) 
(0079)  MCUCR = 0x00;
    0099 2422      CLR	R2
    009A BE25      OUT	0x35,R2
(0080)  EICRA = 0x0A; //extended ext ints
    009B E08A      LDI	R24,0xA
    009C 9380006A  STS	0x6A,R24
(0081)  EICRB = 0x00; //extended ext ints
    009E BE2A      OUT	0x3A,R2
(0082)  EIMSK = 0x03;
    009F E083      LDI	R24,3
    00A0 BF89      OUT	0x39,R24
(0083)  //TIMSK = 0x40; //timer interrupt sources
(0084)  TIMSK = 0x00;
    00A1 BE27      OUT	0x37,R2
(0085)  ETIMSK = 0x00; //extended timer interrupt sources
    00A2 9220007D  STS	0x7D,R2
(0086)  SEI(); //re-enable interrupts
    00A4 9478      BSET	7
    00A5 9508      RET
(0087)  //all peripherals are now initialized
(0088) }
(0089) //UART1 initialize
(0090) // desired baud rate:19200
(0091) // actual baud rate:19231 (0.2%)
(0092) void uart1_init(void)
(0093) {
(0094)  UCSR1B = 0x00; //disable while setting baud rate
_uart1_init:
    00A6 2422      CLR	R2
    00A7 9220009A  STS	0x9A,R2
(0095)  UCSR1A = 0x00;
    00A9 9220009B  STS	0x9B,R2
(0096)  UCSR1C = 0x06;
    00AB E086      LDI	R24,6
    00AC 9380009D  STS	0x9D,R24
(0097)  UBRR1L = 0x40; //set baud rate lo
    00AE E480      LDI	R24,0x40
    00AF 93800099  STS	0x99,R24
(0098)  UBRR1H = 0x00; //set baud rate hi
    00B1 92200098  STS	0x98,R2
(0099)  UCSR1B = 0x98;
    00B3 E988      LDI	R24,0x98
    00B4 9380009A  STS	0x9A,R24
    00B6 9508      RET
_uart1_rx_isr:
    00B7 920A      ST	R0,-Y
    00B8 921A      ST	R1,-Y
    00B9 922A      ST	R2,-Y
    00BA 923A      ST	R3,-Y
    00BB 924A      ST	R4,-Y
    00BC 925A      ST	R5,-Y
    00BD 930A      ST	R16,-Y
    00BE 931A      ST	R17,-Y
    00BF 932A      ST	R18,-Y
    00C0 933A      ST	R19,-Y
    00C1 938A      ST	R24,-Y
    00C2 939A      ST	R25,-Y
    00C3 93EA      ST	R30,-Y
    00C4 93FA      ST	R31,-Y
    00C5 B60F      IN	R0,0x3F
    00C6 920A      ST	R0,-Y
    00C7 940E06BC  CALL	push_gset2
(0100) }
(0101) 
(0102) #pragma interrupt_handler uart1_rx_isr:31
(0103) //cir+00100
(0104) void uart1_rx_isr(void)
(0105) {
(0106)  //uart has received a character in UDR
(0107)  if (all==CIR)
    00C9 91800114  LDS	R24,all
    00CB 3081      CPI	R24,1
    00CC F009      BEQ	0x00CE
    00CD C0B8      RJMP	0x0186
(0108)  	{
(0109) 	   a=b;
    00CE 90200116  LDS	R2,b
    00D0 92200115  STS	a,R2
(0110) 	   b=c;
    00D2 90200117  LDS	R2,c
    00D4 92200116  STS	b,R2
(0111) 	   c=d;
    00D6 90200118  LDS	R2,d
    00D8 92200117  STS	c,R2
(0112) 	   d=e;
    00DA 90200119  LDS	R2,e
    00DC 92200118  STS	d,R2
(0113) 	   e=f;
    00DE 9020011A  LDS	R2,f
    00E0 92200119  STS	e,R2
(0114) 	   f=UDR1;
    00E2 9020009C  LDS	R2,0x9C
    00E4 9220011A  STS	f,R2
(0115) 	   if ((f<'0')||(f>'9'))return;
    00E6 2D82      MOV	R24,R2
    00E7 3380      CPI	R24,0x30
    00E8 F018      BCS	0x00EC
    00E9 E389      LDI	R24,0x39
    00EA 1582      CP	R24,R2
    00EB F408      BCC	0x00ED
    00EC C1D9      RJMP	0x02C6
(0116) 	   if (a=='+')//0x2b
    00ED 91800115  LDS	R24,a
    00EF 328B      CPI	R24,0x2B
    00F0 F009      BEQ	0x00F2
    00F1 C041      RJMP	0x0133
(0117) 	   	  {jiaodu=(b-48)*10000+(c-48)*1000+(d-48)*100+(e-48)*10+(f-48);
    00F2 91200117  LDS	R18,c
    00F4 2733      CLR	R19
    00F5 EE08      LDI	R16,0xE8
    00F6 E013      LDI	R17,3
    00F7 940E06A0  CALL	empy16s
    00F9 01C8      MOVW	R24,R16
    00FA 5880      SUBI	R24,0x80
    00FB 4B9B      SBCI	R25,0xBB
    00FC 91200116  LDS	R18,b
    00FE 2733      CLR	R19
    00FF E100      LDI	R16,0x10
    0100 E217      LDI	R17,0x27
    0101 940E06A0  CALL	empy16s
    0103 01F8      MOVW	R30,R16
    0104 50E0      SUBI	R30,0
    0105 45F3      SBCI	R31,0x53
    0106 0FE8      ADD	R30,R24
    0107 1FF9      ADC	R31,R25
    0108 90200118  LDS	R2,d
    010A E684      LDI	R24,0x64
    010B 9D82      MUL	R24,R2
    010C 01C0      MOVW	R24,R0
    010D 5C80      SUBI	R24,0xC0
    010E 4192      SBCI	R25,0x12
    010F 0FE8      ADD	R30,R24
    0110 1FF9      ADC	R31,R25
    0111 90200119  LDS	R2,e
    0113 E08A      LDI	R24,0xA
    0114 9D82      MUL	R24,R2
    0115 01C0      MOVW	R24,R0
    0116 5E80      SUBI	R24,0xE0
    0117 4091      SBCI	R25,1
    0118 0FE8      ADD	R30,R24
    0119 1FF9      ADC	R31,R25
    011A 9180011A  LDS	R24,f
    011C 2799      CLR	R25
    011D 97C0      SBIW	R24,0x30
    011E 0FE8      ADD	R30,R24
    011F 1FF9      ADC	R31,R25
    0120 011F      MOVW	R2,R30
    0121 2444      CLR	R4
    0122 FC37      SBRC	R3,7
    0123 9440      COM	R4
    0124 2455      CLR	R5
    0125 FC47      SBRC	R4,7
    0126 9450      COM	R5
    0127 9230011C  STS	jiaodu+1,R3
    0129 9220011B  STS	jiaodu,R2
    012B 9250011E  STS	jiaodu+3,R5
    012D 9240011D  STS	jiaodu+2,R4
(0118) 		   all=0;return;}
    012F 2422      CLR	R2
    0130 92200114  STS	all,R2
    0132 C193      RJMP	0x02C6
(0119) 	   else if (a=='-')//0x2d
    0133 91800115  LDS	R24,a
    0135 328D      CPI	R24,0x2D
    0136 F009      BEQ	0x0138
    0137 C045      RJMP	0x017D
(0120) 	   	  {jiaodu=-((b-48)*10000+(c-48)*1000+(d-48)*100+(e-48)*10+(f-48));
    0138 91200117  LDS	R18,c
    013A 2733      CLR	R19
    013B EE08      LDI	R16,0xE8
    013C E013      LDI	R17,3
    013D 940E06A0  CALL	empy16s
    013F 01C8      MOVW	R24,R16
    0140 5880      SUBI	R24,0x80
    0141 4B9B      SBCI	R25,0xBB
    0142 91200116  LDS	R18,b
    0144 2733      CLR	R19
    0145 E100      LDI	R16,0x10
    0146 E217      LDI	R17,0x27
    0147 940E06A0  CALL	empy16s
    0149 01F8      MOVW	R30,R16
    014A 50E0      SUBI	R30,0
    014B 45F3      SBCI	R31,0x53
    014C 0FE8      ADD	R30,R24
    014D 1FF9      ADC	R31,R25
    014E 90200118  LDS	R2,d
    0150 E684      LDI	R24,0x64
    0151 9D82      MUL	R24,R2
    0152 01C0      MOVW	R24,R0
    0153 5C80      SUBI	R24,0xC0
    0154 4192      SBCI	R25,0x12
    0155 0FE8      ADD	R30,R24
    0156 1FF9      ADC	R31,R25
    0157 90200119  LDS	R2,e
    0159 E08A      LDI	R24,0xA
    015A 9D82      MUL	R24,R2
    015B 01C0      MOVW	R24,R0
    015C 5E80      SUBI	R24,0xE0
    015D 4091      SBCI	R25,1
    015E 0FE8      ADD	R30,R24
    015F 1FF9      ADC	R31,R25
    0160 9180011A  LDS	R24,f
    0162 2799      CLR	R25
    0163 97C0      SBIW	R24,0x30
    0164 0FE8      ADD	R30,R24
    0165 1FF9      ADC	R31,R25
    0166 95E0      COM	R30
    0167 95F0      COM	R31
    0168 5FEF      SUBI	R30,0xFF
    0169 4FFF      SBCI	R31,0xFF
    016A 011F      MOVW	R2,R30
    016B 2444      CLR	R4
    016C FC37      SBRC	R3,7
    016D 9440      COM	R4
    016E 2455      CLR	R5
    016F FC47      SBRC	R4,7
    0170 9450      COM	R5
    0171 9230011C  STS	jiaodu+1,R3
    0173 9220011B  STS	jiaodu,R2
    0175 9250011E  STS	jiaodu+3,R5
    0177 9240011D  STS	jiaodu+2,R4
(0121) 		   all=0;return;}
    0179 2422      CLR	R2
    017A 92200114  STS	all,R2
    017C C149      RJMP	0x02C6
(0122) 	   if (a!=0) {all=0;return;}
    017D 90200115  LDS	R2,a
    017F 2022      TST	R2
    0180 F409      BNE	0x0182
    0181 C144      RJMP	0x02C6
    0182 2422      CLR	R2
    0183 92200114  STS	all,R2
    0185 C140      RJMP	0x02C6
(0123) 	     //PORTF=jiaodu;//while(1);
(0124) 	}
(0125)  else if (all==LINE)
    0186 91800114  LDS	R24,all
    0188 3082      CPI	R24,2
    0189 F009      BEQ	0x018B
    018A C0B8      RJMP	0x0243
(0126)  	{
(0127) 	   a=b;
    018B 90200116  LDS	R2,b
    018D 92200115  STS	a,R2
(0128) 	   b=c;
    018F 90200117  LDS	R2,c
    0191 92200116  STS	b,R2
(0129) 	   c=d;
    0193 90200118  LDS	R2,d
    0195 92200117  STS	c,R2
(0130) 	   d=e;
    0197 90200119  LDS	R2,e
    0199 92200118  STS	d,R2
(0131) 	   e=f;
    019B 9020011A  LDS	R2,f
    019D 92200119  STS	e,R2
(0132) 	   f=UDR1;
    019F 9020009C  LDS	R2,0x9C
    01A1 9220011A  STS	f,R2
(0133) 	   if ((f<'0')||(f>'9'))return;
    01A3 2D82      MOV	R24,R2
    01A4 3380      CPI	R24,0x30
    01A5 F018      BCS	0x01A9
    01A6 E389      LDI	R24,0x39
    01A7 1582      CP	R24,R2
    01A8 F408      BCC	0x01AA
    01A9 C11C      RJMP	0x02C6
(0134) 	   if (a=='+')
    01AA 91800115  LDS	R24,a
    01AC 328B      CPI	R24,0x2B
    01AD F009      BEQ	0x01AF
    01AE C041      RJMP	0x01F0
(0135) 	   	  {juli=(b-48)*10000+(c-48)*1000+(d-48)*100+(e-48)*10+(f-48);
    01AF 91200117  LDS	R18,c
    01B1 2733      CLR	R19
    01B2 EE08      LDI	R16,0xE8
    01B3 E013      LDI	R17,3
    01B4 940E06A0  CALL	empy16s
    01B6 01C8      MOVW	R24,R16
    01B7 5880      SUBI	R24,0x80
    01B8 4B9B      SBCI	R25,0xBB
    01B9 91200116  LDS	R18,b
    01BB 2733      CLR	R19
    01BC E100      LDI	R16,0x10
    01BD E217      LDI	R17,0x27
    01BE 940E06A0  CALL	empy16s
    01C0 01F8      MOVW	R30,R16
    01C1 50E0      SUBI	R30,0
    01C2 45F3      SBCI	R31,0x53
    01C3 0FE8      ADD	R30,R24
    01C4 1FF9      ADC	R31,R25
    01C5 90200118  LDS	R2,d
    01C7 E684      LDI	R24,0x64
    01C8 9D82      MUL	R24,R2
    01C9 01C0      MOVW	R24,R0
    01CA 5C80      SUBI	R24,0xC0
    01CB 4192      SBCI	R25,0x12
    01CC 0FE8      ADD	R30,R24
    01CD 1FF9      ADC	R31,R25
    01CE 90200119  LDS	R2,e
    01D0 E08A      LDI	R24,0xA
    01D1 9D82      MUL	R24,R2
    01D2 01C0      MOVW	R24,R0
    01D3 5E80      SUBI	R24,0xE0
    01D4 4091      SBCI	R25,1
    01D5 0FE8      ADD	R30,R24
    01D6 1FF9      ADC	R31,R25
    01D7 9180011A  LDS	R24,f
    01D9 2799      CLR	R25
    01DA 97C0      SBIW	R24,0x30
    01DB 0FE8      ADD	R30,R24
    01DC 1FF9      ADC	R31,R25
    01DD 011F      MOVW	R2,R30
    01DE 2444      CLR	R4
    01DF FC37      SBRC	R3,7
    01E0 9440      COM	R4
    01E1 2455      CLR	R5
    01E2 FC47      SBRC	R4,7
    01E3 9450      COM	R5
    01E4 92300120  STS	juli+1,R3
    01E6 9220011F  STS	juli,R2
    01E8 92500122  STS	juli+3,R5
    01EA 92400121  STS	juli+2,R4
(0136) 		   all=0;return;}
    01EC 2422      CLR	R2
    01ED 92200114  STS	all,R2
    01EF C0D6      RJMP	0x02C6
(0137) 	   else if (a=='-')
    01F0 91800115  LDS	R24,a
    01F2 328D      CPI	R24,0x2D
    01F3 F009      BEQ	0x01F5
    01F4 C045      RJMP	0x023A
(0138) 	   	  {juli=-((b-48)*10000+(c-48)*1000+(d-48)*100+(e-48)*10+(f-48));
    01F5 91200117  LDS	R18,c