rca_cy1c12_board.tan.qmsg

使用RTL8019芯片进行以太网通讯的VERILOG源代码.

{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "PLD_CLOCKINPUT\[1\] register rca_cy1c12_board:inst\|cpu_0:the_cpu_0\|W_alu_result\[18\] memory rca_cy1c12_board:inst\|payload_buffer:the_payload_buffer\|altsyncram:the_altsyncram\|altsyncram_7q01:auto_generated\|ram_block1a13~porta_address_reg9 48.02 MHz 20.826 ns Internal " "Info: Clock \"PLD_CLOCKINPUT\[1\]\" has Internal fmax of 48.02 MHz between source register \"rca_cy1c12_board:inst\|cpu_0:the_cpu_0\|W_alu_result\[18\]\" and destination memory \"rca_cy1c12_board:inst\|payload_buffer:the_payload_buffer\|altsyncram:the_altsyncram\|altsyncram_7q01:auto_generated\|ram_block1a13~porta_address_reg9\" (period= 20.826 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "20.654 ns + Longest register memory " "Info: + Longest register to memory delay is 20.654 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns rca_cy1c12_board:inst\|cpu_0:the_cpu_0\|W_alu_result\[18\] 1 REG LC_X37_Y10_N2 5 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X37_Y10_N2; Fanout = 5; REG Node = 'rca_cy1c12_board:inst\|cpu_0:the_cpu_0\|W_alu_result\[18\]'" {  } { { "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" "" { Report "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" Compiler "rca_cy1c12_board" "UNKNOWN" "V1" "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board.quartus_db" { Floorplan "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/" "" "" { rca_cy1c12_board:inst|cpu_0:the_cpu_0|W_alu_result[18] } "NODE_NAME" } "" } } { "cpu_0.v" "" { Text "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/cpu_0.v" 580 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.795 ns) + CELL(0.442 ns) 2.237 ns rca_cy1c12_board:inst\|jtag_uart_0_avalon_jtag_slave_arbitrator:the_jtag_uart_0_avalon_jtag_slave\|cpu_0_data_master_requests_jtag_uart_0_avalon_jtag_slave~381 2 COMB LC_X32_Y8_N9 6 " "Info: 2: + IC(1.795 ns) + CELL(0.442 ns) = 2.237 ns; Loc. = LC_X32_Y8_N9; Fanout = 6; COMB Node = 'rca_cy1c12_board:inst\|jtag_uart_0_avalon_jtag_slave_arbitrator:the_jtag_uart_0_avalon_jtag_slave\|cpu_0_data_master_requests_jtag_uart_0_avalon_jtag_slave~381'" {  } { { "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" "" { Report "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" Compiler "rca_cy1c12_board" "UNKNOWN" "V1" "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board.quartus_db" { Floorplan "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/" "" "2.237 ns" { rca_cy1c12_board:inst|cpu_0:the_cpu_0|W_alu_result[18] rca_cy1c12_board:inst|jtag_uart_0_avalon_jtag_slave_arbitrator:the_jtag_uart_0_avalon_jtag_slave|cpu_0_data_master_requests_jtag_uart_0_avalon_jtag_slave~381 } "NODE_NAME" } "" } } { "rca_cy1c12_board.v" "" { Text "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/rca_cy1c12_board.v" 1701 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.972 ns) + CELL(0.114 ns) 4.323 ns rca_cy1c12_board:inst\|payload_buffer_s1_arbitrator:the_payload_buffer_s1\|cpu_0_data_master_requests_payload_buffer_s1~303 3 COMB LC_X32_Y10_N0 52 " "Info: 3: + IC(1.972 ns) + CELL(0.114 ns) = 4.323 ns; Loc. = LC_X32_Y10_N0; Fanout = 52; COMB Node = 'rca_cy1c12_board:inst\|payload_buffer_s1_arbitrator:the_payload_buffer_s1\|cpu_0_data_master_requests_payload_buffer_s1~303'" {  } { { "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" "" { Report "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" Compiler "rca_cy1c12_board" "UNKNOWN" "V1" "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board.quartus_db" { Floorplan "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/" "" "2.086 ns" { rca_cy1c12_board:inst|jtag_uart_0_avalon_jtag_slave_arbitrator:the_jtag_uart_0_avalon_jtag_slave|cpu_0_data_master_requests_jtag_uart_0_avalon_jtag_slave~381 rca_cy1c12_board:inst|payload_buffer_s1_arbitrator:the_payload_buffer_s1|cpu_0_data_master_requests_payload_buffer_s1~303 } "NODE_NAME" } "" } } { "rca_cy1c12_board.v" "" { Text "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/rca_cy1c12_board.v" 1957 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.213 ns) + CELL(0.442 ns) 6.978 ns rca_cy1c12_board:inst\|payload_buffer_s1_arbitrator:the_payload_buffer_s1\|cpu_0_data_master_qualified_request_payload_buffer_s1~168 4 COMB LC_X31_Y10_N5 1 " "Info: 4: + IC(2.213 ns) + CELL(0.442 ns) = 6.978 ns; Loc. = LC_X31_Y10_N5; Fanout = 1; COMB Node = 'rca_cy1c12_board:inst\|payload_buffer_s1_arbitrator:the_payload_buffer_s1\|cpu_0_data_master_qualified_request_payload_buffer_s1~168'" {  } { { "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" "" { Report "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" Compiler "rca_cy1c12_board" "UNKNOWN" "V1" "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board.quartus_db" { Floorplan "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/" "" "2.655 ns" { rca_cy1c12_board:inst|payload_buffer_s1_arbitrator:the_payload_buffer_s1|cpu_0_data_master_requests_payload_buffer_s1~303 rca_cy1c12_board:inst|payload_buffer_s1_arbitrator:the_payload_buffer_s1|cpu_0_data_master_qualified_request_payload_buffer_s1~168 } "NODE_NAME" } "" } } { "rca_cy1c12_board.v" "" { Text "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/rca_cy1c12_board.v" 1955 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.434 ns) + CELL(0.114 ns) 7.526 ns rca_cy1c12_board:inst\|payload_buffer_s1_arbitrator:the_payload_buffer_s1\|cpu_0_data_master_qualified_request_payload_buffer_s1~169 5 COMB LC_X31_Y10_N7 16 " "Info: 5: + IC(0.434 ns) + CELL(0.114 ns) = 7.526 ns; Loc. = LC_X31_Y10_N7; Fanout = 16; COMB Node = 'rca_cy1c12_board:inst\|payload_buffer_s1_arbitrator:the_payload_buffer_s1\|cpu_0_data_master_qualified_request_payload_buffer_s1~169'" {  } { { "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" "" { Report "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" Compiler "rca_cy1c12_board" "UNKNOWN" "V1" "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board.quartus_db" { Floorplan "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/" "" "0.548 ns" { rca_cy1c12_board:inst|payload_buffer_s1_arbitrator:the_payload_buffer_s1|cpu_0_data_master_qualified_request_payload_buffer_s1~168 rca_cy1c12_board:inst|payload_buffer_s1_arbitrator:the_payload_buffer_s1|cpu_0_data_master_qualified_request_payload_buffer_s1~169 } "NODE_NAME" } "" } } { "rca_cy1c12_board.v" "" { Text "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/rca_cy1c12_board.v" 1955 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.300 ns) + CELL(0.442 ns) 11.268 ns rca_cy1c12_board:inst\|payload_buffer_s1_arbitrator:the_payload_buffer_s1\|payload_buffer_s1_grant_vector\[1\]~117 6 COMB LC_X32_Y11_N8 19 " "Info: 6: + IC(3.300 ns) + CELL(0.442 ns) = 11.268 ns; Loc. = LC_X32_Y11_N8; Fanout = 19; COMB Node = 'rca_cy1c12_board:inst\|payload_buffer_s1_arbitrator:the_payload_buffer_s1\|payload_buffer_s1_grant_vector\[1\]~117'" {  } { { "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" "" { Report "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" Compiler "rca_cy1c12_board" "UNKNOWN" "V1" "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board.quartus_db" { Floorplan "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/" "" "3.742 ns" { rca_cy1c12_board:inst|payload_buffer_s1_arbitrator:the_payload_buffer_s1|cpu_0_data_master_qualified_request_payload_buffer_s1~169 rca_cy1c12_board:inst|payload_buffer_s1_arbitrator:the_payload_buffer_s1|payload_buffer_s1_grant_vector[1]~117 } "NODE_NAME" } "" } } { "rca_cy1c12_board.v" "" { Text "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/rca_cy1c12_board.v" 2035 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.074 ns) + CELL(0.292 ns) 13.634 ns rca_cy1c12_board:inst\|payload_buffer_s1_arbitrator:the_payload_buffer_s1\|payload_buffer_s1_address\[9\]~134 7 COMB LC_X36_Y14_N0 32 " "Info: 7: + IC(2.074 ns) + CELL(0.292 ns) = 13.634 ns; Loc. = LC_X36_Y14_N0; Fanout = 32; COMB Node = 'rca_cy1c12_board:inst\|payload_buffer_s1_arbitrator:the_payload_buffer_s1\|payload_buffer_s1_address\[9\]~134'" {  } { { "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" "" { Report "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" Compiler "rca_cy1c12_board" "UNKNOWN" "V1" "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board.quartus_db" { Floorplan "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/" "" "2.366 ns" { rca_cy1c12_board:inst|payload_buffer_s1_arbitrator:the_payload_buffer_s1|payload_buffer_s1_grant_vector[1]~117 rca_cy1c12_board:inst|payload_buffer_s1_arbitrator:the_payload_buffer_s1|payload_buffer_s1_address[9]~134 } "NODE_NAME" } "" } } { "rca_cy1c12_board.v" "" { Text "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/rca_cy1c12_board.v" 1963 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(6.637 ns) + CELL(0.383 ns) 20.654 ns rca_cy1c12_board:inst\|payload_buffer:the_payload_buffer\|altsyncram:the_altsyncram\|altsyncram_7q01:auto_generated\|ram_block1a13~porta_address_reg9 8 MEM M4K_X19_Y24 1 " "Info: 8: + IC(6.637 ns) + CELL(0.383 ns) = 20.654 ns; Loc. = M4K_X19_Y24; Fanout = 1; MEM Node = 'rca_cy1c12_board:inst\|payload_buffer:the_payload_buffer\|altsyncram:the_altsyncram\|altsyncram_7q01:auto_generated\|ram_block1a13~porta_address_reg9'" {  } { { "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" "" { Report "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" Compiler "rca_cy1c12_board" "UNKNOWN" "V1" "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board.quartus_db" { Floorplan "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/" "" "7.020 ns" { rca_cy1c12_board:inst|payload_buffer_s1_arbitrator:the_payload_buffer_s1|payload_buffer_s1_address[9]~134 rca_cy1c12_board:inst|payload_buffer:the_payload_buffer|altsyncram:the_altsyncram|altsyncram_7q01:auto_generated|ram_block1a13~porta_address_reg9 } "NODE_NAME" } "" } } { "db/altsyncram_7q01.tdf" "" { Text "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/altsyncram_7q01.tdf" 287 2 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.229 ns 10.79 % " "Info: Total cell delay = 2.229 ns ( 10.79 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "18.425 ns 89.21 % " "Info: Total interconnect delay = 18.425 ns ( 89.21 % )" {  } {  } 0}  } { { "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" "" { Report "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" Compiler "rca_cy1c12_board" "UNKNOWN" "V1" "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board.quartus_db" { Floorplan "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/" "" "20.654 ns" { rca_cy1c12_board:inst|cpu_0:the_cpu_0|W_alu_result[18] rca_cy1c12_board:inst|jtag_uart_0_avalon_jtag_slave_arbitrator:the_jtag_uart_0_avalon_jtag_slave|cpu_0_data_master_requests_jtag_uart_0_avalon_jtag_slave~381 rca_cy1c12_board:inst|payload_buffer_s1_arbitrator:the_payload_buffer_s1|cpu_0_data_master_requests_payload_buffer_s1~303 rca_cy1c12_board:inst|payload_buffer_s1_arbitrator:the_payload_buffer_s1|cpu_0_data_master_qualified_request_payload_buffer_s1~168 rca_cy1c12_board:inst|payload_buffer_s1_arbitrator:the_payload_buffer_s1|cpu_0_data_master_qualified_request_payload_buffer_s1~169 rca_cy1c12_board:inst|payload_buffer_s1_arbitrator:the_payload_buffer_s1|payload_buffer_s1_grant_vector[1]~117 rca_cy1c12_board:inst|payload_buffer_s1_arbitrator:the_payload_buffer_s1|payload_buffer_s1_address[9]~134 rca_cy1c12_board:inst|payload_buffer:the_payload_buffer|altsyncram:the_altsyncram|altsyncram_7q01:auto_generated|ram_block1a13~porta_address_reg9 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "20.654 ns" { rca_cy1c12_board:inst|cpu_0:the_cpu_0|W_alu_result[18] rca_cy1c12_board:inst|jtag_uart_0_avalon_jtag_slave_arbitrator:the_jtag_uart_0_avalon_jtag_slave|cpu_0_data_master_requests_jtag_uart_0_avalon_jtag_slave~381 rca_cy1c12_board:inst|payload_buffer_s1_arbitrator:the_payload_buffer_s1|cpu_0_data_master_requests_payload_buffer_s1~303 rca_cy1c12_board:inst|payload_buffer_s1_arbitrator:the_payload_buffer_s1|cpu_0_data_master_qualified_request_payload_buffer_s1~168 rca_cy1c12_board:inst|payload_buffer_s1_arbitrator:the_payload_buffer_s1|cpu_0_data_master_qualified_request_payload_buffer_s1~169 rca_cy1c12_board:inst|payload_buffer_s1_arbitrator:the_payload_buffer_s1|payload_buffer_s1_grant_vector[1]~117 rca_cy1c12_board:inst|payload_buffer_s1_arbitrator:the_payload_buffer_s1|payload_buffer_s1_address[9]~134 rca_cy1c12_board:inst|payload_buffer:the_payload_buffer|altsyncram:the_altsyncram|altsyncram_7q01:auto_generated|ram_block1a13~porta_address_reg9 } { 0.000ns 1.795ns 1.972ns 2.213ns 0.434ns 3.300ns 2.074ns 6.637ns } { 0.000ns 0.442ns 0.114ns 0.442ns 0.114ns 0.442ns 0.292ns 0.383ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.145 ns - Smallest " "Info: - Smallest clock skew is 0.145 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "PLD_CLOCKINPUT\[1\] destination 3.256 ns + Shortest memory " "Info: + Shortest clock path from clock \"PLD_CLOCKINPUT\[1\]\" to destination memory is 3.256 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns PLD_CLOCKINPUT\[1\] 1 CLK PIN_153 1595 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_153; Fanout = 1595; CLK Node = 'PLD_CLOCKINPUT\[1\]'" {  } { { "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" "" { Report "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" Compiler "rca_cy1c12_board" "UNKNOWN" "V1" "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board.quartus_db" { Floorplan "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/" "" "" { PLD_CLOCKINPUT[1] } "NODE_NAME" } "" } } { "rca_cy1c12_board_top.bdf" "" { Schematic "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/rca_cy1c12_board_top.bdf" { { 64 408 576 80 "PLD_CLOCKINPUT\[1\]" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.065 ns) + CELL(0.722 ns) 3.256 ns rca_cy1c12_board:inst\|payload_buffer:the_payload_buffer\|altsyncram:the_altsyncram\|altsyncram_7q01:auto_generated\|ram_block1a13~porta_address_reg9 2 MEM M4K_X19_Y24 1 " "Info: 2: + IC(1.065 ns) + CELL(0.722 ns) = 3.256 ns; Loc. = M4K_X19_Y24; Fanout = 1; MEM Node = 'rca_cy1c12_board:inst\|payload_buffer:the_payload_buffer\|altsyncram:the_altsyncram\|altsyncram_7q01:auto_generated\|ram_block1a13~porta_address_reg9'" {  } { { "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" "" { Report "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" Compiler "rca_cy1c12_board" "UNKNOWN" "V1" "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board.quartus_db" { Floorplan "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/" "" "1.787 ns" { PLD_CLOCKINPUT[1] rca_cy1c12_board:inst|payload_buffer:the_payload_buffer|altsyncram:the_altsyncram|altsyncram_7q01:auto_generated|ram_block1a13~porta_address_reg9 } "NODE_NAME" } "" } } { "db/altsyncram_7q01.tdf" "" { Text "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/altsyncram_7q01.tdf" 287 2 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.191 ns 67.29 % " "Info: Total cell delay = 2.191 ns ( 67.29 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.065 ns 32.71 % " "Info: Total interconnect delay = 1.065 ns ( 32.71 % )" {  } {  } 0}  } { { "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" "" { Report "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" Compiler "rca_cy1c12_board" "UNKNOWN" "V1" "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board.quartus_db" { Floorplan "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/" "" "3.256 ns" { PLD_CLOCKINPUT[1] rca_cy1c12_board:inst|payload_buffer:the_payload_buffer|altsyncram:the_altsyncram|altsyncram_7q01:auto_generated|ram_block1a13~porta_address_reg9 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.256 ns" { PLD_CLOCKINPUT[1] PLD_CLOCKINPUT[1]~out0 rca_cy1c12_board:inst|payload_buffer:the_payload_buffer|altsyncram:the_altsyncram|altsyncram_7q01:auto_generated|ram_block1a13~porta_address_reg9 } { 0.000ns 0.000ns 1.065ns } { 0.000ns 1.469ns 0.722ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "PLD_CLOCKINPUT\[1\] source 3.111 ns - Longest register " "Info: - Longest clock path from clock \"PLD_CLOCKINPUT\[1\]\" to source register is 3.111 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns PLD_CLOCKINPUT\[1\] 1 CLK PIN_153 1595 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_153; Fanout = 1595; CLK Node = 'PLD_CLOCKINPUT\[1\]'" {  } { { "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" "" { Report "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" Compiler "rca_cy1c12_board" "UNKNOWN" "V1" "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board.quartus_db" { Floorplan "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/" "" "" { PLD_CLOCKINPUT[1] } "NODE_NAME" } "" } } { "rca_cy1c12_board_top.bdf" "" { Schematic "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/rca_cy1c12_board_top.bdf" { { 64 408 576 80 "PLD_CLOCKINPUT\[1\]" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.931 ns) + CELL(0.711 ns) 3.111 ns rca_cy1c12_board:inst\|cpu_0:the_cpu_0\|W_alu_result\[18\] 2 REG LC_X37_Y10_N2 5 " "Info: 2: + IC(0.931 ns) + CELL(0.711 ns) = 3.111 ns; Loc. = LC_X37_Y10_N2; Fanout = 5; REG Node = 'rca_cy1c12_board:inst\|cpu_0:the_cpu_0\|W_alu_result\[18\]'" {  } { { "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" "" { Report "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" Compiler "rca_cy1c12_board" "UNKNOWN" "V1" "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board.quartus_db" { Floorplan "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/" "" "1.642 ns" { PLD_CLOCKINPUT[1] rca_cy1c12_board:inst|cpu_0:the_cpu_0|W_alu_result[18] } "NODE_NAME" } "" } } { "cpu_0.v" "" { Text "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/cpu_0.v" 580 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns 70.07 % " "Info: Total cell delay = 2.180 ns ( 70.07 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.931 ns 29.93 % " "Info: Total interconnect delay = 0.931 ns ( 29.93 % )" {  } {  } 0}  } { { "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" "" { Report "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" Compiler "rca_cy1c12_board" "UNKNOWN" "V1" "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board.quartus_db" { Floorplan "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/" "" "3.111 ns" { PLD_CLOCKINPUT[1] rca_cy1c12_board:inst|cpu_0:the_cpu_0|W_alu_result[18] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.111 ns" { PLD_CLOCKINPUT[1] PLD_CLOCKINPUT[1]~out0 rca_cy1c12_board:inst|cpu_0:the_cpu_0|W_alu_result[18] } { 0.000ns 0.000ns 0.931ns } { 0.000ns 1.469ns 0.711ns } } }  } 0}  } { { "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" "" { Report "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" Compiler "rca_cy1c12_board" "UNKNOWN" "V1" "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board.quartus_db" { Floorplan "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/" "" "3.256 ns" { PLD_CLOCKINPUT[1] rca_cy1c12_board:inst|payload_buffer:the_payload_buffer|altsyncram:the_altsyncram|altsyncram_7q01:auto_generated|ram_block1a13~porta_address_reg9 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.256 ns" { PLD_CLOCKINPUT[1] PLD_CLOCKINPUT[1]~out0 rca_cy1c12_board:inst|payload_buffer:the_payload_buffer|altsyncram:the_altsyncram|altsyncram_7q01:auto_generated|ram_block1a13~porta_address_reg9 } { 0.000ns 0.000ns 1.065ns } { 0.000ns 1.469ns 0.722ns } } } { "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" "" { Report "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" Compiler "rca_cy1c12_board" "UNKNOWN" "V1" "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board.quartus_db" { Floorplan "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/" "" "3.111 ns" { PLD_CLOCKINPUT[1] rca_cy1c12_board:inst|cpu_0:the_cpu_0|W_alu_result[18] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.111 ns" { PLD_CLOCKINPUT[1] PLD_CLOCKINPUT[1]~out0 rca_cy1c12_board:inst|cpu_0:the_cpu_0|W_alu_result[18] } { 0.000ns 0.000ns 0.931ns } { 0.000ns 1.469ns 0.711ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" {  } { { "cpu_0.v" "" { Text "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/cpu_0.v" 580 -1 0 } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.093 ns + " "Info: + Micro setup delay of destination is 0.093 ns" {  } { { "db/altsyncram_7q01.tdf" "" { Text "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/altsyncram_7q01.tdf" 287 2 0 } }  } 0}  } { { "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" "" { Report "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" Compiler "rca_cy1c12_board" "UNKNOWN" "V1" "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board.quartus_db" { Floorplan "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/" "" "20.654 ns" { rca_cy1c12_board:inst|cpu_0:the_cpu_0|W_alu_result[18] rca_cy1c12_board:inst|jtag_uart_0_avalon_jtag_slave_arbitrator:the_jtag_uart_0_avalon_jtag_slave|cpu_0_data_master_requests_jtag_uart_0_avalon_jtag_slave~381 rca_cy1c12_board:inst|payload_buffer_s1_arbitrator:the_payload_buffer_s1|cpu_0_data_master_requests_payload_buffer_s1~303 rca_cy1c12_board:inst|payload_buffer_s1_arbitrator:the_payload_buffer_s1|cpu_0_data_master_qualified_request_payload_buffer_s1~168 rca_cy1c12_board:inst|payload_buffer_s1_arbitrator:the_payload_buffer_s1|cpu_0_data_master_qualified_request_payload_buffer_s1~169 rca_cy1c12_board:inst|payload_buffer_s1_arbitrator:the_payload_buffer_s1|payload_buffer_s1_grant_vector[1]~117 rca_cy1c12_board:inst|payload_buffer_s1_arbitrator:the_payload_buffer_s1|payload_buffer_s1_address[9]~134 rca_cy1c12_board:inst|payload_buffer:the_payload_buffer|altsyncram:the_altsyncram|altsyncram_7q01:auto_generated|ram_block1a13~porta_address_reg9 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "20.654 ns" { rca_cy1c12_board:inst|cpu_0:the_cpu_0|W_alu_result[18] rca_cy1c12_board:inst|jtag_uart_0_avalon_jtag_slave_arbitrator:the_jtag_uart_0_avalon_jtag_slave|cpu_0_data_master_requests_jtag_uart_0_avalon_jtag_slave~381 rca_cy1c12_board:inst|payload_buffer_s1_arbitrator:the_payload_buffer_s1|cpu_0_data_master_requests_payload_buffer_s1~303 rca_cy1c12_board:inst|payload_buffer_s1_arbitrator:the_payload_buffer_s1|cpu_0_data_master_qualified_request_payload_buffer_s1~168 rca_cy1c12_board:inst|payload_buffer_s1_arbitrator:the_payload_buffer_s1|cpu_0_data_master_qualified_request_payload_buffer_s1~169 rca_cy1c12_board:inst|payload_buffer_s1_arbitrator:the_payload_buffer_s1|payload_buffer_s1_grant_vector[1]~117 rca_cy1c12_board:inst|payload_buffer_s1_arbitrator:the_payload_buffer_s1|payload_buffer_s1_address[9]~134 rca_cy1c12_board:inst|payload_buffer:the_payload_buffer|altsyncram:the_altsyncram|altsyncram_7q01:auto_generated|ram_block1a13~porta_address_reg9 } { 0.000ns 1.795ns 1.972ns 2.213ns 0.434ns 3.300ns 2.074ns 6.637ns } { 0.000ns 0.442ns 0.114ns 0.442ns 0.114ns 0.442ns 0.292ns 0.383ns } } } { "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" "" { Report "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" Compiler "rca_cy1c12_board" "UNKNOWN" "V1" "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board.quartus_db" { Floorplan "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/" "" "3.256 ns" { PLD_CLOCKINPUT[1] rca_cy1c12_board:inst|payload_buffer:the_payload_buffer|altsyncram:the_altsyncram|altsyncram_7q01:auto_generated|ram_block1a13~porta_address_reg9 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.256 ns" { PLD_CLOCKINPUT[1] PLD_CLOCKINPUT[1]~out0 rca_cy1c12_board:inst|payload_buffer:the_payload_buffer|altsyncram:the_altsyncram|altsyncram_7q01:auto_generated|ram_block1a13~porta_address_reg9 } { 0.000ns 0.000ns 1.065ns } { 0.000ns 1.469ns 0.722ns } } } { "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" "" { Report "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" Compiler "rca_cy1c12_board" "UNKNOWN" "V1" "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board.quartus_db" { Floorplan "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/" "" "3.111 ns" { PLD_CLOCKINPUT[1] rca_cy1c12_board:inst|cpu_0:the_cpu_0|W_alu_result[18] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.111 ns" { PLD_CLOCKINPUT[1] PLD_CLOCKINPUT[1]~out0 rca_cy1c12_board:inst|cpu_0:the_cpu_0|W_alu_result[18] } { 0.000ns 0.000ns 0.931ns } { 0.000ns 1.469ns 0.711ns } } }  } 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "altera_internal_jtag~TCKUTAP register sld_hub:sld_hub_inst\|jtag_debug_mode_usr1 register rca_cy1c12_board:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|jupdate 77.28 MHz 12.94 ns Internal " "Info: Clock \"altera_internal_jtag~TCKUTAP\" has Internal fmax of 77.28 MHz between source register \"sld_hub:sld_hub_inst\|jtag_debug_mode_usr1\" and destination register \"rca_cy1c12_board:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|jupdate\" (period= 12.94 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "6.174 ns + Longest register register " "Info: + Longest register to register delay is 6.174 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns sld_hub:sld_hub_inst\|jtag_debug_mode_usr1 1 REG LC_X11_Y13_N5 10 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X11_Y13_N5; Fanout = 10; REG Node = 'sld_hub:sld_hub_inst\|jtag_debug_mode_usr1'" {  } { { "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" "" { Report "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" Compiler "rca_cy1c12_board" "UNKNOWN" "V1" "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board.quartus_db" { Floorplan "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/" "" "" { sld_hub:sld_hub_inst|jtag_debug_mode_usr1 } "NODE_NAME" } "" } } { "sld_hub.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_hub.vhd" 381 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.643 ns) + CELL(0.590 ns) 2.233 ns rca_cy1c12_board:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|always0~48 2 COMB LC_X12_Y12_N7 4 " "Info: 2: + IC(1.643 ns) + CELL(0.590 ns) = 2.233 ns; Loc. = LC_X12_Y12_N7; Fanout = 4; COMB Node = 'rca_cy1c12_board:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|always0~48'" {  } { { "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" "" { Report "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" Compiler "rca_cy1c12_board" "UNKNOWN" "V1" "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board.quartus_db" { Floorplan "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/" "" "2.233 ns" { sld_hub:sld_hub_inst|jtag_debug_mode_usr1 rca_cy1c12_board:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|always0~48 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.024 ns) + CELL(0.590 ns) 4.847 ns rca_cy1c12_board:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|jupdate~0 3 COMB LC_X12_Y12_N2 1 " "Info: 3: + IC(2.024 ns) + CELL(0.590 ns) = 4.847 ns; Loc. = LC_X12_Y12_N2; Fanout = 1; COMB Node = 'rca_cy1c12_board:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|jupdate~0'" {  } { { "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" "" { Report "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" Compiler "rca_cy1c12_board" "UNKNOWN" "V1" "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board.quartus_db" { Floorplan "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/" "" "2.614 ns" { rca_cy1c12_board:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|always0~48 rca_cy1c12_board:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|jupdate~0 } "NODE_NAME" } "" } } { "alt_jtag_atlantic.v" "" { Text "c:/altera/quartus50/libraries/megafunctions/alt_jtag_atlantic.v" 203 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.460 ns) + CELL(0.867 ns) 6.174 ns rca_cy1c12_board:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|jupdate 4 REG LC_X12_Y12_N0 2 " "Info: 4: + IC(0.460 ns) + CELL(0.867 ns) = 6.174 ns; Loc. = LC_X12_Y12_N0; Fanout = 2; REG Node = 'rca_cy1c12_board:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|jupdate'" {  } { { "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" "" { Report "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" Compiler "rca_cy1c12_board" "UNKNOWN" "V1" "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board.quartus_db" { Floorplan "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/" "" "1.327 ns" { rca_cy1c12_board:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|jupdate~0 rca_cy1c12_board:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|jupdate } "NODE_NAME" } "" } } { "alt_jtag_atlantic.v" "" { Text "c:/altera/quartus50/libraries/megafunctions/alt_jtag_atlantic.v" 203 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.047 ns 33.16 % " "Info: Total cell delay = 2.047 ns ( 33.16 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.127 ns 66.84 % " "Info: Total interconnect delay = 4.127 ns ( 66.84 % )" {  } {  } 0}  } { { "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" "" { Report "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" Compiler "rca_cy1c12_board" "UNKNOWN" "V1" "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board.quartus_db" { Floorplan "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/" "" "6.174 ns" { sld_hub:sld_hub_inst|jtag_debug_mode_usr1 rca_cy1c12_board:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|always0~48 rca_cy1c12_board:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|jupdate~0 rca_cy1c12_board:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|jupdate } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "6.174 ns" { sld_hub:sld_hub_inst|jtag_debug_mode_usr1 rca_cy1c12_board:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|always0~48 rca_cy1c12_board:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|jupdate~0 rca_cy1c12_board:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|jupdate } { 0.000ns 1.643ns 2.024ns 0.460ns } { 0.000ns 0.590ns 0.590ns 0.867ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-0.035 ns - Smallest " "Info: - Smallest clock skew is -0.035 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "altera_internal_jtag~TCKUTAP destination 5.353 ns + Shortest register " "Info: + Shortest clock path from clock \"altera_internal_jtag~TCKUTAP\" to destination register is 5.353 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns altera_internal_jtag~TCKUTAP 1 CLK JTAG_X1_Y13_N1 96 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = JTAG_X1_Y13_N1; Fanout = 96; CLK Node = 'altera_internal_jtag~TCKUTAP'" {  } { { "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" "" { Report "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" Compiler "rca_cy1c12_board" "UNKNOWN" "V1" "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board.quartus_db" { Floorplan "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/" "" "" { altera_internal_jtag~TCKUTAP } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(4.642 ns) + CELL(0.711 ns) 5.353 ns rca_cy1c12_board:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|jupdate 2 REG LC_X12_Y12_N0 2 " "Info: 2: + IC(4.642 ns) + CELL(0.711 ns) = 5.353 ns; Loc. = LC_X12_Y12_N0; Fanout = 2; REG Node = 'rca_cy1c12_board:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|jupdate'" {  } { { "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" "" { Report "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" Compiler "rca_cy1c12_board" "UNKNOWN" "V1" "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board.quartus_db" { Floorplan "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/" "" "5.353 ns" { altera_internal_jtag~TCKUTAP rca_cy1c12_board:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|jupdate } "NODE_NAME" } "" } } { "alt_jtag_atlantic.v" "" { Text "c:/altera/quartus50/libraries/megafunctions/alt_jtag_atlantic.v" 203 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.711 ns 13.28 % " "Info: Total cell delay = 0.711 ns ( 13.28 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.642 ns 86.72 % " "Info: Total interconnect delay = 4.642 ns ( 86.72 % )" {  } {  } 0}  } { { "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" "" { Report "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" Compiler "rca_cy1c12_board" "UNKNOWN" "V1" "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board.quartus_db" { Floorplan "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/" "" "5.353 ns" { altera_internal_jtag~TCKUTAP rca_cy1c12_board:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|jupdate } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "5.353 ns" { altera_internal_jtag~TCKUTAP rca_cy1c12_board:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|jupdate } { 0.000ns 4.642ns } { 0.000ns 0.711ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "altera_internal_jtag~TCKUTAP source 5.388 ns - Longest register " "Info: - Longest clock path from clock \"altera_internal_jtag~TCKUTAP\" to source register is 5.388 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns altera_internal_jtag~TCKUTAP 1 CLK JTAG_X1_Y13_N1 96 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = JTAG_X1_Y13_N1; Fanout = 96; CLK Node = 'altera_internal_jtag~TCKUTAP'" {  } { { "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" "" { Report "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" Compiler "rca_cy1c12_board" "UNKNOWN" "V1" "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board.quartus_db" { Floorplan "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/" "" "" { altera_internal_jtag~TCKUTAP } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(4.677 ns) + CELL(0.711 ns) 5.388 ns sld_hub:sld_hub_inst\|jtag_debug_mode_usr1 2 REG LC_X11_Y13_N5 10 " "Info: 2: + IC(4.677 ns) + CELL(0.711 ns) = 5.388 ns; Loc. = LC_X11_Y13_N5; Fanout = 10; REG Node = 'sld_hub:sld_hub_inst\|jtag_debug_mode_usr1'" {  } { { "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" "" { Report "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" Compiler "rca_cy1c12_board" "UNKNOWN" "V1" "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board.quartus_db" { Floorplan "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/" "" "5.388 ns" { altera_internal_jtag~TCKUTAP sld_hub:sld_hub_inst|jtag_debug_mode_usr1 } "NODE_NAME" } "" } } { "sld_hub.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_hub.vhd" 381 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.711 ns 13.20 % " "Info: Total cell delay = 0.711 ns ( 13.20 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.677 ns 86.80 % " "Info: Total interconnect delay = 4.677 ns ( 86.80 % )" {  } {  } 0}  } { { "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" "" { Report "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" Compiler "rca_cy1c12_board" "UNKNOWN" "V1" "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board.quartus_db" { Floorplan "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/" "" "5.388 ns" { altera_internal_jtag~TCKUTAP sld_hub:sld_hub_inst|jtag_debug_mode_usr1 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "5.388 ns" { altera_internal_jtag~TCKUTAP sld_hub:sld_hub_inst|jtag_debug_mode_usr1 } { 0.000ns 4.677ns } { 0.000ns 0.711ns } } }  } 0}  } { { "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" "" { Report "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" Compiler "rca_cy1c12_board" "UNKNOWN" "V1" "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board.quartus_db" { Floorplan "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/" "" "5.353 ns" { altera_internal_jtag~TCKUTAP rca_cy1c12_board:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|jupdate } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "5.353 ns" { altera_internal_jtag~TCKUTAP rca_cy1c12_board:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|jupdate } { 0.000ns 4.642ns } { 0.000ns 0.711ns } } } { "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" "" { Report "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" Compiler "rca_cy1c12_board" "UNKNOWN" "V1" "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board.quartus_db" { Floorplan "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/" "" "5.388 ns" { altera_internal_jtag~TCKUTAP sld_hub:sld_hub_inst|jtag_debug_mode_usr1 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "5.388 ns" { altera_internal_jtag~TCKUTAP sld_hub:sld_hub_inst|jtag_debug_mode_usr1 } { 0.000ns 4.677ns } { 0.000ns 0.711ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" {  } { { "sld_hub.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_hub.vhd" 381 -1 0 } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.037 ns + " "Info: + Micro setup delay of destination is 0.037 ns" {  } { { "alt_jtag_atlantic.v" "" { Text "c:/altera/quartus50/libraries/megafunctions/alt_jtag_atlantic.v" 203 -1 0 } }  } 0} { "Info" "ITDB_INVERTED_CLOCK_FOUND" "" "Info: Delay path is controlled by inverted clocks -- if clock duty cycle is 50, fmax is divided by two" {  } { { "sld_hub.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_hub.vhd" 381 -1 0 } } { "alt_jtag_atlantic.v" "" { Text "c:/altera/quartus50/libraries/megafunctions/alt_jtag_atlantic.v" 203 -1 0 } }  } 0}  } { { "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" "" { Report "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" Compiler "rca_cy1c12_board" "UNKNOWN" "V1" "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board.quartus_db" { Floorplan "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/" "" "6.174 ns" { sld_hub:sld_hub_inst|jtag_debug_mode_usr1 rca_cy1c12_board:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|always0~48 rca_cy1c12_board:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|jupdate~0 rca_cy1c12_board:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|jupdate } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "6.174 ns" { sld_hub:sld_hub_inst|jtag_debug_mode_usr1 rca_cy1c12_board:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|always0~48 rca_cy1c12_board:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|jupdate~0 rca_cy1c12_board:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|jupdate } { 0.000ns 1.643ns 2.024ns 0.460ns } { 0.000ns 0.590ns 0.590ns 0.867ns } } } { "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" "" { Report "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" Compiler "rca_cy1c12_board" "UNKNOWN" "V1" "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board.quartus_db" { Floorplan "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/" "" "5.353 ns" { altera_internal_jtag~TCKUTAP rca_cy1c12_board:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|jupdate } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "5.353 ns" { altera_internal_jtag~TCKUTAP rca_cy1c12_board:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|jupdate } { 0.000ns 4.642ns } { 0.000ns 0.711ns } } } { "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" "" { Report "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board_cmp.qrpt" Compiler "rca_cy1c12_board" "UNKNOWN" "V1" "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/db/rca_cy1c12_board.quartus_db" { Floorplan "E:/code/EP1C12/l_standard/rca_cy1c12_board/system/" "" "5.388 ns" { altera_internal_jtag~TCKUTAP sld_hub:sld_hub_inst|jtag_debug_mode_usr1 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "5.388 ns" { altera_internal_jtag~TCKUTAP sld_hub:sld_hub_inst|jtag_debug_mode_usr1 } { 0.000ns 4.677ns } { 0.000ns 0.711ns } } }  } 0}