i2c_altera.map.summary

来自「视频采集」· SUMMARY 代码 · 共 14 行

Flow Status : Successful - Mon Mar 27 22:17:49 2006
Quartus II Version : 5.0 Build 171 11/03/2005 SP 2 SJ Full Version
Revision Name : I2C_ALTERA
Top-level Entity Name : I2C_ALTERA
Family : Cyclone
Device : EP1C12Q240C8
Timing Models : Final
Met timing requirements : N/A
Total logic elements : 1,321
Total pins : 132
Total virtual pins : 0
Total memory bits : 27,912
Total PLLs : 1