fpga_dsp_portlink_inner.bsf

implemention of FPGA and DSP linking port, using Asynchronous mode

/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 1991-2005 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.
*/
(header "symbol" (version "1.1"))
(symbol
	(rect 16 16 312 240)
	(text "FPGA_DSP_PortLink_Inner" (rect 5 0 156 14)(font "Arial" (font_size 8)))
	(text "inst" (rect 8 208 25 220)(font "Arial" ))
	(port
		(pt 0 32)
		(input)
		(text "Addr[1..0]" (rect 0 0 56 14)(font "Arial" (font_size 8)))
		(text "Addr[1..0]" (rect 21 27 77 41)(font "Arial" (font_size 8)))
		(line (pt 0 32)(pt 16 32)(line_width 3))
	)
	(port
		(pt 0 48)
		(input)
		(text "DATA_FromDSP[15..0]" (rect 0 0 128 14)(font "Arial" (font_size 8)))
		(text "DATA_FromDSP[15..0]" (rect 21 43 149 57)(font "Arial" (font_size 8)))
		(line (pt 0 48)(pt 16 48)(line_width 3))
	)
	(port
		(pt 0 64)
		(input)
		(text "WE" (rect 0 0 18 14)(font "Arial" (font_size 8)))
		(text "WE" (rect 21 59 39 73)(font "Arial" (font_size 8)))
		(line (pt 0 64)(pt 16 64)(line_width 1))
	)
	(port
		(pt 0 80)
		(input)
		(text "Ren_in" (rect 0 0 38 14)(font "Arial" (font_size 8)))
		(text "Ren_in" (rect 21 75 59 89)(font "Arial" (font_size 8)))
		(line (pt 0 80)(pt 16 80)(line_width 1))
	)
	(port
		(pt 0 96)
		(input)
		(text "Rclk_in" (rect 0 0 40 14)(font "Arial" (font_size 8)))
		(text "Rclk_in" (rect 21 91 61 105)(font "Arial" (font_size 8)))
		(line (pt 0 96)(pt 16 96)(line_width 1))
	)
	(port
		(pt 0 112)
		(input)
		(text "DATAin[15..0]" (rect 0 0 79 14)(font "Arial" (font_size 8)))
		(text "DATAin[15..0]" (rect 21 107 100 121)(font "Arial" (font_size 8)))
		(line (pt 0 112)(pt 16 112)(line_width 3))
	)
	(port
		(pt 0 128)
		(input)
		(text "Wen_in" (rect 0 0 42 14)(font "Arial" (font_size 8)))
		(text "Wen_in" (rect 21 123 63 137)(font "Arial" (font_size 8)))
		(line (pt 0 128)(pt 16 128)(line_width 1))
	)
	(port
		(pt 0 144)
		(input)
		(text "Wclk_in" (rect 0 0 43 14)(font "Arial" (font_size 8)))
		(text "Wclk_in" (rect 21 139 64 153)(font "Arial" (font_size 8)))
		(line (pt 0 144)(pt 16 144)(line_width 1))
	)
	(port
		(pt 0 160)
		(input)
		(text "CS" (rect 0 0 16 14)(font "Arial" (font_size 8)))
		(text "CS" (rect 21 155 37 169)(font "Arial" (font_size 8)))
		(line (pt 0 160)(pt 16 160)(line_width 1))
	)
	(port
		(pt 0 176)
		(input)
		(text "RE" (rect 0 0 15 14)(font "Arial" (font_size 8)))
		(text "RE" (rect 21 171 36 185)(font "Arial" (font_size 8)))
		(line (pt 0 176)(pt 16 176)(line_width 1))
	)
	(port
		(pt 296 32)
		(output)
		(text "Dataout[15..0]" (rect 0 0 79 14)(font "Arial" (font_size 8)))
		(text "Dataout[15..0]" (rect 196 27 275 41)(font "Arial" (font_size 8)))
		(line (pt 296 32)(pt 280 32)(line_width 3))
	)
	(port
		(pt 296 48)
		(output)
		(text "DATA_ToDSP[15..0]" (rect 0 0 114 14)(font "Arial" (font_size 8)))
		(text "DATA_ToDSP[15..0]" (rect 161 43 275 57)(font "Arial" (font_size 8)))
		(line (pt 296 48)(pt 280 48)(line_width 3))
	)
	(drawing
		(rectangle (rect 16 16 280 208)(line_width 1))
	)
)