fpga_dsp_portlink_bibus.bsf

implemention of FPGA and DSP linking port, using Asynchronous mode

/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 1991-2005 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.
*/
(header "symbol" (version "1.1"))
(symbol
	(rect 16 16 232 208)
	(text "FPGA_DSP_PortLink_BiBus" (rect 5 0 160 14)(font "Arial" (font_size 8)))
	(text "inst" (rect 8 176 25 188)(font "Arial" ))
	(port
		(pt 0 32)
		(input)
		(text "Addr[1..0]" (rect 0 0 56 14)(font "Arial" (font_size 8)))
		(text "Addr[1..0]" (rect 21 27 77 41)(font "Arial" (font_size 8)))
		(line (pt 0 32)(pt 16 32)(line_width 3))
	)
	(port
		(pt 0 48)
		(input)
		(text "WE" (rect 0 0 18 14)(font "Arial" (font_size 8)))
		(text "WE" (rect 21 43 39 57)(font "Arial" (font_size 8)))
		(line (pt 0 48)(pt 16 48)(line_width 1))
	)
	(port
		(pt 0 64)
		(input)
		(text "Ren_in" (rect 0 0 38 14)(font "Arial" (font_size 8)))
		(text "Ren_in" (rect 21 59 59 73)(font "Arial" (font_size 8)))
		(line (pt 0 64)(pt 16 64)(line_width 1))
	)
	(port
		(pt 0 80)
		(input)
		(text "Rclk_in" (rect 0 0 40 14)(font "Arial" (font_size 8)))
		(text "Rclk_in" (rect 21 75 61 89)(font "Arial" (font_size 8)))
		(line (pt 0 80)(pt 16 80)(line_width 1))
	)
	(port
		(pt 0 96)
		(input)
		(text "DATAin[15..0]" (rect 0 0 79 14)(font "Arial" (font_size 8)))
		(text "DATAin[15..0]" (rect 21 91 100 105)(font "Arial" (font_size 8)))
		(line (pt 0 96)(pt 16 96)(line_width 3))
	)
	(port
		(pt 0 112)
		(input)
		(text "Wen_in" (rect 0 0 42 14)(font "Arial" (font_size 8)))
		(text "Wen_in" (rect 21 107 63 121)(font "Arial" (font_size 8)))
		(line (pt 0 112)(pt 16 112)(line_width 1))
	)
	(port
		(pt 0 128)
		(input)
		(text "Wclk_in" (rect 0 0 43 14)(font "Arial" (font_size 8)))
		(text "Wclk_in" (rect 21 123 64 137)(font "Arial" (font_size 8)))
		(line (pt 0 128)(pt 16 128)(line_width 1))
	)
	(port
		(pt 0 144)
		(input)
		(text "CS" (rect 0 0 16 14)(font "Arial" (font_size 8)))
		(text "CS" (rect 21 139 37 153)(font "Arial" (font_size 8)))
		(line (pt 0 144)(pt 16 144)(line_width 1))
	)
	(port
		(pt 0 160)
		(input)
		(text "RE" (rect 0 0 15 14)(font "Arial" (font_size 8)))
		(text "RE" (rect 21 155 36 169)(font "Arial" (font_size 8)))
		(line (pt 0 160)(pt 16 160)(line_width 1))
	)
	(port
		(pt 216 32)
		(output)
		(text "Dataout[15..0]" (rect 0 0 79 14)(font "Arial" (font_size 8)))
		(text "Dataout[15..0]" (rect 116 27 195 41)(font "Arial" (font_size 8)))
		(line (pt 216 32)(pt 200 32)(line_width 3))
	)
	(port
		(pt 216 48)
		(bidir)
		(text "TO_DSP[15..0]" (rect 0 0 82 14)(font "Arial" (font_size 8)))
		(text "TO_DSP[15..0]" (rect 113 43 195 57)(font "Arial" (font_size 8)))
		(line (pt 216 48)(pt 200 48)(line_width 3))
	)
	(drawing
		(rectangle (rect 16 16 200 176)(line_width 1))
	)
)