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📄 mmu.s

📁 深圳市微逻辑电子有限公司 巨果&#8226 Kingmos&reg 系统核心
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/* ******************************************************
 * @copyright(c) 版权所有,1998-2003微逻辑。保留所有权利。
 * ******************************************************
 * 
 * ******************************************************
 * 文件说明:设置MMU
 * 版本号:1.0.0
 * 开发时期:2001-04-04
 * 作者:李林
 * 修改记录:
 * *******************************************************
 */

.nolist
.include "def.inc"
.include "linkage.inc"
.list

.equ MemoryMap , 0x2a4		@ From ksarm.h - to get this to compile

.equ BANK_SIZE	,		0x00100000	@ 1MB per bank in MemoryMap array
.equ BANK_SHIFT	,		20

.equ USER_MODE    ,   0x10        @2_10000
.equ FIQ_MODE     ,   0x11        @2_10001
.equ IRQ_MODE     ,   0x12        @2_10010
.equ SVC_MODE     ,   0x13        @2_10011
.equ ABORT_MODE   ,   0x17        @2_10111
.equ UNDEF_MODE   ,   0x1b        @2_11011
.equ SYS_MODE  ,   0x1f        @2_11111



@
@   Define RAM space for the Page Tables:
@

@ High memory layout:
@       FFFD0000 - first level page table (uncached) (2nd half is r/o)
@       FFFD4000 - second level page tables (uncached)
@       FFFE0000 - disabled for protection
@       FFFF0000 - exception vectors
@       FFFF03E0 - exception vector jump table
@       FFFF0400 - not used (r/o)
@       FFFF1000 - disabled for protection
@       FFFF2000 - r/o (physical overlaps with vectors)
@       FFFF2400 - Interrupt stack (1k)
@       FFFF2800 - r/o (physical overlaps with Abort stack)
@       FFFF3000 - disabled for protection
@       FFFF4000 - r/o (physical memory overlaps with vectors & intr. stack & FIQ stack)
@       FFFF4900 - Abort stack (2k - 256 bytes)
@       FFFF5000 - disabled for protection
@       FFFF6000 - r/o (physical memory overlaps with vectors & intr. stack)
@       FFFF6800 - FIQ stack (256 bytes)
@       FFFF6900 - r/o (physical memory overlaps with Abort stack)
@       FFFF7000 - disabled
@       FFFFC000 - kernel stack
@       FFFFC800 - KDataStruct
@       FFFFCC00 - r/o for protection (2nd level page table for 0xFFF00000)

@        ^ 0xFFFD0000
@FirstPT         # 0x4000
@PageTables      # 0x4000
@                # 0x8000
@                # 0x10000       @ not mapped
@ExVector        # 0x1000
@                # 0x1400        @ not mapped
@                # 0x0400        @ 1K interrupt stack
@IntStack        # 0x2000        @ not mapped                    (ffff2800)
@                # 0x0100        @ not mapped (FIQ stack)        (ffff4800)
@                # 0x0700        @ 2K-256 abort stack            (ffff4900)
@AbortStack      # 0x1800        @ not mapped                    (ffff5000)
@                # 0x0100        @ not mapped (FIQ stack)        (ffff6800)
@FIQStack        # 0xC000-0x6900 @ not mapped                    (ffff6900)
@KDBase          # 0x07E0        @ 2K-32 kernel stack
@KStack          # 0x0020        @ temporary register save area
@KData           # 0x0400         @ kernel data area

.set	BASE_PAGE_TABLE,	0xfffd0000
.set	FirstPT,			BASE_PAGE_TABLE 
@ .set	PageTables,			FirstPT + 0x4000
.set	UnusedPageTables,			FirstPT + 0x4000	@ 不需要全局第二级页表,放到每一个线程 -2004-12-28 修改
.set	_Notmaped1,			UnusedPageTables + 0x4000
.set	_Notmaped2,			_Notmaped1 + 0x8000
.set	ExVector,			_Notmaped2 + 0x10000
.set	_Notmaped3,			ExVector +	0x1000
.set	_Notmaped4,			_Notmaped3 + 0x1400
.set	IntStack,			_Notmaped4 + 0x0400
.set	_Notmaped5,			IntStack  + 0x2000
.set	_Notmaped6,			_Notmaped5 + 0x0100
.set	AbortStack,			_Notmaped6 + 0x0700
.set	_Notmaped7,			AbortStack+ 0x1800
.set	FIQStack,			_Notmaped7 + 0x0100
.set	KDBase,				FIQStack + 0xc000-0x6900+0x07e0
.set	KStack,				KDBase + 0x0020
.set	KData,				KStack + 0x0000


        @-----------------------------------------------------------------------
        @ .KDATA area is used to reserve physical memory for the above structures.
        @AREA |.KDATA|,DATA,NOINIT
        
        @EXPORT  ExceptionVectorsArea
		@EXPORT  KDataArea

		.globl	KDataArea
		.globl	ExceptionVectorsArea
		.section	".kdata", #alloc, #write
        
KDataArea:
PTs:    .space	0x4000          @ space for first-level page table
@ 不需要全局第二级页表,放到每一个线程-2004-12-28 修改
@        .space	0x4000          @ space for 2nd-level page tables
@
ExceptionVectorsArea: 
        .space	0x0400          @ space for exception vectors
        .space	0x0400          @ space for interrupt stack
        .space	0x0100          @ space for fiq stack
        .space	0x0700          @ space for abort stack
KPage:	.space	0x0c00          @ space for kernel stack & kdatastruct
HighPT:	.space	0x0400          @ space for 2nd level page table to map 0xfff00000
KDEnd:  

@KDataArea
@PTs     %       0x4000          @ space for first-level page table
@        %       0x4000          @ space for 2nd-level page tables
@ExceptionVectorsArea 
@        %       0x0400          @ space for exception vectors
@        %       0x0400          @ space for interrupt stack
@        %       0x0100          @ space for FIQ stack
@        %       0x0700          @ space for Abort stack
@KPage   %       0x0c00          @ space for kernel stack & KDataStruct
@HighPT  %       0x0400          @ space for 2nd level page table to map 0xFFF00000
@KDEnd   %       0

@	MACRO
@	mtc15	$cpureg, $cp15reg
@	mcr		p15,0,$cpureg,$cp15reg,c0,0
@	MEND

@	MACRO
@	mfc15	$cpureg, $cp15reg
@	mrc		p15,0,$cpureg,$cp15reg,c0,0
@	MEND

	.macro mtc15, cpureg, cp15reg
	    mcr		p15,0,\cpureg,\cp15reg,c0,0
	.endm

	.macro mfc15, cpureg, cp15reg
	    mrc		p15,0,\cpureg,\cp15reg,c0,0
	.endm

	.text
	
.extern		WriteByte
.extern		_InitKernel
.extern		TLBClear
.extern		InitUart
.extern		WriteString
.extern		PutHex
.extern		PutHex_Virtual
.extern		LED_FLASH 
.extern		ES_VectorTable

@	TEXTAREA
	
@	IMPORT  WriteByte
@	@IMPORT  ES_InstallVectorTable
@	IMPORT  ES_Entry
@	IMPORT  TLBClear
@	@IMPORT  main
@	@IMPORT	EbootKernelStart
@	@IMPORT	FlashCardLaunch
 @   IMPORT  InitUart
  @  IMPORT  WriteString
   @ IMPORT  PutHex
	@IMPORT	LED_FLASH 
@	IMPORT  ES_VectorTable



@=============================================================
@ Causes the SA1100 to transition to Idle mode
@=============================================================

	ENTRY SetIdleMode

	ldr	    r1, =0xA8000000
	mcr     p15,0,r0,c15,c2,2
	ldr     r0, [r1]
	mcr     p15,0,r0,c15,c8,2
	nop
	nop
	nop
	mov     pc, lr

@=============================================================
@ Enable Dcache Cache
@=============================================================
	ENTRY EnableDCache

	mov     r1, #0x0071             @ Enable: MMU
	orr     r1, r1, #0x1000         @ Enable icache, Dcache
	orr     r1, r1, #0x000C         @ Enable dcache=4, write buffer=8
	
	mtc15   r1, c1                  @ enable the MMU & Caches
	nop
	mov     pc, lr


@=============================================================
@ Disable Dcache Cache
@=============================================================
	ENTRY DisableDCache

	mov     r1, #0x0071             @ Enable: MMU
	orr     r1, r1, #0x1000         @ Enable icache, Dcache
	orr     r1, r1, #0x0008         @ Enable dcache=4, write buffer=8
	
	mtc15   r1, c1                  @ enable the MMU & Caches
	nop
	mov     pc, lr


@=============================================================
@ PhyAdrFromVirAdr: Figure out Physical Address of a Virtual Address
@
@ (r0) = VA
@ (r1) = ptr to OEMAddressTable
@
@ On return
@ (r0) = PA
@
@ Register used:
@ r0 - r3, r12
@
@=============================================================
        ENTRY PhyAdrFromVirAdr
        mov     r12, r0                         @ (r12) = VA
        mov     r0, #-1                         @ (r0) = -1 (initialize return value to an invalid PA)
101:
        ldr     r3, [r1]                        @ (r3) = OEMAddressTable[i].vaddr        
        mov     r2, r3, LSR #BANK_SHIFT         @ make 1MB aligned
        mov     r3, r2, LSL #BANK_SHIFT

        cmp     r3, #0                          @ EndOfTable?
        moveq   pc, lr                          @ INVALID OEMAddressTable, VA not found
        
        cmp     r12, r3                         @ Is (VA >= OEMAddressTable[i].vaddr)?
        blt     102f                           @ go to next entry if not

        ldr     r2, [r1, #8]                    @ (r2) = size in MB
        add     r2, r3, r2, LSL #BANK_SHIFT     @ (r2) = OEMAddressTable[i].vaddr + region size
        cmp     r12, r2                         @ Is (VA < OEMAddressTable[i].vaddr + region size)?
        blt     103f                           @ Found if it's true

102:
        add     r1, r1, #12                     @ i ++ (move to next entry)
        b       101b                           @ test next entry

        @ found the entry
        @ (r1) = &OEMAddressTable[i]
        @ (r3) = OEMAddressTable[i].vaddr
103:
        ldr     r0, [r1, #4]                    @ (r0) = OEMAddressTable[i].paddr
        mov     r0, r0, LSR #BANK_SHIFT         @ (r0) >>= 20
        add     r0, r12, r0, LSL #BANK_SHIFT    @ (r0) = VA + (r0 << 20)
        sub     r0, r0, r3                      @ (r0) -= OEMAddressTable[i].vaddr
        
        mov     pc, lr                          @ return
        

@=============================================================
@ KernelStart - Set up the MMU and Dcache for bootloader
@
@ This routine will initialize the first-level page table based up the contents
@ of the MemoryMap array and enable the MMU and caches.
@
@	Entry	(r0) = pointer to MemoryMap array in physical memory
@	Exit	returns if MemoryMap is invalid

@@ Now If we are booting from Flash we want to copy and jump to RAM
@@ Otherwise if we are already in RAM we want to skip this step 
@=============================================================

	    ENTRY _KernelStart

        mov     r11, r0                         @ (r11) = &MemoryMap (save pointer)
        ldr     r9, =PTs                        @ (r9) = "virtual address" of 1st level table

        ldr     r7, =0x1FF00000                 @ VA needs 512MB, 1MB aligned.
        ldr     r8, =0xFFF00000                 @ PA needs   4GB, 1MB aligned.

        and     r6, r9, r7                      @ (r6) = KDATA Virtual Address (1MB)

        mov     r1, r11                         @ (r1) = ptr to MemoryMap array

5:
        ldr     r2, [r1], #4                    @ (r2) = virtual address to map Bank at
        ldr     r3, [r1], #4                    @ (r3) = physical address to map from
        ldr     r4, [r1], #4                    @ (r4) = num MB to map

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