oemintr.c

深圳市微逻辑电子有限公司 巨果&#8226 Kingmos&reg 系统核心

/******************************************************
Copyright(c) 版权所有，1998-2003微逻辑。保留所有权利。
******************************************************/

/*****************************************************
文件说明：内核中断处理
版本号：1.0.0
开发时期：2003-04-04
作者：李林
修改记录：
******************************************************/

#include "ewindows.h"
#include "drv_glob.h"
#include "oalintr.h"
#include "cpu.h"
#include <s2410.h>
//#define xyg_ser_sub_mask

void EdbgOutputDebugString(const char *sz, ...);

//

static volatile INTreg * const s2410INT = (INTreg *)INT_BASE;
static volatile IOPreg * const s2410IOP = (IOPreg *)IOP_BASE;
static volatile MMCreg * const s2410SDIO = (MMCreg *)MMC_BACE;
static volatile PWMreg * const s2410PWM = (PWMreg *)PWM_BASE;
static volatile ADCreg * const s2410ADC = (ADCreg *)ADC_BASE;
//static volatile struct udcreg * const s2410USBD = (volatile struct udcreg *)(0xB1200140); // 0xB1200140
static volatile struct udcreg * const s2410USBD = (volatile struct udcreg *)(0xB1200140);
static volatile USBD_GLOBALS * const usbdShMem=&((DRIVER_GLOBALS *)DRIVER_GLOBALS_PHYSICAL_MEMORY_START)->usbd;
static volatile TOUCH_GLOBALS * const tch =&((DRIVER_GLOBALS *)DRIVER_GLOBALS_PHYSICAL_MEMORY_START)->tch;


static UINT ulTickCount=0;
static BOOL bTouchSample = FALSE;
// ********************************************************************
//声明：BOOL OEM_InterruptEnable( DWORD idInt, LPVOID pvData, DWORD cbData )
//参数：
//	IN idInt-逻辑中断号
//	IN pvData-通过 INTR_Init 传递的参数
//  IN cbData-pvData指向数据的大小
//返回值：
//	成功，返回TRUE;失败，返回FALSE 
//功能描述：开中断
//引用: 当一个设备驱动程序调用INTR_Init时，由 INTR_Init 调用该函数
// ********************************************************************

#define DEBUG_OEM_INTERRUPT_ENABLE 1
BOOL OEM_InterruptEnable( DWORD idInt, LPVOID pvData, DWORD cbData )
{
	BOOL bRet = TRUE;

	INTR_OFF();
	
	switch (idInt) 
	{
//	case SYSINTR_VMINI:		// Vmini.
//		break;
	case SYSINTR_BREAK:		// There is no halt button on P2.
        break;
    case SYSINTR_DMA0:
        s2410INT->rINTMSK &= ~BIT_DMA0; // SDIO DMA interrupt
		RETAILMSG(DEBUG_OEM_INTERRUPT_ENABLE,(TEXT("::: SYSINTR_DMA0    OEMInterruptDisable\r\n")));
    	break;
	case SYSINTR_SDMMC:
		s2410INT->rINTMSK &= ~BIT_MMC;
		RETAILMSG(DEBUG_OEM_INTERRUPT_ENABLE,(TEXT("::: SYSINTR_SDMMC    OEMInterruptDisable\r\n")));
		break;
	case SYSINTR_SDMMC_SDIO_INTERRUPT:
		s2410INT->rINTMSK &= ~BIT_MMC;
		RETAILMSG(DEBUG_OEM_INTERRUPT_ENABLE,(TEXT("::: SYSINTR_SDMMC_SDIO_INTERRUPT    OEMInterruptEnable\r\n")));		
		break;
	case SYSINTR_SDMMC_CARD_DETECT:
		s2410IOP->rEINTPEND  = (1 << 18);
		s2410IOP->rEINTMASK &= ~(1 << 18);
		s2410INT->rSRCPND	= BIT_EINT8_23;
		if (s2410INT->rINTPND & BIT_EINT8_23) 
			s2410INT->rINTPND = BIT_EINT8_23; 
		s2410INT->rINTMSK  &= ~BIT_EINT8_23;
		RETAILMSG(DEBUG_OEM_INTERRUPT_ENABLE,(TEXT("::: SYSINTR_SDMMC_CARD_DETECT    OEMInterruptEnable\r\n")));
		break;     

    case SYSINTR_TOUCH:
		//RETAILMSG(0,(TEXT("OEMInterruptEnable:TOUCH\n\r\n")));
        break;	
    case SYSINTR_TOUCH_CHANGED:
		//RETAILMSG(0,(TEXT("OEMInterruptEnable:TOUCH CHANGED\r\n\r\n")));
//		s2410INT->rINTMSK &= ~BIT_ADC;
//		s2410INT->rINTSUBMSK &= ~INTSUB_TC;
//        bTouchSample = TRUE;
        break;
	case SYSINTR_KEYBOARD:	// Keyboard on EINT1.
/*
		s2410INT->rSRCPND  = BIT_EINT1;
		// S3C2410X Developer Notice (page 4) warns against writing a 1 to a 0 bit in the INTPND register.
		if (s2410INT->rINTPND & BIT_EINT1) s2410INT->rINTPND = BIT_EINT1;
*/
		s2410INT->rINTMSK &= ~BIT_EINT1;
		break;
	case SYSINTR_SERIAL:	// Serial port.
		s2410INT->rSUBSRCPND  = (INTSUB_RXD0 | INTSUB_TXD0 | INTSUB_ERR0);
#ifdef xyg_ser_sub_mask
		s2410INT->rINTSUBMSK &= ~(INTSUB_RXD0 | INTSUB_TXD0 | INTSUB_ERR0);
#endif
		s2410INT->rSRCPND     = BIT_UART0;
		if (s2410INT->rINTPND & BIT_UART0){ 
			s2410INT->rINTPND = BIT_UART0;
		}
		s2410INT->rINTMSK    &= ~BIT_UART0;
		break;
	case SYSINTR_IR:		// IrDA.
		s2410INT->rSUBSRCPND  = (INTSUB_RXD1 | INTSUB_TXD1 | INTSUB_ERR1);
#ifdef xyg_ser_sub_mask
		s2410INT->rINTSUBMSK &= ~(INTSUB_RXD1 | INTSUB_TXD1 | INTSUB_ERR1);
#endif
		s2410INT->rSRCPND     = BIT_UART1;
		if (s2410INT->rINTPND & BIT_UART1){ 
			s2410INT->rINTPND = BIT_UART1;
		}
		s2410INT->rINTMSK    &= ~BIT_UART1;
		break;


/*
	case SYSINTR_SERIAL:	// Serial port.
		s2410INT->rSUBSRCPND  = (INTSUB_RXD0 | INTSUB_TXD0 | INTSUB_ERR0);
		s2410INT->rINTSUBMSK &= ~INTSUB_RXD0;
		s2410INT->rINTSUBMSK &= ~INTSUB_TXD0;
		s2410INT->rINTSUBMSK &= ~INTSUB_ERR0;
		s2410INT->rSRCPND     = BIT_UART0;
		// S3C2410X Developer Notice (page 4) warns against writing a 1 to a 0 bit in the INTPND register.
		if (s2410INT->rINTPND & BIT_UART0) 
			s2410INT->rINTPND = BIT_UART0;
		s2410INT->rINTMSK    &= ~BIT_UART0;
		break;

	case SYSINTR_IR:		// IrDA.
		s2410INT->rSUBSRCPND  = (INTSUB_RXD2 | INTSUB_TXD2 | INTSUB_ERR2);
		s2410INT->rINTSUBMSK &= ~INTSUB_RXD2;
		s2410INT->rINTSUBMSK &= ~INTSUB_TXD2;
		s2410INT->rINTSUBMSK &= ~INTSUB_ERR2;
		s2410INT->rSRCPND     = BIT_UART2;
		// S3C2410X Developer Notice (page 4) warns against writing a 1 to a 0 bit in the INTPND register.
		if (s2410INT->rINTPND & BIT_UART2) 
			s2410INT->rINTPND = BIT_UART2;
		s2410INT->rINTMSK    &= ~BIT_UART2;
		break;
*/
/*
	case SYSINTR_AUDIO:		// Audio controller (the controller uses both DMA1 and DMA2 interrupts).
		// DMA1 (input).
		//
		s2410INT->rSRCPND  = BIT_DMA1;
		// S3C2410X Developer Notice (page 4) warns against writing a 1 to a 0 bit in the INTPND register.
		if (s2410INT->rINTPND & BIT_DMA1) s2410INT->rINTPND = BIT_DMA1;
		s2410INT->rINTMSK &= ~BIT_DMA1;
		// DMA2 (output).
		//
		s2410INT->rSRCPND  = BIT_DMA2;
		// S3C2410X Developer Notice (page 4) warns against writing a 1 to a 0 bit in the INTPND register.
		if (s2410INT->rINTPND & BIT_DMA2) s2410INT->rINTPND = BIT_DMA2;
		s2410INT->rINTMSK &= ~BIT_DMA2;
		break;
*/

	case SYSINTR_AUDIO:		// Audio controller (the controller uses both DMA1 and DMA2 interrupts).
		// DMA1 (input).
		//
		//s2410INT->rSRCPND  = BIT_DMA1;
		// S3C2410X Developer Notice (page 4) warns against writing a 1 to a 0 bit in the INTPND register.
		//if (s2410INT->rINTPND & BIT_DMA1) s2410INT->rINTPND = BIT_DMA1;
		s2410INT->rINTMSK &= ~BIT_DMA1;
		// DMA2 (output).
		//
		//s2410INT->rSRCPND  = BIT_DMA2;
		// S3C2410X Developer Notice (page 4) warns against writing a 1 to a 0 bit in the INTPND register.
		//if (s2410INT->rINTPND & BIT_DMA2) s2410INT->rINTPND = BIT_DMA2;
		s2410INT->rINTMSK &= ~BIT_DMA2;
		break;
	case SYSINTR_ADC:
		//return(FALSE);
		break;
    case SYSINTR_PCMCIA_LEVEL:	// PCMCIA data on EINT8.
		s2410INT->rINTMSK  &= ~BIT_EINT8_23;
		//s2410INT->rSRCPND  = BIT_EINT8_23;
		//s2410INT->rINTPND  = BIT_EINT8_23;
		s2410IOP->rEINTMASK &= ~0x100;
		//s2410IOP->rEINTPEND  = 0x100;
		RETAILMSG(1,(TEXT("::: SYSINTR_PCMCIA_LEVEL    OEMInterruptEnable\r\n")));
		break;
	case SYSINTR_PCMCIA_EDGE:
		//return(FALSE);
		break;
	case SYSINTR_PCMCIA_STATE:	// PCMCIA insertion interrupt.
		s2410INT->rSRCPND  = BIT_EINT3;  // to clear the previous pending states
		// S3C2410X Developer Notice (page 4) warns against writing a 1 to a 0 bit in the INTPND register.
		if (s2410INT->rINTPND & BIT_EINT3) s2410INT->rINTPND = BIT_EINT3;
		s2410INT->rINTMSK &= ~BIT_EINT3;
		RETAILMSG(1,(TEXT("::: SYSINTR_PCMCIA_STATE    OEMInterruptEnable\r\n")));
		break;
	case SYSINTR_TIMING:
		//return(FALSE);
		break;
    case SYSINTR_ETHER:			// Ethernet on EINT9.
		s2410IOP->rEINTPEND   = 0x200;
		s2410IOP->rEINTMASK  &= ~0x200;
		s2410INT->rSRCPND     = BIT_EINT8_23;	// by shim
		// S3C2410X Developer Notice (page 4) warns against writing a 1 to a 0 bit in the INTPND register.
		if (s2410INT->rINTPND & BIT_EINT8_23) s2410INT->rINTPND = BIT_EINT8_23;
		s2410INT->rINTMSK    &= ~BIT_EINT8_23;
        break;
#if 0
	case SYSINTR_USB:
   		// USB host interrupt enable bit. by hjcho
   		s2410INT->rINTMSK &= ~BIT_USBH;
   		break;

	case SYSINTR_USBD:
   		s2410INT->rINTMSK &= ~BIT_USBD;
		//RETAILMSG(1,(TEXT("::: SYSINTR_USBD     OEMInterruptEnable\r\n")));
   		break;
#else
	case SYSINTR_USB:			// USB host.
		s2410INT->rSRCPND  = BIT_USBH;
		// S3C2410X Developer Notice (page 4) warns against writing a 1 to a 0 bit in the INTPND register.
		if (s2410INT->rINTPND & BIT_USBH) s2410INT->rINTPND = BIT_USBH;
		s2410INT->rINTMSK &= ~BIT_USBH;
		break;
	case SYSINTR_USBD:
		s2410INT->rSRCPND  = BIT_USBD;
		// S3C2410X Developer Notice (page 4) warns against writing a 1 to a 0 bit in the INTPND register.
		if (s2410INT->rINTPND & BIT_USBD) s2410INT->rINTPND = BIT_USBD;
		s2410INT->rINTMSK &= ~BIT_USBD;
		break;
#endif
	case SYSINTR_POWER:
		s2410INT->rSRCPND  = BIT_EINT0;
		// S3C2410X Developer Notice (page 4) warns against writing a 1 to a 0 bit in the INTPND register.
		if (s2410INT->rINTPND & BIT_EINT0) s2410INT->rINTPND = BIT_EINT0;
		s2410INT->rINTMSK &= ~BIT_EINT0;
		s2410INT->rSRCPND  = BIT_EINT2;
		// S3C2410X Developer Notice (page 4) warns against writing a 1 to a 0 bit in the INTPND register.
		if (s2410INT->rINTPND & BIT_EINT2) s2410INT->rINTPND = BIT_EINT2;
		s2410INT->rINTMSK &= ~BIT_EINT2;
		break;     

	default:
		bRet = FALSE;	/* unsupported interrupt value */
		//return(FALSE);
        break;
	}
    
	INTR_ON();
    	
    return bRet;    
}

// ********************************************************************
//声明：void OEM_InterruptDisable( DWORD idInt )
//参数：
//	IN idInt-逻辑中断号
//返回值：无
//功能描述：关中断
//引用: 当一个设备驱动程序调用INTR_Disable时，由 INTR_Disable 调用该函数
// ********************************************************************

void OEM_InterruptDisable( DWORD idInt )
{
    INTR_OFF();
	
	switch (idInt) 
	{
	case SYSINTR_BREAK:		// There is no halt button on P2.
		break;

    case SYSINTR_DMA0:
        s2410INT->rINTMSK |= BIT_DMA0; // SDIO DMA interrupt
		//RETAILMSG(1,(TEXT("::: SYSINTR_DMA0    OEMInterruptDisable\r\n")));
		break;

	case SYSINTR_SDMMC:
		s2410INT->rINTMSK |= BIT_MMC;
		//RETAILMSG(1,(TEXT("::: SYSINTR_SDMMC    OEMInterruptDisable\r\n")));
		break;

	case SYSINTR_SDMMC_SDIO_INTERRUPT:
		s2410INT->rINTMSK |= BIT_MMC;
		s2410SDIO->rSDIINTMSK &= ~(0x1<<12);		// interrupt from SDIO card
		//RETAILMSG(1,(TEXT("::: SYSINTR_SDMMC_SDIO_INTERRUPT    OEMInterruptDisable\r\n")));
		break;

	case SYSINTR_SDMMC_CARD_DETECT:
		s2410IOP->rEINTMASK |= (1 << 18);
		s2410INT->rINTMSK    |= BIT_EINT8_23;
		//RETAILMSG(1,(TEXT("::: SYSINTR_SDMMC_CARD_DETECT    OEMInterruptDisable\r\n")));
		break;        


	case SYSINTR_TOUCH:
	    break;
	
	case SYSINTR_TOUCH_CHANGED:
//		s2410INT->rINTMSK |= BIT_ADC;
//		s2410INT->rINTSUBMSK |= INTSUB_TC;
//        bTouchSample = FALSE;		
	    break;

	case SYSINTR_KEYBOARD:
		s2410INT->rINTMSK |= BIT_EINT1;
		break;
/*
	case SYSINTR_SERIAL:
		s2410INT->rINTMSK    |= BIT_UART0;
		s2410INT->rINTSUBMSK |= INTSUB_RXD0;
		s2410INT->rINTSUBMSK |= INTSUB_TXD0;
		s2410INT->rINTSUBMSK |= INTSUB_ERR0;
		break;

	case SYSINTR_IR:
		s2410INT->rINTMSK    |= BIT_UART2;
		s2410INT->rINTSUBMSK |= INTSUB_RXD2;
		s2410INT->rINTSUBMSK |= INTSUB_TXD2;
		s2410INT->rINTSUBMSK |= INTSUB_ERR2;
		break;
*/
	case SYSINTR_SERIAL:
		s2410INT->rINTMSK    |= BIT_UART0;
#ifdef xyg_ser_sub_mask
		s2410INT->rINTSUBMSK |= INTSUB_RXD0;
		s2410INT->rINTSUBMSK |= INTSUB_TXD0;
		s2410INT->rINTSUBMSK |= INTSUB_ERR0;
#endif
		//RETAILMSG(1,(TEXT("::: SYSINTR_SERIAL    OEMInterruptDisable\r\n")));
		break;
	case SYSINTR_IR:
		s2410INT->rINTMSK    |= BIT_UART1;
#ifdef xyg_ser_sub_mask
		s2410INT->rINTSUBMSK |= INTSUB_RXD1;
		s2410INT->rINTSUBMSK |= INTSUB_TXD1;
		s2410INT->rINTSUBMSK |= INTSUB_ERR1;
#endif
		//RETAILMSG(1,(TEXT("::: SYSINTR_IR    OEMInterruptDisable\r\n")));		
		break;

	case SYSINTR_AUDIO:
        s2410INT->rINTMSK |= BIT_DMA1;	// Audio input DMA.
		s2410INT->rINTMSK |= BIT_DMA2;	// Audio output DMA.
		break;

	case SYSINTR_ADC:
		break;

    case SYSINTR_PCMCIA_LEVEL:
		s2410IOP->rEINTMASK |= 0x100;
		s2410INT->rINTMSK   |= BIT_EINT8_23;
		//RETAILMSG(1,(TEXT("::: SYSINTR_PCMCIA_LEVEL    OEMInterruptDisable\r\n")));
        break;

	case SYSINTR_PCMCIA_EDGE:
		break;

	case SYSINTR_PCMCIA_STATE:
		s2410INT->rINTMSK |= BIT_EINT3;
		//RETAILMSG(1,(TEXT("::: SYSINTR_PCMCIA_STATE    OEMInterruptDisable\r\n")));
		break;