init_vhz_wx.c

f2407:电机控制

/*---------------------------------------------------------------------------------
System and peripheral initializate functions
---------------------------------------------------------------------------------*/
void sysinit(void)
{	*SCSR1=0x0C1FF;					//CLOCKOUT PIN OUTPUT WATCHDOG CLOCK, IDLE1 MODE, 4*Fin
									//ALL MODEL CLOCK ENABLE
	*SCSR2=(*SCSR2&0xFF8F)|0x0060;	//I/P QUAL=1, the input qualifier circuitry glitches up to 11 clock circle
									//WD OVERRIDE=0, protect the watchdog from being disable by software
									//XMIF HI-Z=0, XMIF signals in normal driven mode
									//BOOT ENABLE, MP/MC SELECTED determine by hardware
									//DON PON=11, SRAM mapped both internal bata space and program space
	*IFR=0x0FFFF;					//CLEAR ALL INTERRUPT FLAG
	*IMR=0x03;						//INT1, INT2 ENABLE
	WSGR=0;							//WITHOUT WAIT STATE
} 

void wdinit(void)
{	*WDCR=0x02F;				//WATCH DOG ENABLE, PRESCALE 64   
}

void qepinit(void)
{	*MCRC=*MCRC|0x0180;					//configure IOPF1 and IOPE7 as qep port 
	*T4PR=0xFFFF;
	*T4CNT=0;
	*T4CON=0x1870;						//DIRECTIONAL UP-DOWN COUNT MODE, PRESCALER ZERO, DISABLE T4CMPR
}

void pdpinit(void)
{	*PIRQR2=*PIRQR2&0xFFFE;		//IRQ2.0=0, clear PDPINTB interrupt request
	*EVBIFRA=*EVBIFRA|0x1;		//PDPINTB FLAG=0, clear the PDPINTB interrupt flag
	*EVBIMRA=*EVBIMRA|0x1;		//PDPINTB ENABLE=1, PDPINTB interrupt enable
} 

void pwminit(void)
{	*MCRC=*MCRC|0x7E;	    //IOPE1-IOPE6 used as PWM output
	*EVBIFRA=0x0FFFF;           //clear interrupt bit 
	*EVBIMRA=*EVBIMRA|0x0200;   //T3 underflow interrupt enable, disable others 
	*ACTRB=0x1FFF;              //vector rotate positive, PWM7,8,9,10,11,12 force high
	*DBTCONB=0x0AF0;	       	//death-band timer period A, prescaler 16, death timer enable
				    //death time: A*16*Tosc=4uS, oscillatory: 40M, Tosc=1/40 
	*GPTCONB=0x0100;			//T3 period interrupt starts ADC 
	*T3PR=T_pwm;              	//set timr3 period register
	*T3CMPR=0;					//set compare register
	*CMPR4=0;          		//PWM output zero 
	*CMPR5=0;
	*CMPR6=0;
	*T3CNT=0;                   //clear timr3 
	*COMCONB=0x08200; 			//tmr3 compare enable, space vector PWM disable, compare output enable 
	*T3CON=0x0842;              //continue up-down count mode, prescaler zero, timr3 enable, T3 compare enable 
  // 	*ACTRB=(*ACTRB&0xF000)|0x999;			//PWM8,10,12 active high,PWM7,9,11 active low

}  

void ioinit(void)                                      
{
	// IO输入口设置
	*MCRA=*MCRA&0x00FF;			//IOPB0-IOPB7 configurate as I/O port
	*PBDATDIR=*PBDATDIR&0x00FF;	//IOPB0-IOPB7 configurate as input port  
	// 138片选设置
	*MCRA=*MCRA&0xFF87;			//IOPA3-IOPA5 configurate as I/O port
	*PADATDIR=*PADATDIR|0x3800;	//IOPA3-IOPA5 configurate as output port  
	*PADATDIR=(*PADATDIR&0xFFEF)|0x0028;          //IOPA3=1,IOPA4=0,IOPA5=1;选通IO输入 
	//PWM7制动电阻控制用IO输出方式设置
	*MCRA=*MCRA&0xffbf;			//IOPA6 configurate as I/O port,IOPA6即是PWM7
	*PADATDIR=*PADATDIR|0x4000;  //IOPA6 configurate as output port
	*PADATDIR=*PADATDIR|0x0040;  //IOPA6=1 输出脚设置为高电平
}   

void caninit(void)              //波特率已改为125k,2005-10-3
{	*MCRB=(*MCRB&0xFF3F)|0xC0;	//configure CANXH and CANXL 
	*MCR=*MCR|0x1000;			//bit configuration register write access enable
	while((*MCR&0x1000)==0)
		*MCR=*MCR|0x1000;
	*BCR2=0x0f;					//BRP=3, for 500kHz baud rate ;BRP=15,for 125K baud rate
	*BCR1=0x01de;				//Iclk=fosc=40M, SBG=0:resynchronization on down edges, 
								//SJW=2:two TQ unit lengten or shorten when resynchronization receive data
								//SAM=1:sample three times and make the majority dicision
								//baud rate=Iclk/((BRP+1)*BIT time), so BIT time=Iclk/((BRP+1)*baud rate)
								//where BRP=1, baud rate=1Mbit/s, Iclk=24MHz, so that the BIT time =24/((1+1)*1)=12;
                            	//and because (TSEG1+1)+(TSEG2+1)+1=BIT time=12, so TSEG1=5, TSEG2=4
	*MCR=*MCR&0x0EFFF;
	while((*MCR&0x1000)!=0)
		*MCR=*MCR&0xEFFF;
	*MCR=*MCR|0x0480;			//clear CDR bit, normal operation request
								//SUSP=0:peripheral shut down during suspend when the current transmition complete
								//PDR=0:no power down mode, normal operation
								//DBO=1:message sending or receiving order:01234567
								//WUBA=0:wake up on bus active 
								//ABO=1: auto bus on  
								//STM=0:self test mode disable  
								//MBNR=0, no remote mailbox data write access require 
}  

void mailbox0_init(void)         //2005-10-4
{	*MDER=*MDER&0xFFFE;			//mailbox0 disable 邮箱0接收电机转速显示器发送的转速给定,地址为0xAA+000b
	if((*MDER&0x08)==0x01)
		*MDER=*MDER&0xFFFE;
	*MCR=(*MCR&0xFFFC)|0x100;	//CPU request to change the data field of mailbox0
	*LAM0_H=0x0003;				//LAMI=0, IDE bit value determine which frame will be received
								//LAM1H=0, all the standard identifier will be unmasked
								/*note: this register will be change in mailbox1_init too, 
								  both of them must be the same!*/
	*LAM0_L=0xFFFF;				//LAM1L=1, lower part of identifier is not care    
								/*note: this register will be change in mailbox1_init too, 
								  both of them must be the same!*/              
	*MSGID0L=0x0;				//lower part of extended identifier is zero
	*MSGID0H=0x5540;			//IDE=0, the to be received message must be a standard frame
								//AME=1, corresponding acceptance mask bit is used
								//AAM=0, do not reply the remote frame
								//standard identifier is 50h
	*MSGCTRL0=0x08;				//RTR=0, data frame is sent
								//DLC=8, this bit is don't care bit, it will be overwrite by the received message
	*MBX0A=0;
	*MBX0B=0;
	*MBX0C=0;
	*MBX0D=0; 
	*MCR=*MCR&0xFEFF;           //CDR=0, CPU request normal operation
	*MDER=*MDER|0x01;			//mailbox0 enable
}
                                             
void mailbox1_init(void)        // 邮箱1接收时间显示器的时间参数,地址为0xA5+000b
{	*MDER=*MDER&0xFFFD;			//mailbox1 disable
	if((*MDER&0x08)==0x08)
		*MDER=*MDER&0xFFFD;
	*MCR=(*MCR&0xFFFC)|0x101;	//CPU request to change the data field of mailbox1
	*LAM0_H=0x0003;				//LAMI=0, IDE bit value determine which frame will be received
								//LAM1H=0, all the standard identifier will be unmasked
								/*note: this register will be change in mailbox1_init too, 
								  both of them must be the same!*/
	*LAM0_L=0xFFFF;				//LAM1L=1, lower part of identifier is not care    
								/*note: this register will be change in mailbox1_init too, 
								  both of them must be the same!*/              
	*MSGID1L=0;					//lower part of extended identifier is zero
	*MSGID1H=0x54A0;			//IDE=0, the to be received message must be a standard frame
								//AME=1, corresponding acceptance mask bit is used
								//AAM=0, do not reply the remote frame
								//standard identifier is 55h
	*MSGCTRL1=0x08;				//RTR=0, data frame is sent
								//DLC=8, this bit is a don't care bit, it will be overwriten by the received frame
	*MBX1A=0;
	*MBX1B=0;
	*MBX1C=0;
	*MBX1D=0;
	*MCR=*MCR&0xFEFF;			//CDR=0, CPU request normal operation
	*MDER=*MDER|0x2;			//mailbox1 enable
} 
                                                     
void mailbox2_init(void)         //邮箱2接收上位机的转速给定,地址为0xAA+010b
{	*MDER=*MDER&0xFFFB;			//mailbox2 disable
	if((*MDER&0x04)==0x04)
		*MDER=*MDER&0xFFFB;
	*MCR=(*MCR&0xFFFC)|0x102;	//CPU request to change the data field of mailbox2 
	*LAM1_H=0x8000;				//LAMI=1, the received message will be a standard frame or extended frame which depend on the received message's IDE bit value  
								//LAM1H=0, all the standard identifier will be unmasked
								/*note: this register will be change in mailbox3_init too, 
								  both of them must be the same!*/
	*LAM1_L=0xFFFF;				//LAM1L=1, lower part of identifier is not care    
								/*note: this register will be change in mailbox3_init too, 
								  both of them must be the same!*/
	*MSGID2L=0;					//lower part of extended identifier is zero
	*MSGID2H=0x5548;			//IDE=0, this bit is don't care bit, it is depended on the received message
								//AME=1, corresponding acceptance mask bit is used
								//AAM=0, do not reply the remote frame
								//standard identifier is zero
	*MSGCTRL2=0x08;				//RTR=0, data frame is sent
								//DLC=8, this bit is don't care bit, which value is depended on the received message
	*MBX2A=0;
	*MBX2B=0;
	*MBX2C=0;
	*MBX2D=0;					//mailbox2n=0
	*MCR=*MCR&0xFEFF;			//CDR=0, CPU requests normal operation
	*MDER=(*MDER&0xFFBF)|0x44;	//mailbox2 enable, and mailbox2 configurate as a receiver																			
} 

void mailbox3_init(void)         //邮箱3发送电机实际转速,地址为0xAA+001
{	*MDER=*MDER&0xFFF7;			//mailbox3 disable             
	if((*MDER&0x08)==0x08)                           
		*MDER=*MDER&0xFFF7;
	*MCR=(*MCR&0xFFFC)|0x103;	//CPU request to change the data field of mailbox3
	*LAM1_H=0x8003;				//LAMI=1, the received message will be a standard frame or extended frame which depend on the received message's IDE bit value  
								//LAM1H=0, all the standard identifier will be unmasked
								/*note: this register will be change in mailbox3_init too, 
								  both of them must be the same!*/
	*LAM1_L=0xFFFF;				//LAM1L=1, lower part of identifier is not care    
								/*note: this register will be change in mailbox3_init too, 
								  both of them must be the same!*/
	*MSGID3L=0;					//lower part of extended identifier is zero
	*MSGID3H=0x7544;			//IDE=0, this bit is a don't care bit because the LAMI=1
								//AME=1, corresponding acceptance mask bit is used
								//AAM=1, auto answer the remote frame
								//standard identifier is 1010 1010 001B
	*MSGCTRL3=0x08;				//RTR=0, data frame is sent
								//DLC=8, for answering a remote frame, this bit value is overwrite by the remote frame
	*MBX3A=0;
	*MBX3B=0;
	*MBX3C=0;
	*MBX3D=0;
	*MCR=*MCR&0xFEFF;			//CDR=0, CPU requests normal operation
	*MDER=*MDER|0x08;			//mailbox3 enable, and mailbox3 configurate as transmitter
 	*TCR=*TCR|0x20;             //初始化时发送一次数据,以便在主程序中判断发送是否成功的标志  
}   

void adinit(void)
{	*ADCTRL1=0x4000;			//AD RESET
	asm(" NOP");
	*ADCTRL1=0x2800; /**/		//COMPLETE CURRENT CONVERSION BEFORE STOP, PRESCALE 8, 
								//CONVERSION CLOCK PRESCALE ZERO, START STOP MODE
								//INTERRUPT PRIORT HIGH, DUAL SEQUENCE MODE, OFFSET CALIBRATION
								//MODE DISABLE, BRIDGE DISABLE, SECLECT Vrefl0, SELF TEST DISABLE
	*CHSELSEQ3=0x4444;			//SELECT CHANNEL 4,用于频率给定
//	*CHSELSEQ4=0x1111;			//SELECT CHANNEL 1
	*MAXCONV=0x000;				//MAX CONVERSION OF SEQ2 IS 1
	*ADCTRL2=0x4040;			//RESET SEQUENCER1 AND SEQUENCER2
	asm(" NOP");
	*ADCTRL2=0x0003;			//CLEARS A PENDING SOC, INTERRUPT MODE 0 (DISABLE), CLEAR AD INTERRUPT FLAG, 
								//EVMB TRIGGER FOR SEQ1 ENABLE 
}