pic168xa.h

带有LCD

/*
 *	Header file for the Microchip 
 *	PIC 16F873A chip
 *	PIC 16F874A chip
 *	PIC 16F876A chip
 *	PIC 16F877A chip
 *	Midrange Microcontroller
 */

#if defined(_16F874A)	|| defined(_16F877A)
#define	__PINS_40
#endif

static volatile unsigned char	INDF	@ 0x00;
static volatile unsigned char	TMR0	@ 0x01;
static volatile unsigned char	PCL	@ 0x02;
static volatile unsigned char	STATUS	@ 0x03;
static          unsigned char	FSR	@ 0x04;
static volatile unsigned char	PORTA	@ 0x05;
static volatile unsigned char	PORTB	@ 0x06;
static volatile unsigned char	PORTC	@ 0x07;
#ifdef __PINS_40
static volatile unsigned char	PORTD	@ 0x08;
static volatile unsigned char	PORTE	@ 0x09;
#endif
static          unsigned char	PCLATH	@ 0x0A;
static volatile unsigned char	INTCON	@ 0x0B;
static volatile unsigned char	PIR1	@ 0x0C;
static volatile unsigned char	PIR2	@ 0x0D;
static volatile unsigned char	TMR1L	@ 0x0E;
static volatile unsigned char	TMR1H	@ 0x0F;
static volatile unsigned char	T1CON	@ 0x10;
static volatile unsigned char	TMR2	@ 0x11;
static volatile unsigned char	T2CON	@ 0x12;
static volatile unsigned char	SSPBUF	@ 0x13;
static volatile unsigned char	SSPCON	@ 0x14;
static volatile unsigned char	CCPR1L	@ 0x15;
static volatile unsigned char	CCPR1H	@ 0x16;
static volatile unsigned char	CCP1CON	@ 0x17;
static volatile unsigned char	RCSTA	@ 0x18;
static volatile unsigned char	TXREG	@ 0x19;
static volatile unsigned char	RCREG	@ 0x1A;
static volatile unsigned char	CCPR2L	@ 0x1B;
static volatile unsigned char	CCPR2H	@ 0x1C;
static volatile unsigned char	CCP2CON	@ 0x1D;
static volatile unsigned char	ADRESH	@ 0x1E;
static volatile unsigned char	ADCON0	@ 0x1F;

/*	bank 1 registers */
static          unsigned char bank1	OPTION	@ 0x81;
static volatile	unsigned char bank1	TRISA	@ 0x85;
static volatile	unsigned char bank1	TRISB	@ 0x86;
static volatile	unsigned char bank1	TRISC	@ 0x87;
#ifdef	__PINS_40
static volatile unsigned char bank1	TRISD	@ 0x88;
static volatile unsigned char bank1	TRISE	@ 0x89;
#endif
static volatile unsigned char bank1	PIE1	@ 0x8C;
static volatile unsigned char bank1	PIE2	@ 0x8D;
static volatile unsigned char bank1	PCON	@ 0x8E;
static volatile unsigned char bank1	SSPCON2	@ 0x91;
static volatile unsigned char bank1	PR2	@ 0x92;
static volatile unsigned char bank1	SSPADD	@ 0x93;
static volatile unsigned char bank1	SSPSTAT	@ 0x94;
static volatile unsigned char bank1	TXSTA	@ 0x98;
static volatile unsigned char bank1	SPBRG	@ 0x99;
static volatile unsigned char bank1	CMCON	@ 0x9C;
static volatile unsigned char bank1	CVRCON	@ 0x9D;
static volatile unsigned char bank1	ADRESL	@ 0x9E;
static volatile unsigned char bank1	ADCON1	@ 0x9F;

/*	bank 2 registers */
static volatile unsigned char bank2	EEDATA	@ 0x10C;
static volatile unsigned char bank2	EEADR	@ 0x10D;
static volatile unsigned char bank2	EEDATH	@ 0x10E;
static volatile unsigned char bank2	EEADRH	@ 0x10F;

/*	bank 3 registers */
static volatile unsigned char bank3	EECON1	@ 0x18C;
static volatile unsigned char bank3	EECON2	@ 0x18D;

/*	STATUS bits	*/
static volatile bit	IRP     @ (unsigned)&STATUS*8+7;
static volatile bit	RP1     @ (unsigned)&STATUS*8+6;
static volatile bit	RP0     @ (unsigned)&STATUS*8+5;
static volatile bit	TO	@ (unsigned)&STATUS*8+4;
static volatile bit	PD	@ (unsigned)&STATUS*8+3;
static volatile bit	ZERO    @ (unsigned)&STATUS*8+2;
static volatile bit	DC      @ (unsigned)&STATUS*8+1;
static volatile bit	CARRY   @ (unsigned)&STATUS*8+0;

/*      PORTA bits      */
static volatile bit	RA5	@ (unsigned)&PORTA*8+5;
static volatile bit	RA4	@ (unsigned)&PORTA*8+4;
static volatile bit	RA3	@ (unsigned)&PORTA*8+3;
static volatile bit	RA2	@ (unsigned)&PORTA*8+2;
static volatile bit	RA1	@ (unsigned)&PORTA*8+1;
static volatile bit	RA0	@ (unsigned)&PORTA*8+0;

/*      PORTB bits      */
static volatile bit	RB7	@ (unsigned)&PORTB*8+7;
static volatile bit	RB6	@ (unsigned)&PORTB*8+6;
static volatile bit	RB5	@ (unsigned)&PORTB*8+5;
static volatile bit	RB4	@ (unsigned)&PORTB*8+4;
static volatile bit	RB3	@ (unsigned)&PORTB*8+3;
static volatile bit	RB2	@ (unsigned)&PORTB*8+2;
static volatile bit	RB1	@ (unsigned)&PORTB*8+1;
static volatile bit	RB0	@ (unsigned)&PORTB*8+0;

/*      PORTC bits      */
static volatile bit	RC7	@ (unsigned)&PORTC*8+7;
static volatile bit	RC6	@ (unsigned)&PORTC*8+6;
static volatile bit	RC5	@ (unsigned)&PORTC*8+5;
static volatile bit	RC4	@ (unsigned)&PORTC*8+4;
static volatile bit	RC3	@ (unsigned)&PORTC*8+3;
static volatile bit	RC2	@ (unsigned)&PORTC*8+2;
static volatile bit	RC1	@ (unsigned)&PORTC*8+1;
static volatile bit	RC0	@ (unsigned)&PORTC*8+0;

/*      PORTD bits      */
#ifdef	__PINS_40
static volatile bit	RD7	@ (unsigned)&PORTD*8+7;
static volatile bit	RD6	@ (unsigned)&PORTD*8+6;
static volatile bit	RD5	@ (unsigned)&PORTD*8+5;
static volatile bit	RD4	@ (unsigned)&PORTD*8+4;
static volatile bit	RD3	@ (unsigned)&PORTD*8+3;
static volatile bit	RD2	@ (unsigned)&PORTD*8+2;
static volatile bit	RD1	@ (unsigned)&PORTD*8+1;
static volatile bit	RD0	@ (unsigned)&PORTD*8+0;

/*      PORTE bits      */
static volatile bit	RE2	@ (unsigned)&PORTE*8+2;
static volatile bit	RE1	@ (unsigned)&PORTE*8+1;
static volatile bit	RE0	@ (unsigned)&PORTE*8+0;
#endif

/*	INTCON bits	*/
static volatile bit	GIE	@ (unsigned)&INTCON*8+7;
static volatile bit	PEIE	@ (unsigned)&INTCON*8+6;
static volatile bit	T0IE	@ (unsigned)&INTCON*8+5;
static volatile bit	INTE	@ (unsigned)&INTCON*8+4;
static volatile bit	RBIE	@ (unsigned)&INTCON*8+3;
static volatile bit	T0IF	@ (unsigned)&INTCON*8+2;
static volatile bit	INTF	@ (unsigned)&INTCON*8+1;
static volatile bit	RBIF	@ (unsigned)&INTCON*8+0;
// alternate definitions
static volatile bit	TMR0IE	@ (unsigned)&INTCON*8+5;
static volatile bit	TMR0IF	@ (unsigned)&INTCON*8+2;

/*	PIR1 bits	*/
#ifdef	__PINS_40
static volatile bit	PSPIF	@ (unsigned)&PIR1*8+7;
#endif
static volatile bit	ADIF	@ (unsigned)&PIR1*8+6;
static volatile bit	RCIF	@ (unsigned)&PIR1*8+5;
static volatile bit	TXIF	@ (unsigned)&PIR1*8+4;
static volatile bit	SSPIF	@ (unsigned)&PIR1*8+3;
static volatile bit	CCP1IF	@ (unsigned)&PIR1*8+2;
static volatile bit	TMR2IF	@ (unsigned)&PIR1*8+1;
static volatile bit	TMR1IF	@ (unsigned)&PIR1*8+0;

/*	PIR2 bits	*/
static volatile bit	CMIF	@ (unsigned)&PIR2*8+6;
static volatile bit	EEIF	@ (unsigned)&PIR2*8+4;
static volatile bit	BCLIF	@ (unsigned)&PIR2*8+3;
static volatile bit	CCP2IF	@ (unsigned)&PIR2*8+0;

/*	T1CON bits	*/
static volatile bit	T1CKPS1	@ (unsigned)&T1CON*8+5;
static volatile bit	T1CKPS0	@ (unsigned)&T1CON*8+4;
static volatile bit	T1OSCEN	@ (unsigned)&T1CON*8+3;
static volatile bit	T1SYNC 	@ (unsigned)&T1CON*8+2;
static volatile bit	TMR1CS 	@ (unsigned)&T1CON*8+1;
static volatile bit	TMR1ON 	@ (unsigned)&T1CON*8+0;

/*	T2CON bits	*/
static volatile bit	TOUTPS3	@ (unsigned)&T2CON*8+6;
static volatile bit	TOUTPS2	@ (unsigned)&T2CON*8+5;
static volatile bit	TOUTPS1	@ (unsigned)&T2CON*8+4;
static volatile bit	TOUTPS0	@ (unsigned)&T2CON*8+3;
static volatile bit	TMR2ON 	@ (unsigned)&T2CON*8+2;
static volatile bit	T2CKPS1	@ (unsigned)&T2CON*8+1;
static volatile bit	T2CKPS0	@ (unsigned)&T2CON*8+0;

/*	SSPCON bits	*/
static volatile bit	WCOL	@ (unsigned)&SSPCON*8+7;
static volatile bit	SSPOV	@ (unsigned)&SSPCON*8+6;
static volatile bit	SSPEN	@ (unsigned)&SSPCON*8+5;
static volatile bit	CKP	@ (unsigned)&SSPCON*8+4;
static volatile bit	SSPM3	@ (unsigned)&SSPCON*8+3;
static volatile bit	SSPM2	@ (unsigned)&SSPCON*8+2;
static volatile bit	SSPM1	@ (unsigned)&SSPCON*8+1;
static volatile bit	SSPM0	@ (unsigned)&SSPCON*8+0;

/*	CCP1CON bits	*/
static volatile bit	CCP1X	@ (unsigned)&CCP1CON*8+5;
static volatile bit	CCP1Y	@ (unsigned)&CCP1CON*8+4;
static volatile bit	CCP1M3	@ (unsigned)&CCP1CON*8+3;
static volatile bit	CCP1M2	@ (unsigned)&CCP1CON*8+2;
static volatile bit	CCP1M1	@ (unsigned)&CCP1CON*8+1;
static volatile bit	CCP1M0	@ (unsigned)&CCP1CON*8+0;

/*	RCSTA bits	*/
static volatile bit	SPEN	@ (unsigned)&RCSTA*8+7;
static volatile bit	RX9 	@ (unsigned)&RCSTA*8+6;
static volatile bit	SREN	@ (unsigned)&RCSTA*8+5;
static volatile bit	CREN	@ (unsigned)&RCSTA*8+4;
static volatile bit	ADDEN	@ (unsigned)&RCSTA*8+3;
static volatile bit	FERR	@ (unsigned)&RCSTA*8+2;
static volatile bit	OERR	@ (unsigned)&RCSTA*8+1;