seg_7.vhd

此为一个点亮7数码管的0-99记数程序,通过每按动一下add键,数码管显示加一直到99,过程中按动RST键复位!

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
entity seg_7 is
port(clk:in std_logic;
     add:in std_logic;
     seg1_2:out std_logic_vector(0 to 1);
     seg_cou:out std_logic_vector(0 to 7);
     rst:in std_logic
);
end entity;
architecture dataflow of seg_7 is
subtype shortint is integer range 0 to 100;
type state is(s1,s2,s3,s4,s5);
signal current_state,next_state:state; 
signal addv:std_logic;
signal clk1:std_logic;
signal counter:shortint;
signal a:shortint;
begin
process(clk,rst)--对主时钟分频
variable coun:std_logic_vector(4 downto 0);
begin 
if(rst='1')then   
      coun:="00000";
elsif(clk'event and clk='1')then
   if(coun="11111")then coun:="00000";
  else
     coun:=coun+'1';  
   end if;
end if; 
clk1<=coun(4);
end process;

process(clk1,rst)--分频,为了数码管的显示
variable cou:std_logic_vector(7 downto 0);
begin
if(rst='1')then   
      cou:="00000000";
elsif(clk1'event and clk1='1')then
         current_state<=next_state;
  if(cou="11111111")then cou:="00000000";
  else
   cou:=cou+'1';
  end if;	
end if;

case(cou(7))is
when '1'=> seg1_2<="01";a<=counter/10;--交叉显示数码管
when others=> seg1_2<="10";a<=counter mod 10;
end case;
end process;

process(addv,rst)
begin
if(counter=100 or rst='1')then counter<=0;
elsif(addv'event and addv='0')then
    counter<=counter+1;        
end if;
end process;

process(current_state,next_state,clk1,add)--状态机,消除按键抖动
begin
case current_state is
when s1=>
if(add='1')then
   addv<='0';
  next_state<=s2;
else next_state<=s1;
end if;   
when s2=>
if(add='1')then
   addv<='0';
  next_state<=s3;
else next_state<=s1;
end if;   
when s3=>
if(add='1')then
   addv<='0';
  next_state<=s4;
else next_state<=s1;
end if;   
when s4=>
if(add='1')then
   addv<='0';
  next_state<=s5;
else next_state<=s1;
end if;   
when s5=>
  if(add='0')then
  addv<='1';
  next_state<=s1;
end if;
end case;
end process;

process(counter,a,addv)
begin
case(a)is   
    when 0=>seg_cou<="00000011"; 
	when 1=>seg_cou<="10011111";
	when 2=>seg_cou<="00100101";
	when 3=>seg_cou<="00001101";
	when 4=>seg_cou<="10011001";
	when 5=>seg_cou<="01001001";
	when 6=>seg_cou<="01000001";
	when 7=>seg_cou<="00011111";
	when 8=>seg_cou<="00000001";
	when others=>seg_cou<="00001001";
end case;
end process;

end dataflow;