📄 emsdio_hostcontroller_drivers.htm

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     <font color="#FFFFFF" size="5" face="Arial, Helvetica, sans-serif"><strong>Embedded SDIO Driver Kit Help </strong></font></td>
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<p class="BODYTEXT">Host controller drivers are the hardware abstraction 
  layer to the SDIO core. Host controller drivers are chipset and platform specific
  and often contain portions that are operating system dependent since they require
  hardware resources (I/O, DMA, interrupts) managed by an OS. The stack supports
  one or more SDIO host controllers with independently operating host drivers.
  Much like function drivers, host controller drivers are not &quot;aware&quot; of
  other host controller drivers in the system. A designer is free to mix and
  match
  host controllers to meet system requirements and to reduce design complexity
  in multi-slot designs. The SDIO stack does not support a bussed slot arrangement
  where a single controller is interfaced to two independent slots. Each host
  controller driver  supports one card  slot.</p>
<p class="BODYTEXT">Much of the card configuration and management intelligence
  reside in the SDIO core module, known as the bus driver, fully isolated from
  hardware-specific host controller details. The SDIO core establishes an interface
  and a set of
  rules
  that all host controller drivers follow. A new host controller design will
  often require only a small fraction of code to be written as most of the SDIO
  configuration and protocol is handled in the SDIO core and card function drivers.  </p>
<p class="BODYTEXT">The stack supports SD in different bus modes
    to give designers the greatest flexibility in using off-the-shelf, legacy
  or next generation controllers. A design that uses SPI bus 
  would be attractive for cost sensitive
  embedded
  applications
  integrating board-level SDIO peripherals that
  may
  not require
    the speed or flexibility of a full hot-pluggable SD native implementation.  </p>
<p class="BODYTEXT">An SDIO technical committee has created a standard host controller
  specification that defines the register set and behavior for discrete or on-chip
  SDIO controllers.
      This allows software developers to maintain one set of re-usable control
    code
      for different chip vendors or chip generations. The standard controller
  also encourages compatibility between systems. The standard host controller
  defines
      a register set usable for controllers located on buses such as generic
  SRAM-like interfaces or PCI local buses. The specification also describes Direct
  Memory
      Access techniques, voltage application and card slot electro-mechanical
  interfaces (card insertion and write protect switch).  The stack supports the
  standard host controller as a sample (host controller development only) or
  as a binary for card function driver development.<br>
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