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📄 hostc_development_overview.htm

📁 SDIO Linux documentation
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<title>Host Controller Driver Develolpment</title>
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     <font color="#FFFFFF" size="5" face="Arial, Helvetica, sans-serif"><strong>Embedded SDIO Driver Kit Help </strong></font></td>
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		<p class="BODYTEXT">This sections covers the development of host
		controller drivers (HCDs).&nbsp; Host controller drivers operate at
		the lowest layer in the SDIO&nbsp;stack.&nbsp; They provide
		peripheral&nbsp;drivers and the&nbsp;bus driver, hardware-independent
		access to&nbsp;cards via&nbsp;the SD/SDIO electrical
		protocol.&nbsp;&nbsp;Host controller hardware consists of the physical
		interface&nbsp;controller and slot&nbsp;electronics (e.g. card detect,
		power FET control). Host controllers rely on upper layer software to
		enumerate SDIO cards and functions and additional&nbsp;drivers&nbsp;to
		configure and control&nbsp;these functions.&nbsp; The SDIO stack
		architecture pushes function control complexity to upper software
		layers&nbsp;to ease porting and maximize code reuse across different
		hardware designs&nbsp;.&nbsp; This approach further reduces or
		eliminates the&nbsp;porting effort when using SDIO&nbsp;peripheral
		drivers&nbsp;across multiple hardware platforms.&nbsp;</p>

		<p class="BODYTEXT">The SDIO stack provides a flexible architecture
		for incorporating host controller drivers with varying
		capabilities.&nbsp;Host controllers can operate in&nbsp;either SPI, 1
		bit and/or 4 bit modes.&nbsp; Their SDIO&nbsp;buses can operate at
		different clock ranges, block size requirements&nbsp;and even support
		different operating slot voltages.&nbsp; A system designer can
		effectively "mix-and-match" different host controllers&nbsp;in order
		to&nbsp;meet design requirements.&nbsp; The SDIO core and peripheral
		drivers utilize&nbsp;an optimal bus configuration based on card and
		host capabilities.&nbsp; This dynamic configuration provides&nbsp;
		improved interoperability and re-use of peripheral drivers on systems
		with radically different host controller designs.</p>

		<p class="BODYTEXT">The following sections provide details on the
		structure of a host controller driver and how HCDs interact with the
		SDIO core.</p>
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