📄 boat.lst
字号:
__start:
__text_start:
0024 E5CF LDI R28,0x5F
0025 E0D4 LDI R29,4
0026 BFCD OUT 0x3D,R28
0027 BFDE OUT 0x3E,R29
0028 51C0 SUBI R28,0x10
0029 40D0 SBCI R29,0
002A EA0A LDI R16,0xAA
002B 8308 STD Y+0,R16
002C 2400 CLR R0
002D E6E0 LDI R30,0x60
002E E0F0 LDI R31,0
002F E010 LDI R17,0
0030 3AE9 CPI R30,0xA9
0031 07F1 CPC R31,R17
0032 F011 BEQ 0x0035
0033 9201 ST R0,Z+
0034 CFFB RJMP 0x0030
0035 8300 STD Z+0,R16
0036 E4E8 LDI R30,0x48
0037 E0F0 LDI R31,0
0038 E6A0 LDI R26,0x60
0039 E0B0 LDI R27,0
003A E010 LDI R17,0
003B 34E8 CPI R30,0x48
003C 07F1 CPC R31,R17
003D F021 BEQ 0x0042
003E 95C8 LPM
003F 9631 ADIW R30,1
0040 920D ST R0,X+
0041 CFF9 RJMP 0x003B
0042 940E045A CALL _main
_exit:
0044 CFFF RJMP _exit
FILE: G:\汽艇\source\key_board\boat.c
(0001) // Last modify time: 2004-8-16 15:18:53
(0002) // Target : M16
(0003) // Crystal: 8.0000Mhz
(0004)
(0005) #include <iom16v.h>
(0006) #include <macros.h>
(0007)
(0008) #define uchar unsigned char
(0009) #define uint unsigned int
(0010) /*调速模块预定义*/
(0011) #define MAX_SPEED 510
(0012) #define MIN_SPEED -510
(0013) #define L_ACCE_COUNT 2
(0014) #define L_DECE_COUNT 2
(0015) #define L_STEP 1
(0016) #define R_ACCE_COUNT 2
(0017) #define R_DECE_COUNT 2
(0018) #define R_STEP 1
(0019) #define SPEED_INC 5
(0020)
(0021) #define SET_L_DIR ( PORTB |= BIT(PB0) ) //电机方向控制I/O定义
(0022) #define RST_L_DIR ( PORTB &= ~BIT(PB0) )
(0023) #define SET_R_DIR ( PORTB |= BIT(PB1) )
(0024) #define RST_R_DIR ( PORTB &= ~BIT(PB1) )
(0025)
(0026) typedef struct _trap{ int des_speed;
(0027) int real_speed;
(0028) uint acce_count;
(0029) uint dece_count;
(0030) uint counter;
(0031) int step; //必须用int型，因为速度控制接口函数trap_ctrler的代码结构
(0032) }trap;
(0033) trap l_trap, r_trap;
(0034) uint l_temp_speed, r_temp_speed;
(0035) uint delay_counter;
(0036) /*串口通讯模块预定义*/
(0037) #define SCOM_BUF_LEN 20
(0038) uchar tbuf[SCOM_BUF_LEN];
(0039) uchar rbuf[SCOM_BUF_LEN];
(0040) uint key_status;
(0041) /*键盘模块预定义*/
(0042) #define L_ACCE_KEY 0
(0043) #define L_DECE_KEY 4
(0044) #define L_RESUME_KEY 8
(0045) #define L_STOP_KEY 12
(0046) #define R_ACCE_KEY 3
(0047) #define R_DECE_KEY 7
(0048) #define R_RESUME_KEY 11
(0049) #define R_STOP_KEY 15
(0050) //
(0051) #define L_ACCE_KEY_PRESS 7
(0052) #define L_DECE_KEY_PRESS 6
(0053) #define L_RESUME_KEY_PRESS 5
(0054) #define L_STOP_KEY_PRESS 4
(0055) #define R_ACCE_KEY_PRESS 3
(0056) #define R_DECE_KEY_PRESS 2
(0057) #define R_RESUME_KEY_PRESS 1
(0058) #define R_STOP_KEY_PRESS 0
(0059) uchar key_prev_status;
(0060)
(0061) void delay_ms( uint time );
(0062) void rst_ctrl( void );
(0063) void pwm_ctrler( trap *pt_l, trap *pt_r );
(0064) void trap_ctrler( int l_des_speed, int r_des_speed );
(0065) void key_process( uint key_buf );
(0066)
(0067) /**************************** 公共底层函数 ********************************/
(0068) void delay_ms( uint time ) //毫秒级延时函数，占用系统时钟TIMER2
(0069) {
(0070) for( delay_counter = 0; delay_counter < time; ) WDR();
_delay_ms:
time --> R16
0045 2422 CLR R2
0046 2433 CLR R3
0047 9230008C STS _delay_counter+1,R3
0049 9220008B STS _delay_counter,R2
004B C001 RJMP 0x004D
004C 95A8 WDR
004D 9020008B LDS R2,_delay_counter
004F 9030008C LDS R3,_delay_counter+1
0051 1620 CP R2,R16
0052 0631 CPC R3,R17
0053 F3C0 BCS 0x004C
(0071) }
0054 9508 RET
(0072)
(0073) void rst_ctrl( void )
(0074) {
(0075) l_trap.des_speed = 0;
_rst_ctrl:
0055 2422 CLR R2
0056 2433 CLR R3
0057 9230009E STS _l_trap+1,R3
0059 9220009D STS _l_trap,R2
(0076) l_trap.real_speed = 0;
005B 923000A0 STS _l_trap+3,R3
005D 9220009F STS _l_trap+2,R2
(0077) l_trap.acce_count = 0;
005F 923000A2 STS 0xA2,R3
0061 922000A1 STS 0xA1,R2
(0078) l_trap.dece_count = 0;
0063 923000A4 STS 0xA4,R3
0065 922000A3 STS 0xA3,R2
(0079) l_trap.counter = 0;
0067 923000A6 STS 0xA6,R3
0069 922000A5 STS 0xA5,R2
(0080) l_trap.step = 4;
006B E084 LDI R24,4
006C E090 LDI R25,0
006D 939000A8 STS 0xA8,R25
006F 938000A7 STS 0xA7,R24
(0081) l_temp_speed = 0;
0071 92300090 STS _l_temp_speed+1,R3
0073 9220008F STS _l_temp_speed,R2
(0082) r_trap.des_speed = 0;
0075 92300092 STS _r_trap+1,R3
0077 92200091 STS _r_trap,R2
(0083) r_trap.real_speed = 0;
0079 92300094 STS _r_trap+3,R3
007B 92200093 STS _r_trap+2,R2
(0084) r_trap.acce_count = 0;
007D 92300096 STS 0x96,R3
007F 92200095 STS 0x95,R2
(0085) r_trap.dece_count = 0;
0081 92300098 STS 0x98,R3
0083 92200097 STS 0x97,R2
(0086) r_trap.counter = 0;
0085 9230009A STS 0x9A,R3
0087 92200099 STS 0x99,R2
(0087) r_trap.step = 4;
0089 9390009C STS 0x9C,R25
008B 9380009B STS 0x9B,R24
(0088) r_temp_speed = 0;
008D 9230008E STS _r_temp_speed+1,R3
008F 9220008D STS _r_temp_speed,R2
(0089) delay_counter = 0;
0091 9230008C STS _delay_counter+1,R3
0093 9220008B STS _delay_counter,R2
(0090) key_status = 0;
0095 92300062 STS _key_status+1,R3
0097 92200061 STS _key_status,R2
(0091) key_prev_status = 0;
0099 92200060 STS _key_prev_status,R2
(0092) }
009B 9508 RET
(0093)
(0094) void port_init(void)
(0095) {
(0096) PORTA = 0xFF;
_port_init:
009C EF8F LDI R24,0xFF
009D BB8B OUT 0x1B,R24
(0097) DDRA = 0x00;
009E 2422 CLR R2
009F BA2A OUT 0x1A,R2
(0098) PORTB = 0xFF;
00A0 BB88 OUT 0x18,R24
(0099) DDRB = 0x03;
00A1 E083 LDI R24,3
00A2 BB87 OUT 0x17,R24
(0100) PORTC = 0xFF; //m103 output only
00A3 EF8F LDI R24,0xFF
00A4 BB85 OUT 0x15,R24
(0101) DDRC = 0x00;
00A5 BA24 OUT 0x14,R2
(0102) PORTD = 0xFF;
00A6 BB82 OUT 0x12,R24
(0103) DDRD = 0x30;
00A7 E380 LDI R24,0x30
00A8 BB81 OUT 0x11,R24
(0104) }
00A9 9508 RET
(0105)
(0106) //TIMER1 initialisation - prescale:1
(0107) // WGM: 6) PWM 9bit fast, TOP=0x01FF
(0108) // desired value: 1Hz
(0109) // actual value: 15625.000Hz (100.0%)
(0110) void timer1_init(void)
(0111) {
(0112) TCCR1B = 0x00; //stop
_timer1_init:
00AA 2422 CLR R2
00AB BC2E OUT 0x2E,R2
(0113) TCNT1H = 0xFE; //setup
00AC EF8E LDI R24,0xFE
00AD BD8D OUT 0x2D,R24
(0114) TCNT1L = 0x01;
00AE E081 LDI R24,1
00AF BD8C OUT 0x2C,R24
(0115) OCR1AH = 0x00;
00B0 BC2B OUT 0x2B,R2
(0116) OCR1AL = 0x00;
00B1 BC2A OUT 0x2A,R2
(0117) OCR1BH = 0x00;
00B2 BC29 OUT 0x29,R2
(0118) OCR1BL = 0x00;
00B3 BC28 OUT 0x28,R2
(0119) TCCR1A = 0xF2;
00B4 EF82 LDI R24,0xF2
00B5 BD8F OUT 0x2F,R24
(0120) TCCR1B = 0x09; //start Timer
00B6 E089 LDI R24,0x9
00B7 BD8E OUT 0x2E,R24
(0121) }
00B8 9508 RET
(0122)
(0123) //TIMER2 initialisation - prescale:64
(0124) // WGM: Normal
(0125) // desired value: 1mSec
(0126) // actual value: 1.000mSec (0.0%)
(0127) void timer2_init(void)
(0128) {
(0129) TCCR2 = 0x00; //stop
_timer2_init:
00B9 2422 CLR R2
00BA BC25 OUT 0x25,R2
(0130) ASSR = 0x00; //set async mode
00BB BC22 OUT 0x22,R2
(0131) TCNT2 = 0x83; //setup
00BC E883 LDI R24,0x83
00BD BD84 OUT 0x24,R24
(0132) OCR2 = 0x7D;
00BE E78D LDI R24,0x7D
00BF BD83 OUT 0x23,R24
(0133) TCCR2 = 0x04; //start
00C0 E084 LDI R24,4
00C1 BD85 OUT 0x25,R24
(0134) }
00C2 9508 RET
(0135)
(0136) //UART0 initialisation
(0137) // desired baud rate: 9600
(0138) // actual: baud rate:9615 (0.2%)
(0139) // char size: 8 bit
(0140) // parity: Disabled
(0141) void uart0_init(void)
(0142) {
(0143) UCSRB = 0x00; //disable while setting baud rate
_uart0_init:
00C3 2422 CLR R2
00C4 B82A OUT 0x0A,R2
(0144) UCSRA = 0x00;
00C5 B82B OUT 0x0B,R2
(0145) UCSRC = 0x86;
00C6 E886 LDI R24,0x86
00C7 BD80 OUT 0x20,R24
(0146) UBRRL = 0x00; //set baud rate lo
00C8 B829 OUT 0x09,R2
(0147) UBRRH = 0x00; //set baud rate hi
00C9 BC20 OUT 0x20,R2
(0148) UCSRB = 0x98;
00CA E988 LDI R24,0x98
00CB B98A OUT 0x0A,R24
(0149) }
00CC 9508 RET
_timer2_ovf_isr:
00CD 940E0481 CALL push_lset
(0150)
(0151) #pragma interrupt_handler timer2_ovf_isr:5
(0152) void timer2_ovf_isr(void)
(0153) {
(0154) TCNT2 = 0x83; //reload counter value
00CF E883 LDI R24,0x83
00D0 BD84 OUT 0x24,R24
(0155) delay_counter ++; //用于毫秒级延时
00D1 9180008B LDS R24,_delay_counter
00D3 9190008C LDS R25,_delay_counter+1
00D5 9601 ADIW R24,1
00D6 9390008C STS _delay_counter+1,R25
00D8 9380008B STS _delay_counter,R24
(0156)
(0157) pwm_ctrler( &l_trap, &r_trap );
00DA E921 LDI R18,0x91
00DB E030 LDI R19,0
00DC E90D LDI R16,0x9D
00DD E010 LDI R17,0
00DE D0A7 RCALL _pwm_ctrler
(0158) }
00DF 940E0498 CALL pop_lset
00E1 9518 RETI
_uart0_rx_isr:
command --> R10
dataLen --> R20
i --> R22
00E2 940E0481 CALL push_lset
00E4 940E047D CALL push_gset3
(0159)
(0160) #pragma interrupt_handler uart0_rx_isr:12
(0161) void uart0_rx_isr(void)
(0162) {
(0163) uchar command,dataLen;
(0164) uchar i;
(0165) CLI();
00E6 94F8 BCLR 7
(0166) command = UDR;
00E7 B0AC IN R10,0x0C
(0167) if ( command== 0x01 ){
00E8 2D8A MOV R24,R10
00E9 3081 CPI R24,1
00EA F599 BNE 0x011E
(0168) while( !( UCSRA & BIT( RXC ) ) );
00EB 9B5F SBIS 0x0B,7
00EC CFFE RJMP 0x00EB
(0169) dataLen = UDR;
00ED B14C IN R20,0x0C
(0170) for( i = 0; i < dataLen; i ++ ){
00EE 2766 CLR R22
00EF C00B RJMP 0x00FB
(0171) while( !( UCSRA & BIT( RXC ) ) );
00F0 9B5F SBIS 0x0B,7
00F1 CFFE RJMP 0x00F0
(0172) rbuf[i] = UDR;
00F2 E683 LDI R24,0x63
00F3 E090 LDI R25,0
00F4 2FE6 MOV R30,R22
00F5 27FF CLR R31
00F6 0FE8 ADD R30,R24
00F7 1FF9 ADC R31,R25
00F8 B02C IN R2,0x0C
00F9 8220 STD Z+0,R2
00FA 9563 INC R22
00FB 1764 CP R22,R20
00FC F398 BCS 0x00F0
(0173) }
(0174) //------------接收数据实时处理区--------------
(0175) key_status = 0;
00FD 2422 CLR R2
00FE 2433 CLR R3
00FF 92300062 STS _key_status+1,R3
0101 92200061 STS _key_status,R2
(0176) key_status &= rbuf[0];
0103 90200063 LDS R2,_rbuf
0105 2433 CLR R3
0106 90400061 LDS R4,_key_status
0108 90500062 LDS R5,_key_status+1
010A 2042 AND R4,R2
010B 2053 AND R5,R3
010C 92500062 STS _key_status+1,R5
010E 92400061 STS _key_status,R4
(0177) key_status &= rbuf[1] << 8;
0110 90200064 LDS R2,_rbuf+1
0112 2433 CLR R3
0113 2C32 MOV R3,R2
0114 2422 CLR R2
0115 2042 AND R4,R2
0116 2053 AND R5,R3
0117 92500062 STS _key_status+1,R5
0119 92400061 STS _key_status,R4
(0178) key_process( key_status );
011B 0182 MOVW R16,R4
011C D28D RCALL _key_process
(0179) //--------------------------------------------
(0180) } else if ( command == 0x02 ){
011D C056 RJMP 0x0174
011E 2D8A MOV R24,R10
011F 3082 CPI R24,2
0120 F009 BEQ 0x0122
0121 C052 RJMP 0x0174
(0181) //----------发送实时处理区---------
(0182) if ( l_trap.real_speed < 0 ) tbuf[0] = 1;
0122 9180009F LDS R24,_l_trap+2
0124 919000A0 LDS R25,_l_trap+3
0126 3080 CPI R24,0
0127 E0E0 LDI R30,0
0128 079E CPC R25,R30
0129 F424 BGE 0x012E
012A E081 LDI R24,1
012B 93800077 STS _tbuf,R24
012D C003 RJMP 0x0131
(0183) else tbuf[0] = 0;
012E 2422 CLR R2
012F 92200077 STS _tbuf,R2
(0184) tbuf[1] = (uchar)( l_trap.real_speed & 0x00FF );
0131 9180009F LDS R24,_l_trap+2
0133 919000A0 LDS R25,_l_trap+3
0135 7090 ANDI R25,0
0136 93800078 STS _tbuf+1,R24
(0185) tbuf[2] = (uchar)( l_trap.real_speed >> 8 );
0138 9020009F LDS R2,_l_trap+2
013A 903000A0 LDS R3,_l_trap+3
013C 2C23 MOV R2,R3
013D 2433 CLR R3
013E FC27 SBRC R2,7
013F 9430 COM R3
0140 92200079 STS _tbuf+2,R2
(0186) if ( r_trap.real_speed < 0 ) tbuf[3] = 1;
0142 91800093 LDS R24,_r_trap+2
0144 91900094 LDS R25,_r_trap+3
0146 3080 CPI R24,0
0147 E0E0 LDI R30,0
0148 079E CPC R25,R30
0149 F424 BGE 0x014E
014A E081 LDI R24,1
014B 9380007A STS _tbuf+3,R24
014D C003 RJMP 0x0151
(0187) else tbuf[3] = 0;
014E 2422 CLR R2
014F 9220007A STS _tbuf+3,R2
(0188) tbuf[4] = (uchar)( r_trap.real_speed & 0x00FF );
0151 91800093 LDS R24,_r_trap+2
0153 91900094 LDS R25,_r_trap+3
0155 7090 ANDI R25,0
0156 9380007B STS 0x7B,R24
(0189) tbuf[5] = (uchar)( r_trap.real_speed >> 8 );
0158 90200093 LDS R2,_r_trap+2
015A 90300094 LDS R3,_r_trap+3
015C 2C23 MOV R2,R3
015D 2433 CLR R3
015E FC27 SBRC R2,7
015F 9430 COM R3
0160 9220007C STS 0x7C,R2
(0190) //---------------------------------
(0191) while( !( UCSRA & BIT( RXC ) ) );
0162 9B5F SBIS 0x0B,7
0163 CFFE RJMP 0x0162
(0192) dataLen = UDR;
0164 B14C IN R20,0x0C
(0193) for( i = 0; i < dataLen; i ++ ){
0165 2766 CLR R22
0166 C00B RJMP 0x0172
(0194) while( !( UCSRA & BIT( UDRE ) ) );
0167 9B5D SBIS 0x0B,5
0168 CFFE RJMP 0x0167
(0195) UDR = tbuf[i];
0169 E787 LDI R24,0x77
016A E090 LDI R25,0
016B 2FE6 MOV R30,R22
016C 27FF CLR R31
016D 0FE8 ADD R30,R24
016E 1FF9 ADC R31,R25
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