📄 boat.s
字号:
.module boat.c
.area text(rom, con, rel)
.dbfile G:\汽艇\source\key_board\boat.c
.dbfunc e delay_ms _delay_ms fV
; time -> R16,R17
.even
_delay_ms::
.dbline -1
.dbline 69
; // Last modify time: 2004-8-16 15:18:53
; // Target : M16
; // Crystal: 8.0000Mhz
;
; #include <iom16v.h>
; #include <macros.h>
;
; #define uchar unsigned char
; #define uint unsigned int
; /*调速模块预定义*/
; #define MAX_SPEED 510
; #define MIN_SPEED -510
; #define L_ACCE_COUNT 2
; #define L_DECE_COUNT 2
; #define L_STEP 1
; #define R_ACCE_COUNT 2
; #define R_DECE_COUNT 2
; #define R_STEP 1
; #define SPEED_INC 5
;
; #define SET_L_DIR ( PORTB |= BIT(PB0) ) //电机方向控制I/O定义
; #define RST_L_DIR ( PORTB &= ~BIT(PB0) )
; #define SET_R_DIR ( PORTB |= BIT(PB1) )
; #define RST_R_DIR ( PORTB &= ~BIT(PB1) )
;
; typedef struct _trap{ int des_speed;
; int real_speed;
; uint acce_count;
; uint dece_count;
; uint counter;
; int step; //必须用int型,因为速度控制接口函数trap_ctrler的代码结构
; }trap;
; trap l_trap, r_trap;
; uint l_temp_speed, r_temp_speed;
; uint delay_counter;
; /*串口通讯模块预定义*/
; #define SCOM_BUF_LEN 20
; uchar tbuf[SCOM_BUF_LEN];
; uchar rbuf[SCOM_BUF_LEN];
; uint key_status;
; /*键盘模块预定义*/
; #define L_ACCE_KEY 0
; #define L_DECE_KEY 4
; #define L_RESUME_KEY 8
; #define L_STOP_KEY 12
; #define R_ACCE_KEY 3
; #define R_DECE_KEY 7
; #define R_RESUME_KEY 11
; #define R_STOP_KEY 15
; //
; #define L_ACCE_KEY_PRESS 7
; #define L_DECE_KEY_PRESS 6
; #define L_RESUME_KEY_PRESS 5
; #define L_STOP_KEY_PRESS 4
; #define R_ACCE_KEY_PRESS 3
; #define R_DECE_KEY_PRESS 2
; #define R_RESUME_KEY_PRESS 1
; #define R_STOP_KEY_PRESS 0
; uchar key_prev_status;
;
; void delay_ms( uint time );
; void rst_ctrl( void );
; void pwm_ctrler( trap *pt_l, trap *pt_r );
; void trap_ctrler( int l_des_speed, int r_des_speed );
; void key_process( uint key_buf );
;
; /**************************** 公共底层函数 ********************************/
; void delay_ms( uint time ) //毫秒级延时函数,占用系统时钟TIMER2
; {
.dbline 70
clr R2
clr R3
sts _delay_counter+1,R3
sts _delay_counter,R2
xjmp L5
L2:
.dbline 70
wdr
L3:
.dbline 70
L5:
.dbline 70
; for( delay_counter = 0; delay_counter < time; ) WDR();
lds R2,_delay_counter
lds R3,_delay_counter+1
cp R2,R16
cpc R3,R17
brlo L2
.dbline -2
.dbline 71
; }
L1:
.dbline 0 ; func end
ret
.dbsym r time 16 i
.dbend
.dbfunc e rst_ctrl _rst_ctrl fV
.even
_rst_ctrl::
.dbline -1
.dbline 74
;
; void rst_ctrl( void )
; {
.dbline 75
; l_trap.des_speed = 0;
clr R2
clr R3
sts _l_trap+1,R3
sts _l_trap,R2
.dbline 76
; l_trap.real_speed = 0;
sts _l_trap+2+1,R3
sts _l_trap+2,R2
.dbline 77
; l_trap.acce_count = 0;
sts _l_trap+4+1,R3
sts _l_trap+4,R2
.dbline 78
; l_trap.dece_count = 0;
sts _l_trap+6+1,R3
sts _l_trap+6,R2
.dbline 79
; l_trap.counter = 0;
sts _l_trap+8+1,R3
sts _l_trap+8,R2
.dbline 80
; l_trap.step = 4;
ldi R24,4
ldi R25,0
sts _l_trap+10+1,R25
sts _l_trap+10,R24
.dbline 81
; l_temp_speed = 0;
sts _l_temp_speed+1,R3
sts _l_temp_speed,R2
.dbline 82
; r_trap.des_speed = 0;
sts _r_trap+1,R3
sts _r_trap,R2
.dbline 83
; r_trap.real_speed = 0;
sts _r_trap+2+1,R3
sts _r_trap+2,R2
.dbline 84
; r_trap.acce_count = 0;
sts _r_trap+4+1,R3
sts _r_trap+4,R2
.dbline 85
; r_trap.dece_count = 0;
sts _r_trap+6+1,R3
sts _r_trap+6,R2
.dbline 86
; r_trap.counter = 0;
sts _r_trap+8+1,R3
sts _r_trap+8,R2
.dbline 87
; r_trap.step = 4;
sts _r_trap+10+1,R25
sts _r_trap+10,R24
.dbline 88
; r_temp_speed = 0;
sts _r_temp_speed+1,R3
sts _r_temp_speed,R2
.dbline 89
; delay_counter = 0;
sts _delay_counter+1,R3
sts _delay_counter,R2
.dbline 90
; key_status = 0;
sts _key_status+1,R3
sts _key_status,R2
.dbline 91
; key_prev_status = 0;
sts _key_prev_status,R2
.dbline -2
.dbline 92
; }
L6:
.dbline 0 ; func end
ret
.dbend
.dbfunc e port_init _port_init fV
.even
_port_init::
.dbline -1
.dbline 95
;
; void port_init(void)
; {
.dbline 96
; PORTA = 0xFF;
ldi R24,255
out 0x1b,R24
.dbline 97
; DDRA = 0x00;
clr R2
out 0x1a,R2
.dbline 98
; PORTB = 0xFF;
out 0x18,R24
.dbline 99
; DDRB = 0x03;
ldi R24,3
out 0x17,R24
.dbline 100
; PORTC = 0xFF; //m103 output only
ldi R24,255
out 0x15,R24
.dbline 101
; DDRC = 0x00;
out 0x14,R2
.dbline 102
; PORTD = 0xFF;
out 0x12,R24
.dbline 103
; DDRD = 0x30;
ldi R24,48
out 0x11,R24
.dbline -2
.dbline 104
; }
L17:
.dbline 0 ; func end
ret
.dbend
.dbfunc e timer1_init _timer1_init fV
.even
_timer1_init::
.dbline -1
.dbline 111
;
; //TIMER1 initialisation - prescale:1
; // WGM: 6) PWM 9bit fast, TOP=0x01FF
; // desired value: 1Hz
; // actual value: 15625.000Hz (100.0%)
; void timer1_init(void)
; {
.dbline 112
; TCCR1B = 0x00; //stop
clr R2
out 0x2e,R2
.dbline 113
; TCNT1H = 0xFE; //setup
ldi R24,254
out 0x2d,R24
.dbline 114
; TCNT1L = 0x01;
ldi R24,1
out 0x2c,R24
.dbline 115
; OCR1AH = 0x00;
out 0x2b,R2
.dbline 116
; OCR1AL = 0x00;
out 0x2a,R2
.dbline 117
; OCR1BH = 0x00;
out 0x29,R2
.dbline 118
; OCR1BL = 0x00;
out 0x28,R2
.dbline 119
; TCCR1A = 0xF2;
ldi R24,242
out 0x2f,R24
.dbline 120
; TCCR1B = 0x09; //start Timer
ldi R24,9
out 0x2e,R24
.dbline -2
.dbline 121
; }
L18:
.dbline 0 ; func end
ret
.dbend
.dbfunc e timer2_init _timer2_init fV
.even
_timer2_init::
.dbline -1
.dbline 128
;
; //TIMER2 initialisation - prescale:64
; // WGM: Normal
; // desired value: 1mSec
; // actual value: 1.000mSec (0.0%)
; void timer2_init(void)
; {
.dbline 129
; TCCR2 = 0x00; //stop
clr R2
out 0x25,R2
.dbline 130
; ASSR = 0x00; //set async mode
out 0x22,R2
.dbline 131
; TCNT2 = 0x83; //setup
ldi R24,131
out 0x24,R24
.dbline 132
; OCR2 = 0x7D;
ldi R24,125
out 0x23,R24
.dbline 133
; TCCR2 = 0x04; //start
ldi R24,4
out 0x25,R24
.dbline -2
.dbline 134
; }
L19:
.dbline 0 ; func end
ret
.dbend
.dbfunc e uart0_init _uart0_init fV
.even
_uart0_init::
.dbline -1
.dbline 142
;
; //UART0 initialisation
; // desired baud rate: 9600
; // actual: baud rate:9615 (0.2%)
; // char size: 8 bit
; // parity: Disabled
; void uart0_init(void)
; {
.dbline 143
; UCSRB = 0x00; //disable while setting baud rate
clr R2
out 0xa,R2
.dbline 144
; UCSRA = 0x00;
out 0xb,R2
.dbline 145
; UCSRC = 0x86;
ldi R24,134
out 0x20,R24
.dbline 146
; UBRRL = 0x00; //set baud rate lo
out 0x9,R2
.dbline 147
; UBRRH = 0x00; //set baud rate hi
out 0x20,R2
.dbline 148
; UCSRB = 0x98;
ldi R24,152
out 0xa,R24
.dbline -2
.dbline 149
; }
L20:
.dbline 0 ; func end
ret
.dbend
.area vector(rom, abs)
.org 16
jmp _timer2_ovf_isr
.area text(rom, con, rel)
.dbfile G:\汽艇\source\key_board\boat.c
.dbfunc e timer2_ovf_isr _timer2_ovf_isr fV
.even
_timer2_ovf_isr::
xcall push_lset
.dbline -1
.dbline 153
;
; #pragma interrupt_handler timer2_ovf_isr:5
; void timer2_ovf_isr(void)
; {
.dbline 154
; TCNT2 = 0x83; //reload counter value
ldi R24,131
out 0x24,R24
.dbline 155
; delay_counter ++; //用于毫秒级延时
lds R24,_delay_counter
lds R25,_delay_counter+1
adiw R24,1
sts _delay_counter+1,R25
sts _delay_counter,R24
.dbline 157
;
; pwm_ctrler( &l_trap, &r_trap );
ldi R18,<_r_trap
ldi R19,>_r_trap
ldi R16,<_l_trap
ldi R17,>_l_trap
xcall _pwm_ctrler
.dbline -2
.dbline 158
; }
L21:
xcall pop_lset
.dbline 0 ; func end
reti
.dbend
.area vector(rom, abs)
.org 44
jmp _uart0_rx_isr
.area text(rom, con, rel)
.dbfile G:\汽艇\source\key_board\boat.c
.dbfunc e uart0_rx_isr _uart0_rx_isr fV
; command -> R10
; dataLen -> R20
; i -> R22
.even
_uart0_rx_isr::
xcall push_lset
xcall push_gset3
.dbline -1
.dbline 162
;
; #pragma interrupt_handler uart0_rx_isr:12
; void uart0_rx_isr(void)
; {
.dbline 165
; uchar command,dataLen;
; uchar i;
; CLI();
cli
.dbline 166
; command = UDR;
in R10,0xc
.dbline 167
; if ( command== 0x01 ){
mov R24,R10
cpi R24,1
brne L23
.dbline 167
L25:
.dbline 168
L26:
.dbline 168
; while( !( UCSRA & BIT( RXC ) ) );
sbis 0xb,7
rjmp L25
.dbline 169
; dataLen = UDR;
in R20,0xc
.dbline 170
clr R22
xjmp L31
X0:
.dbline 170
; for( i = 0; i < dataLen; i ++ ){
L32:
.dbline 171
L33:
.dbline 171
sbis 0xb,7
rjmp L32
.dbline 172
ldi R24,<_rbuf
ldi R25,>_rbuf
mov R30,R22
clr R31
add R30,R24
adc R31,R25
in R2,0xc
std z+0,R2
.dbline 173
L29:
.dbline 170
inc R22
L31:
.dbline 170
cp R22,R20
brlo L33
.dbline 175
; while( !( UCSRA & BIT( RXC ) ) );
; rbuf[i] = UDR;
; }
; //------------接收数据实时处理区--------------
; key_status = 0;
clr R2
clr R3
sts _key_status+1,R3
sts _key_status,R2
.dbline 176
; key_status &= rbuf[0];
lds R2,_rbuf
clr R3
lds R4,_key_status
lds R5,_key_status+1
and R4,R2
and R5,R3
sts _key_status+1,R5
sts _key_status,R4
.dbline 177
; key_status &= rbuf[1] << 8;
lds R2,_rbuf+1
clr R3
mov R3,R2
clr R2
and R4,R2
and R5,R3
sts _key_status+1,R5
sts _key_status,R4
.dbline 178
; key_process( key_status );
movw R16,R4
xcall _key_process
.dbline 180
xjmp L24
L23:
.dbline 180
; //--------------------------------------------
; } else if ( command == 0x02 ){
mov R24,R10
cpi R24,2
breq X2
xjmp L36
X2:
.dbline 180
.dbline 182
; //----------发送实时处理区---------
; if ( l_trap.real_speed < 0 ) tbuf[0] = 1;
lds R24,_l_trap+2
lds R25,_l_trap+2+1
cpi R24,0
ldi R30,0
cpc R25,R30
brge L38
.dbline 182
ldi R24,1
sts _tbuf,R24
xjmp L39
L38:
.dbline 183
; else tbuf[0] = 0;
clr R2
sts _tbuf,R2
L39:
.dbline 184
; tbuf[1] = (uchar)( l_trap.real_speed & 0x00FF );
lds R24,_l_trap+2
lds R25,_l_trap+2+1
andi R25,0
sts _tbuf+1,R24
.dbline 185
; tbuf[2] = (uchar)( l_trap.real_speed >> 8 );
lds R2,_l_trap+2
lds R3,_l_trap+2+1
mov R2,R3
clr R3
sbrc R2,7
com R3
sts _tbuf+2,R2
.dbline 186
; if ( r_trap.real_speed < 0 ) tbuf[3] = 1;
lds R24,_r_trap+2
lds R25,_r_trap+2+1
cpi R24,0
ldi R30,0
cpc R25,R30
brge L45
.dbline 186
ldi R24,1
sts _tbuf+3,R24
xjmp L46
L45:
.dbline 187
; else tbuf[3] = 0;
clr R2
sts _tbuf+3,R2
L46:
.dbline 188
; tbuf[4] = (uchar)( r_trap.real_speed & 0x00FF );
lds R24,_r_trap+2
lds R25,_r_trap+2+1
andi R25,0
sts _tbuf+4,R24
.dbline 189
; tbuf[5] = (uchar)( r_trap.real_speed >> 8 );
lds R2,_r_trap+2
lds R3,_r_trap+2+1
mov R2,R3
clr R3
sbrc R2,7
com R3
sts _tbuf+5,R2
L54:
.dbline 191
L55:
.dbline 191
; //---------------------------------
; while( !( UCSRA & BIT( RXC ) ) );
sbis 0xb,7
rjmp L54
.dbline 192
; dataLen = UDR;
in R20,0xc
.dbline 193
clr R22
xjmp L60
X1:
.dbline 193
; for( i = 0; i < dataLen; i ++ ){
L61:
.dbline 194
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