📄 cstartup.lst
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###############################################################################
# #
# IAR Systems ARM Assembler V4.42A/W32 28/Feb/2008 15:38:49 #
# Copyright 1999-2007 IAR Systems. All rights reserved. #
# #
# Source file = D:\Graduate_Designed\uCOS_study\INC\cstartup.s79 #
# List file = D:\Graduate_Designed\uCOS_study\Compil\BINARY\List\cstartup.lst#
# Object file = D:\Graduate_Designed\uCOS_study\Compil\BINARY\Obj\cstartup.r79#
# Command line = D:\Graduate_Designed\uCOS_study\INC\cstartup.s79 #
# -OD:\Graduate_Designed\uCOS_study\Compil\BINARY\Obj\ #
# -s+ -M<> -w+ -r #
# -LD:\Graduate_Designed\uCOS_study\Compil\BINARY\List\ #
# -t8 --cpu ARM7TDMI --fpu None #
# -IE:\ProgramFiles\IAR Systems\Embedded Workbench 4.0 Evaluation\arm\INC\ #
# -ID:\Graduate_Designed\uCOS_study\Compil\..\INC\ #
# -ID:\Graduate_Designed\uCOS_study\Compil\..\uCOS_II\Ports\ #
# #
###############################################################################
1 00000000 ;//---------------------------------------------
--------------------------------
2 00000000 ;// This file contains the startup code used by
the ICCARM C compiler.
3 00000000 ;//
4 00000000 ;// The modules in this file are included in the
libraries, and may be replaced
5 00000000 ;// by any user-defined modules that define the
PUBLIC symbol _program_start or
6 00000000 ;// a user defined start symbol.
7 00000000 ;// To override the cstartup defined in the
library, simply add your modified
8 00000000 ;// version to the workbench project.
9 00000000 ;//
10 00000000 ;// All code in the modules (except ?RESET) will
be placed in the ICODE segment.
11 00000000 ;//
12 00000000 ;// $Revision: 1.56 $
13 00000000 ;//
14 00000000 ;//---------------------------------------------
--------------------------------
15 00000000
16 00000000 ;//
17 00000000 ;// Naming covention of labels in this
file:
18 00000000 ;//
19 00000000 ;// ?xxx - External labels only
accessed from assembler.
20 00000000 ;// __xxx - External labels accessed from or
defined in C.
21 00000000 ;// xxx - Labels local to one module
(note: this file contains
22 00000000 ;// several modules).
23 00000000 ;// main - The starting point of the
user program.
24 00000000 ;//
25 00000000
26 00000000 ;//---------------------------------------------
------------------
27 00000000 ;// Macros and definitions for the whole
file
28 00000000 ;//---------------------------------------------
------------------
29 00000000
30 00000000 ;// Mode, correspords to bits 0-5 in CPSR
31 0000001F MODE_BITS DEFINE 0x1F ;// Bit
mask for mode bits in CPSR
32 00000010 USR_MODE DEFINE 0x10 ;// User
mode
33 00000011 FIQ_MODE DEFINE 0x11 ;// Fast
Interrupt Request mode
34 00000012 IRQ_MODE DEFINE 0x12 ;//
Interrupt Request mode
35 00000013 SVC_MODE DEFINE 0x13 ;//
Supervisor mode
36 00000017 ABT_MODE DEFINE 0x17 ;//
Abort mode
37 0000001B UND_MODE DEFINE 0x1B ;//
Undefined Instruction mode
38 0000001F SYS_MODE DEFINE 0x1F ;//
System mode
39 00000000
40 00000000
41 00000000 ;//---------------------------------------------
------------------
42 00000000 ;// ?RESET
43 00000000 ;// Reset Vector.
44 00000000 ;// Normally, segment INTVEC is linked at
address 0.
45 00000000 ;// For debugging purposes, INTVEC may be placed
at other
46 00000000 ;// addresses.
47 00000000 ;// A debugger that honors the entry point will
start the
48 00000000 ;// program in a normal way even if INTVEC is
not at address 0.
49 00000000 ;//---------------------------------------------
------------------
50 00000000
51 00000000 MODULE ?RESET
52 00000000 COMMON INTVEC:CODE:NOROOT(2)
53 00000000 PUBLIC __program_start
54 00000000 EXTERN ?cstartup
55 00000000 EXTERN undef_handler,
swi_handler, prefetch_handler
56 00000000 EXTERN data_handler, irq_handle
r, fiq_handler
57 00000000 EXTERN OS_CPU_IRQ_ISR,
OS_CPU_FIQ_ISR
58 00000000 CODE32 ;// Always ARM mode
after reset
59 00000000 org 0x00
60 00000000 __program_start
61 00000000 18F09FE5 ldr pc,[pc,#24] ;//
Absolute jump can
reach 4 GByte
62 00000004 ;// b ?cstartup ;//
Relative branch allows remap, limited to 32
MByte
63 00000004 ;// Vectors can be enabled by
removing the comments below or by
64 00000004 ;// using #pragma vector from C
code.
65 00000004 org 0x04
66 00000004 ;// ldr pc,[pc,#24] ;//
Branch to undef_handler
67 00000008 org 0x08
68 00000008 ;// ldr pc,[pc,#24] ;//
Branch to swi_handler
69 0000000C org 0x0c
70 0000000C ;// ldr pc,[pc,#24] ;//
Branch to prefetch_handler
71 00000010 org 0x10
72 00000010 ;// ldr pc,[pc,#24] ;//
Branch to data_handler
73 00000018 org 0x18
74 00000018 18F09FE5 ldr pc,[pc,#24] ;//
Branch to irq_handle
r
75 0000001C org 0x1c
76 0000001C 18F09FE5 ldr pc,[pc,#24] ;//
Branch to fiq_handle
r
77 00000020
78 00000020 ;// Constant table entries (for
ldr pc) will be placed at 0x20
79 00000020 ;// Exception vectors can be
specified in C code by #pragma vector or by
filling
80 00000020 ;// in the vectors below. The
vector address is the ARM vector number +
0x20.
81 00000020 org 0x20
82 00000020 ........ dc32 ?cstartup
83 00000024 org 0x24
84 00000024 ;// dc32 undef_handler
85 00000028 org 0x28
86 00000028 ;// dc32 swi_handler
87 0000002C org 0x2c
88 0000002C ;// dc32 prefetch_handler
89 00000030 org 0x30
90 00000030 ;// dc32 data_handler
91 00000038 org 0x38
92 00000038 ........ dc32 OS_CPU_IRQ_ISR
93 0000003C org 0x3c
94 0000003C ........ dc32 OS_CPU_FIQ_ISR
95 00000040 LTORG
96 00000040 ;// ENDMOD __program_start
97 00000040 ENDMOD
##############################
# CRC:43B7 #
# Errors: 0 #
# Warnings: 0 #
# Bytes: 24 #
##############################
###############################################################################
# #
# IAR Systems ARM Assembler V4.42A/W32 28/Feb/2008 15:38:49 #
# Copyright 1999-2007 IAR Systems. All rights reserved. #
# #
# Source file = D:\Graduate_Designed\uCOS_study\INC\cstartup.s79 #
# List file = D:\Graduate_Designed\uCOS_study\Compil\BINARY\List\cstartup.lst#
# Object file = D:\Graduate_Designed\uCOS_study\Compil\BINARY\Obj\cstartup.r79#
# Command line = D:\Graduate_Designed\uCOS_study\INC\cstartup.s79 #
# -OD:\Graduate_Designed\uCOS_study\Compil\BINARY\Obj\ #
# -s+ -M<> -w+ -r #
# -LD:\Graduate_Designed\uCOS_study\Compil\BINARY\List\ #
# -t8 --cpu ARM7TDMI --fpu None #
# -IE:\ProgramFiles\IAR Systems\Embedded Workbench 4.0 Evaluation\arm\INC\ #
# -ID:\Graduate_Designed\uCOS_study\Compil\..\INC\ #
# -ID:\Graduate_Designed\uCOS_study\Compil\..\uCOS_II\Ports\ #
# #
###############################################################################
98 00000000
99 00000000
100 00000000 ;//---------------------------------------------
------------------
101 00000000 ;// ?CSTARTUP
102 00000000 ;//---------------------------------------------
------------------
103 00000000 MODULE ?CSTARTUP
104 00000000
105 00000000 RSEG IRQ_STACK:DATA(2)
106 00000000 RSEG SVC_STACK:DATA:NOROOT(2)
107 00000000 RSEG CSTACK:DATA(2)
108 00000000 RSEG ICODE:CODE:NOROOT(2)
109 00000000 PUBLIC ?cstartup
110 00000000 EXTERN ?main
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