bef.nsx

《精通 Protel DXP 2004 电路设计》

BEF
*SPICE Netlist generated by Advanced Sim server on 2006-7-15 14:15:40

*Schematic Netlist:
C1 NetC1_1 OUT 0.1uF
C2 NetC2_1 NetC2_2 0.1uF
R1 NetC1_1 IN 1K
R2 NetR2_1 OUT 33K
R3 NetR3_1 NetR2_1 30K
R4 NetC1_1 NetC2_1 30K
R5 0 OUT 30K
R6 NetC2_2 NetR3_1 30K
XU1A NetC2_1 NetR3_1 VCC VEE NetR2_1 LF353
XU1B OUT NetR3_1 VCC VEE NetC2_2 LF353
V1 VCC 0 15V
V2 VEE 0 -15V
VIN IN 0 DC 0 SIN(0 1 50 0 0 0) AC 1 0

.SAVE OUT

*PLOT AC -1 1 A=OUT
*PLOT OP -1 1 A=OUT

.OPTION KeepLastSetup=False
*Selected Circuit Analyses:
.AC DEC 100 1 1000
.OP
.CONTROL
SWEEP R2[resistance] 3E4 3.9E4 3000
.ENDC

*Models and Subcircuit:
.SUBCKT LF353   1   2   3   4   5
C1   11 12 3.498E-12
C2    6  7 15E-12
DC    5 53 DX
DE   54  5 DX
DLP  90 91 DX
DLN  92 90 DX
DP    4  3 DX
BGND 99  0 V=V(3)*.5 + V(4)*.5
BB    7 99 I=I(VB)*28.29E6 - I(VC)*30E6 + I(VE)*30E6 + I(VLP)*30E6 - I(VLN)*30E6
GA    6  0 11 12 282.8E-6
GCM   0  6 10 99 1.59E-9
ISS   3 10 DC 195E-6
HLIM 90  0 VLIM 1K
J1   11  2 10 JX
J2   12  1 10 JX
R2    6  9 100E3
RD1   4 11 3.536E3
RD2   4 12 3.536E3
RO1   8  5 50
RO2   7 99 11.62
RP    3  4 15E3
RSS  10 99 1.026E6
VB    9  0 DC 0
VC    3 53 DC 2.2
VE   54  4 DC 2.2
VLIM  7  8 DC 0
VLP  91  0 DC 30
VLN   0 92 DC 30
.MODEL DX D(IS=800E-18)
.MODEL JX PJF(IS=12.5E-12 BETA=250.1E-6 VTO=-1)
.ENDS LF353

.END