📄 hwsetup.c
字号:
#include "config.h"
#include "global.h"
#include "macro.h"
#include "regmap.h"
#include "dma.h"
#include "cddsp.h"
#include "vpp.h"
#include "memmap.h"
#include "func.h"
#include "framebuf.h"
#include "hwsetup.h"
#include "servo.h"
#include "set.h"
#include "gpio.h"
void preset_framebuffer(int config)
{
SkipFrameCount = 0;
// if (framebuffer_configuration == config)
// return;
if (config != MEM_CONFIG_DIGEST && config != MEM_CONFIG_HIRES) {
SkipFrameCount = 2;
}
else {
SkipFrameCount = 0;
}
if (((framebuffer_configuration == MEM_CONFIG_HIRES) && (config != MEM_CONFIG_HIRES)) ||
(config == MEM_CONFIG_LORES && show_logo == 1) ||
(config == MEM_CONFIG_DIGEST) || (config == MEM_CONFIG_GRAPH)) {
if (show_logo == 1) {
SkipFrameCount = 0;
SkipFirstFrame = 0;
}
disable_video();
regs0->dis_pic_id = 0;
if (tv_wait_sync)
WAIT_VSYNC;
config_framebuffer(config);
// BgBlackEnable = ON;
if (tv_wait_sync)
WAIT_VSYNC;
}
}
void config_framebuffer(int config)
{
framebuffer_configuration = config;
regs0->video_compress = VIDEO_COMPRESS;
#if CONFIG==CONFIG_COMBO_SVCD
switch (config) {
case MEM_CONFIG_CDDA:
case MEM_CONFIG_LORESN:
case MEM_CONFIG_LORES:
#ifdef SUPPORT_CD_MOVE
#if (SUPPORT_8Mx1_SDRAM || SUPPORT_8Mx2_SDRAM)
regs0->agdc_config = 0x4001;
#else
regs0->agdc_config = 0x4041;
#endif
#else
#if (SUPPORT_8Mx1_SDRAM || SUPPORT_8Mx2_SDRAM)
regs0->agdc_config = 0x0001;
#else
regs0->agdc_config = 0x0041;
#endif
#endif
regs0->linesize = RF_LINESIZE_352;
regs0->ref0_luma = MEM_VCD_REF0_LUMA_DEF;
regs0->ref1_luma = MEM_VCD_REF1_LUMA_DEF;
regs0->ref0_chroma = MEM_VCD_REF0_CHROMA_DEF;
regs0->ref1_chroma = MEM_VCD_REF1_CHROMA_DEF;
regs0->bidir_luma = MEM_VCD_BIDIR_LUMA_DEF;
regs0->bidir_chroma = MEM_VCD_BIDIR_CHROMA_DEF;
regs0->evbya = MEM_VCD_EVBYA_DEF;
regs0->eabya = MEM_VCD_EABYA_DEF;
#ifdef SUPPORT_CD_MOVE
regs0->cdya = MEM_CDMOVE_VCD_CDYA_DEF;
#else
regs0->cdya = MEM_VCD_CDYA_DEF;
#endif
regs0->osdya = MEM_VCD_OSDYA_DEF;
regs0->supya = MEM_VCD_SUPYA_DEF;
regs0->iopya = MEM_VCD_IOPYA_DEF;
regs0->audya = MEM_VCD_AUDYA_DEF;
if (osd_reload == 1) {
osd_init();
osd_reload = 0;
}
break;
case MEM_CONFIG_HIRES:
#ifdef SUPPORT_CD_MOVE
#if (SUPPORT_8Mx1_SDRAM || SUPPORT_8Mx2_SDRAM)
regs0->agdc_config = 0x4000;
#else
regs0->agdc_config = 0x4040;
#endif
#else
#if (SUPPORT_8Mx1_SDRAM || SUPPORT_8Mx2_SDRAM)
regs0->agdc_config = 0;
#else
regs0->agdc_config = 0x0040;
#endif
#endif
regs0->linesize = RF_LINESIZE_704;
regs0->ref0_luma = HIRES_REF0_LUMA;
regs0->ref0_chroma = HIRES_REF0_CHROMA;
regs0->ref1_luma = HIRES_REF1_LUMA;
regs0->ref1_chroma = HIRES_REF1_CHROMA;
regs0->bidir_luma = HIRES_REF1_LUMA;
regs0->bidir_chroma = HIRES_REF1_CHROMA;
#ifdef SUPPORT_ESP
// kevinlu 2002/10/4 04:42PM because used vcd cddsp buffer
if (cd_type_loaded == CDDA || cd_type_loaded == CDSVCD) {
#else
if (0 || cd_type_loaded == CDSVCD) {
#endif
regs0->evbya = MEM_EVBYA_DEF; // 708 old not exist
regs0->eabya = MEM_EABYA_DEF; // 708 old not exist
#ifdef SUPPORT_CD_MOVE
#ifdef SUPPORT_ESP
// kevinlu 2002/10/4 04:26PM for discman play SVCD
if (cd_type_loaded == CDDA)
regs0->cdya = MEM_CDMOVE_CDYA_DEF;
else
regs0->cdya = MEM_CDMOVE_VCD_CDYA_DEF;
#else
regs0->cdya = MEM_CDMOVE_CDYA_DEF;
#endif
#else
regs0->cdya = MEM_CDYA_DEF; // 708 old not exist
#endif
regs0->osdya = MEM_OSDYA_DEF; // 708 old not exist
regs0->iopya = MEM_IOPYA_DEF; // 708 old not exist
regs0->audya = MEM_AUDYA_DEF; // 708 old not exist
}
else {
regs0->evbya = MEM_VCD_EVBYA_DEF; // 708 old not exist
regs0->eabya = MEM_VCD_EABYA_DEF; // 708 old not exist
#ifdef SUPPORT_CD_MOVE
regs0->cdya = MEM_CDMOVE_VCD_CDYA_DEF;
#else
regs0->cdya = MEM_VCD_CDYA_DEF; // 708 old not exist
#endif
regs0->osdya = MEM_VCD_OSDYA_DEF; // 708 old not exist
regs0->iopya = MEM_VCD_IOPYA_DEF; // 708 old not exist
regs0->audya = MEM_VCD_AUDYA_DEF; // 708 old not exist
}
if (osd_reload == 1) {
// osd_init();
osd_reload = 0;
}
break;
case MEM_CONFIG_DIGEST:
if ((cd_type_loaded == CDVCD20) || (cd_type_loaded == CDVCD11) ||
(cd_type_loaded == CDVCD10)) {
#ifdef SUPPORT_CD_MOVE
#if (SUPPORT_8Mx1_SDRAM || SUPPORT_8Mx2_SDRAM)
regs0->agdc_config = 0x4001;
#else
regs0->agdc_config = 0x4041;
#endif
#else
#if (SUPPORT_8Mx1_SDRAM || SUPPORT_8Mx2_SDRAM)
regs0->agdc_config = 0x0001;
#else
regs0->agdc_config = 0x0041;
#endif
#endif
regs0->linesize = RF_LINESIZE_352;
regs0->ref0_luma = MEM_VCD_REF0_LUMA_DEF;
regs0->ref1_luma = MEM_VCD_REF1_LUMA_DEF;
regs0->ref0_chroma = MEM_VCD_REF0_CHROMA_DEF;
regs0->ref1_chroma = MEM_VCD_REF1_CHROMA_DEF;
regs0->bidir_luma = MEM_VCD_BIDIR_LUMA_DEF;
regs0->bidir_chroma = MEM_VCD_BIDIR_CHROMA_DEF;
}
else {
#ifdef SUPPORT_CD_MOVE
#if (SUPPORT_8Mx1_SDRAM || SUPPORT_8Mx2_SDRAM)
regs0->agdc_config = 0x4000;
#else
regs0->agdc_config = 0x4040;
#endif
#else
#if (SUPPORT_8Mx1_SDRAM || SUPPORT_8Mx2_SDRAM)
regs0->agdc_config = 0;
#else
regs0->agdc_config = 0x0040;
#endif
#endif
regs0->linesize = RF_LINESIZE_480;
regs0->ref0_luma = MEM_REF0_LUMA_DEF;
regs0->ref1_luma = MEM_REF1_LUMA_DEF;
regs0->ref0_chroma = MEM_REF0_CHROMA_DEF;
regs0->ref1_chroma = MEM_REF1_CHROMA_DEF;
regs0->bidir_luma = MEM_BIDIR_LUMA_DEF;
regs0->bidir_chroma = MEM_BIDIR_CHROMA_DEF;
}
break;
case MEM_CONFIG_MP3:
#ifdef SUPPORT_CD_MOVE
#if (SUPPORT_8Mx1_SDRAM || SUPPORT_8Mx2_SDRAM)
regs0->agdc_config = 0x4000;
#else
regs0->agdc_config = 0x4040;
#endif
#else
#if (SUPPORT_8Mx1_SDRAM || SUPPORT_8Mx2_SDRAM)
regs0->agdc_config = 0;
#else
regs0->agdc_config = 0x0040;
#endif
#endif
regs0->ref0_luma = MP3_REF0_LUMA_DEF;
regs0->ref1_luma = MP3_REF1_LUMA_DEF;
regs0->ref0_chroma = MP3_REF0_CHROMA_DEF;
regs0->ref1_chroma = MP3_REF1_CHROMA_DEF;
regs0->bidir_luma = MP3_BIDIR_LUMA_DEF;
regs0->bidir_chroma = MP3_BIDIR_CHROMA_DEF;
regs0->evbya = MP3_EVBYA_DEF;
regs0->eabya = MP3_EABYA_DEF;
#ifdef SUPPORT_CD_MOVE
regs0->cdya = MP3_CDMOVE_CDYA_DEF;
#else
regs0->cdya = MP3_CDYA_DEF;
#endif
regs0->osdya = MP3_OSDYA_DEF;
regs0->iopya = MP3_IOPYA_DEF;
regs0->audya = MP3_AUDYA_DEF;
if (osd_reload == 1) {
osd_init();
osd_reload = 0;
}
break;
}
#endif
}
void config_memory(int config)
{
#if CONFIG==CONFIG_COMBO_SVCD
#ifdef SUPPORT_CD_MOVE
#if (SUPPORT_8Mx1_SDRAM || SUPPORT_8Mx2_SDRAM)
regs0->agdc_config = 0x4000;
#else
regs0->agdc_config = 0x4040;
#endif
#else
#if (SUPPORT_8Mx1_SDRAM || SUPPORT_8Mx2_SDRAM)
regs0->agdc_config = 0;
#else
regs0->agdc_config = 0x0040;
#endif
#endif
#endif
config_framebuffer(config);
SetDisplaySize(720, 576);
SetDisplayPicture(0);
SetDisplayStart(0, 0);
}
void audio_setclk_cdda(void)
{
#if 0
regs0->audio_clkgen = RF_SYSCLK_54MHz | RF_LOWV_ENABLE | RF_LOWV_DURATION(7) | 19;
#endif
}
void InitGPIO(void)
{
#if (SUPPORT_8Mx1_SDRAM || SUPPORT_8Mx2_SDRAM)
regs0->gpio_sel &= 0x00ff;
#else // Current Setting
regs0->gpio_sel &= 0x00ff;
#endif
#if ROM_SIZE == 80
regs0->gpio_sel |= 0xd800; // Support 080
#else
regs0->gpio_sel |= 0xd900; // Support 040
#endif
}
#ifdef SUPPORT_COMBO
void ServoInitGPIO(void)
{
#ifdef SUPPORT_LINEAR_PLAYBACK
#ifdef SONY_SERVO
// Output mode
GPIO_G_SET(0, 1, (1 << SERVO_MCLK));
// Output mode
#ifdef SUPPORT_GPIO_BUS_FUNCTION
GPIO_G_SET(1, 1, ((1 << SERVO_DDAT) | (1 << SERVO_XLAT)) >> 16);
#else
GPIO_G_SET(1, 1, ((1 << SERVO_RESET) | (1 << SERVO_DDAT) | (1 << SERVO_XLAT)) >> 16);
#endif
#ifdef SUPPORT_BOARD_TYPE_OLD
// Output mode
GPIO_G_SET(2, 1, 1 << (AUDIO_CONTROL - 32));
GPIO_G_SET(2, 1, 1 << (VIDEO_CONTROL - 32));
#endif
#if 0
GPIO_G_SET(3, 1, (1 << (49 - 48)) | (1 << (50 - 48)) |
(1 << (51 - 48)) | (1 << (52 - 48)));
#endif
ServoInitPlay();
#endif
#elif 0
GPIO_G_SET(2, 1, 1 << (AUDIO_CONTROL - 32));
GPIO_G_SET(2, 1, 1 << (VIDEO_CONTROL - 32));
VIDEO_CONTROL_LOW;
AUDIO_CONTROL_HIGH; // extern audio play
#endif
}
#endif
#ifdef SUPPORT_GPS_FUNCTION
#ifdef SUPPORT_GPIO_BUS_FUNCTION
#define GPS_RESET (1 << 6)
#define GPS_RESET_LOW (Bus2SetBit(GPS_RESET, 0))
#define GPS_RESET_HIGH (Bus2SetBit(GPS_RESET, 1))
#else
#define GPS_RESET 48
#define GPS_RESET_LOW (GPIO_O_SET(GPS_RESET, 0))
#define GPS_RESET_HIGH (GPIO_O_SET(GPS_RESET, 1))
#endif
void GPSInitGPIO()
{
#ifndef SUPPORT_GPIO_BUS_FUNCTION
// Output mode
GPIO_G_SET(3, 1, (1 << (GPS_RESET - 48)));
GPS_RESET_HIGH;
#endif
}
void GPSReset()
{
#ifdef GPS_MODULE_uBLOX
GPS_RESET_HIGH;
MicroDelay(1000);
GPS_RESET_LOW;
#else
GPS_RESET_LOW;
MicroDelay(1000);
GPS_RESET_HIGH;
#endif
}
#endif
#ifdef SUPPORT_WATCH_DOG
#ifdef SUPPORT_GPIO_BUS_FUNCTION
#define WATCH_DOG (1 << 2)
#define WATCH_DOG_LOW (Bus1SetBit(WATCH_DOG, 0))
#define WATCH_DOG_HIGH (Bus1SetBit(WATCH_DOG, 1))
#else
#define WATCH_DOG 13
#define WATCH_DOG_LOW (GPIO_O_SET(WATCH_DOG, 0))
#define WATCH_DOG_HIGH (GPIO_O_SET(WATCH_DOG, 1))
#endif
void WatchDogInitGPIO()
{
#ifndef SUPPORT_GPIO_BUS_FUNCTION
// Output mode
GPIO_G_SET(3, 1, (1 << (WATCH_DOG - 48)));
#endif
}
void PollingWatchDog()
{
WatchDogState = (WatchDogState == 0);
if (WatchDogState) {
WATCH_DOG_HIGH;
}
else {
WATCH_DOG_LOW;
}
}
#endif
/************************************************************************
for rom code down size
GPIO_MASTER_SET
m:0 GPIO set for IOP
m:1 GPIO set for RISC
GPIO_GROUP_SET
i:0 GPIO_00 ~ GPIO_15
i:1 GPIO_16 ~ GPIO_31
i:2 GPIO_32 ~ GPIO_47
i:3 GPIO_48 ~ GPIO_63
d:0 GPIO set to input
d:1 GPIO set to output
a: GPIO MSB(bit 15) ~ LSB(bit 0) xxxx xxxx xxxx xxxx
if set gpio 34 outout ,then i=2 ,d=1 ,a |= 1<<3
*************************************************************************/
void GPIO_G_SET(BYTE i, BYTE d, UINT16 a)
{
regs0->gpio_master[i] |= a;
if (d) {
regs0->gpio_oe[i] |= a;
regs0->gpio_out[i] &= ~a;
}
else
regs0->gpio_oe[i] &= ~a;
}
#if 1 // def AUDIO_XCLK_OUT
#define FS_44K ((0<<0)|(0<<2)|(0<<10)|(4<<6)|(1<<12)|(2<<13))
#define FS_48K ((1<<0)|(0<<2)|(0<<10)|(4<<6)|(1<<12)|(2<<13))
#define FS_32K ((1<<0)|(1<<2)|(0<<10)|(4<<6)|(1<<12)|(2<<13))
#define FS_22K ((0<<0)|(2<<2)|(0<<10)|(4<<6)|(1<<12)|(2<<13))
#define FS_24K ((1<<0)|(2<<2)|(0<<10)|(4<<6)|(1<<12)|(2<<13))
#define FS_16K ((1<<0)|(4<<2)|(0<<10)|(4<<6)|(1<<12)|(2<<13))
#define FS_11K FS_22K
#define FS_12K FS_24K
#define FS_08K FS_16K
const unsigned short fs_code[9] = {
FS_44K, FS_48K, FS_32K,
FS_22K, FS_24K, FS_16K,
FS_11K, FS_12K, FS_08K
};
#endif
void select_Fs(int f)
{
#ifdef AUDIO_XCLK_OUT
unsigned int fs_id = fs_code[f];
regs0->audio_clkgen = fs_id;
#else
unsigned int fs_id = fs_code[0];
regs0->audio_clkgen = fs_id;
regs0->audio_clkgen |= (1 << 5);
#endif
}
void select_iop_Fs(UINT16 freq) // if 81MHZ freq = 8100
{ // if 67.5MHZ freq = 6750
regs0->iop_data[0] = freq; // if 54MHZ freq = 5400
regs0->iop_data[5] &= (~(1 << 13)); // if 27MHZ freq = 2700
}
#ifdef SUPPORT_GPIO_BUS_FUNCTION
#define BUS1_LATCH 26
#define BUS1_LATCH_LOW (GPIO_O_SET(BUS1_LATCH, 0))
#define BUS1_LATCH_HIGH (GPIO_O_SET(BUS1_LATCH, 1))
void BusInitGPIO()
{
// Output mode
GPIO_G_SET(1, 1, (1 << (BUS1_LATCH - 16)));
regs0->gpio_master[2] |= 0xFF00;
regs0->gpio_oe[2] |= 0xFF00; // Set to output mode
regs0->gpio_out[2] &= ~0xFF00;
BUS1_LATCH_LOW;
}
void BusSetInput()
{
regs0->gpio_oe[2] &= ~0xFF00;
}
void BusSetOutput()
{
regs0->gpio_oe[2] |= 0xFF00;
regs0->gpio_out[2] &= ~0xFF00;
}
void BusSetData(BYTE Data)
{
UINT16 Result;
Result = regs0->gpio_out[2];
Result &= ~0xFF00;
Result |= (UINT16)(Data << 8);
regs0->gpio_out[2] = Result;
}
BYTE BusGetData()
{
UINT16 Result;
Result = regs0->gpio_in[2];
return (Result >> 8);
}
void Bus1SetBit(BYTE Bit, BYTE Val)
{
#ifdef SUPPORT_LINEAR_PLAYBACK
if (CheckSystemState(SYSTEM_LINEAR))
BusInitGPIO();
#endif
if (Val) BusLatch1 |= Bit;
else BusLatch1 &= ~Bit;
BusSetData(BusLatch1);
BUS1_LATCH_HIGH;
BUS1_LATCH_LOW;
}
/*
void Bus2SetBit(BYTE Bit, BYTE Val)
{
#ifdef SUPPORT_LINEAR_PLAYBACK
if (CheckSystemState(SYSTEM_LINEAR))
BusInitGPIO();
#endif
if (Val) BusLatch2 |= Bit;
else BusLatch2 &= ~Bit;
BusSetData(BusLatch2);
BUS2_LATCH_HIGH;
BUS2_LATCH_LOW;
}
*/
#define TV_PN (1 << 0) // 1 = PAL, 0 = NTSC
#define TV_RESET (1 << 1) // 0 = Reset
#define TV_PN_LOW (Bus1SetBit(TV_PN, 0))
#define TV_PN_HIGH (Bus1SetBit(TV_PN, 1))
#define TV_RESET_LOW (Bus1SetBit(TV_RESET, 0))
#define TV_RESET_HIGH (Bus1SetBit(TV_RESET, 1))
void TVReset()
{
TV_RESET_HIGH;
MicroDelay(200);
TV_RESET_LOW;
}
void TVSystem()
{
if (mode_display == MODE_PAL) {
TV_PN_HIGH;
}
else {
TV_PN_LOW;
}
}
#endif
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -