df9311zk.h

详细介绍了arm7-at91r40008,的开发全过程

/*----------------------------------------------------------------------------
* File Name           : df9311zk.h
* Object              : DF9311zk Board Features Definition File.
*
* 1.0 23/Apr/00  PFi  : Creation
* 1.1 11/Jan/02  PFi  : Internal/External SRAM Definition Clean-up
*----------------------------------------------------------------------------
*/
#ifndef df9311zk_h
#define df9311zk_h

#include "../../../parts/r40008/reg_r40008.h"
#include "../../../parts/r40008/lib_r40008.h"
#include "../../../drivers/lib_i2c/lib_i2c.h"
/*---------------------------------------*/
/* AT91EB40A External Memories Definition */
/*---------------------------------------*/

/* Flash Memory : AT49BV1614 1M*16 */
#define FLASH_BASE      (0x01000000)
#define FLASH_SIZE      (2*1024*1024)                /* byte */

/* Extern NVRAM Memory : HY62WT081 32K*8 */
#define NVRAM_BASE   	(0x02000000)
//#define NVRAM_SIZE   	(32*1024)
//#define NVRAM_LIMIT  	(NVRAM_BASE + NVRAM_SIZE)

/***************
*  WARNING !!!*
***************
*- WARNING !! No External SRAM memories are fitted on the board.
*- This definition is only if the user adds external SRAM devices.

* The following definition are put in comments
*/
#define RAM_BASE     (0x00000000)    /* Address of the Internal SRAM after the remap command */
#define RAM_SIZE     (256*1024)

/***************
* WARNING !!! *  The RAM_LIMIT definition does not correspond to ( RAM_BASE + RAM_SIZE )
***************

* This is for compatipility with the cstartup_xxx.ads (flash, ice or angel).
*/
#define RAM_LIMIT     (RAM_BASE + (8*1024))       /* Size of the Application stack is 8K. */
/*
* Redefinition of External SRAM to Internal SRAM
*/

#define EXT_SRAM_BASE       RAM_LIMIT                   /* 8K (8*1024) */
#define EXT_SRAM_SIZE       (RAM_SIZE-RAM_LIMIT)        /* 256K (256*1024) - 8K (8*1024) */
#define EXT_SRAM_LIMIT      (RAM_BASE + RAM_SIZE)       /* = SRAM_LIMIT = 0x40000 */

/* DF9311ZK1 Com Port Aux Input */
#define Com_AuxIn_BASE	(0x03000000)
#define Com_AuxIn      	(volatile unsigned char *)(Com_AuxIn_BASE)		/* 串行口辅助输入，D0-D3:COM1，D4-D7:COM2 */

/* DF9311ZK1 I/O Port */
#define ZK1_IO_BASE   (0x04000000)
#define ZK1_YKFX      (volatile unsigned short *)(ZK1_IO_BASE + 0x100)		/* 遥控返校，D0-D6和D8-D11有效，与遥控输出一一对应 */
#define ZK1_AD8364    (volatile unsigned short *)(ZK1_IO_BASE + 0x300)     	/* AD8364片选 */
#define ZK1_ADRST     (volatile unsigned short *)(ZK1_IO_BASE + 0x400)		/* 复位AD8364 */
#define ZK1_YX        (volatile unsigned short *)(ZK1_IO_BASE + 0x500)		/* 遥信，低8位有效 */
#define ZK1_YKS       (volatile unsigned short *)(ZK1_IO_BASE + 0x6b0)		/* 遥控密码锁，D8-D11有效 */
#define ZK1_YKHF      (volatile unsigned short *)(ZK1_IO_BASE + 0x6e0)		/* 遥控合/分，D0-D6有效 */

/* DF9311ZK2 I/O Port */
#define ZK2_IO_BASE   (0x05000000)
#define ZK2_YKFX      (volatile unsigned short *)(ZK2_IO_BASE + 0x100)		/* 遥控返校，D0-D6和D8-D11有效，与遥控输出一一对应 */
#define ZK2_AD8364    (volatile unsigned short *)(ZK2_IO_BASE + 0x300)     	/* AD8364片选 */
#define ZK2_ADRST     (volatile unsigned short *)(ZK2_IO_BASE + 0x400)		/* 复位AD8364 */
#define ZK2_YX        (volatile unsigned short *)(ZK2_IO_BASE + 0x500)		/* 遥信，低8位有效 */
#define ZK2_YKS       (volatile unsigned short *)(ZK2_IO_BASE + 0x6b0)		/* 遥控密码锁，D8-D11有效 */
#define ZK2_YKHF      (volatile unsigned short *)(ZK2_IO_BASE + 0x6e0)		/* 遥控合/分，D0-D6有效 */

/* -------------------------------------------------------------------------------------------------------------------
 *      Internal Memory Mapping    |            Internal Memory Mapping      |         Internal Memory Mapping
 *        with ICE Debugger        |              with Angel Monitor         |           with ROMed Application
 * -------------------------------------------------------------------------------------------------------------------
*/
#define EBI_CSR_0       (unsigned int)(FLASH_BASE | EBI_DBW_16 | EBI_NWS_4 | EBI_WSE | EBI_PAGES_4M | EBI_TDF_1 | EBI_CSEN )     
                        /* 0x01000000, 16 bits, 4 WS, 4MB, 2 tdf = 0x010024ad */
#define EBI_CSR_1       ((unsigned int)0x10000000)               /* unused */
#define EBI_CSR_2       ((unsigned int)0x20000000)               /* unused */
#define EBI_CSR_3       ((unsigned int)0x30000000)               /* unused */
#define EBI_CSR_4       ((unsigned int)0x40000000)               /* unused */
#define EBI_CSR_5       ((unsigned int)0x50000000)               /* unused */
#define EBI_CSR_6       ((unsigned int)0x60000000)               /* unused */
#define EBI_CSR_7       ((unsigned int)0x70000000)               /* unused */

//dingding1013(2tdf-->1tdf; 16MB-->4MB)
#define EBI_CSR_0_New   (unsigned int)(FLASH_BASE | EBI_DBW_16 | EBI_NWS_4 | EBI_WSE | EBI_PAGES_4M | EBI_TDF_1 | EBI_CSEN )     
                        /* 0x01000000, 16 bits, 4 WS, 4MB, 2 tdf = 0x010024ad */
#define EBI_CSR_1_New   (unsigned int)(NVRAM_BASE | EBI_DBW_8 | EBI_NWS_4 | EBI_WSE | EBI_PAGES_1M | EBI_TDF_1 | EBI_CSEN )
                        /* 0x02000000,  8 bits, 4 WS, 1MB, 2 tdf = 0x0200242e */
#define EBI_CSR_2_New   (unsigned int)(Com_AuxIn_BASE | EBI_DBW_8 | EBI_NWS_4 | EBI_WSE | EBI_PAGES_1M | EBI_TDF_1 | EBI_CSEN )
                        /* 0x03000000,  8 bits, 4 WS, 1MB, 2 tdf = 0x0300242e */
#define EBI_CSR_4_New   (unsigned int)(ZK1_IO_BASE | EBI_DBW_16 | EBI_NWS_5 | EBI_WSE | EBI_PAGES_1M | EBI_TDF_2 | EBI_CSEN )     
                        /* 0x05000000, 16 bits, 4 WS, 1MB, 2 tdf = 0x0500242d */
#define EBI_CSR_5_New   (unsigned int)(ZK2_IO_BASE | EBI_DBW_16 | EBI_NWS_5 | EBI_WSE | EBI_PAGES_1M | EBI_TDF_2 | EBI_CSEN )     
                        /* 0x06000000, 16 bits, 4 WS, 1MB, 2 tdf = 0x0600242d */

/*-----------------*/
/* Leds Definition */
/*-----------------*/
#define	CON_TIMER2		P6
#define LED_Run         P16
#define LED_Error       P17
#define SCK0			P13
#define SCK1			P20

#define LED_PIO_CTRL    1
#define LED_MASK        (LED_Run | LED_Error | CON_TIMER2 | SCK0 | SCK1)

#define LED_ON          PIO_SET_OUT
#define LED_OFF         PIO_CLEAR_OUT


/*-------------------------*/
/* Push Buttons Definition */
/*-------------------------*/
#define SW1_Test        P18
#define SW2_WH1			P19
#define SW2_WH2			P23

#define SW_MASK         (SW1_Test | SW2_WH1 | SW2_WH2)


/*--------------------------*/
/* Serial EEPROM Definition */
/*--------------------------*/

#define SCL             (1<<8)
#define SDA             (1<<7)
#define PIO_SCL         (1<<8)
#define PIO_SDA         (1<<7)


/*--------------*/
/* Master Clock */
/*--------------*/

#define MCK             66000000
#define MCKKHz          (MCK/1000)

#endif /* df9311zk_h */