📄 manchesterdeencoder.map.qmsg
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{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.0 Build 168 06/22/2005 Service Pack 1 SJ Full Version " "Info: Version 5.0 Build 168 06/22/2005 Service Pack 1 SJ Full Version" { } { } 0} { "Info" "IQEXE_START_BANNER_TIME" "Wed Jun 13 11:00:10 2007 " "Info: Processing started: Wed Jun 13 11:00:10 2007" { } { } 0} } { } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off ManchesterDeEncoder -c ManchesterDeEncoder " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off ManchesterDeEncoder -c ManchesterDeEncoder" { } { } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "ManchesterDecoder.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file ManchesterDecoder.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 ManchesterDecoder-behav " "Info: Found design unit 1: ManchesterDecoder-behav" { } { { "ManchesterDecoder.vhd" "" { Text "C:/altera/qdesigns50/works/ManchesterDeEncoder/ManchesterDecoder.vhd" 23 -1 0 } } } 0} { "Info" "ISGN_ENTITY_NAME" "1 ManchesterDecoder " "Info: Found entity 1: ManchesterDecoder" { } { { "ManchesterDecoder.vhd" "" { Text "C:/altera/qdesigns50/works/ManchesterDeEncoder/ManchesterDecoder.vhd" 9 -1 0 } } } 0} } { } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "DigPll.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file DigPll.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 DigPll-behav " "Info: Found design unit 1: DigPll-behav" { } { { "DigPll.vhd" "" { Text "C:/altera/qdesigns50/works/ManchesterDeEncoder/DigPll.vhd" 18 -1 0 } } } 0} { "Info" "ISGN_ENTITY_NAME" "1 DigPll " "Info: Found entity 1: DigPll" { } { { "DigPll.vhd" "" { Text "C:/altera/qdesigns50/works/ManchesterDeEncoder/DigPll.vhd" 10 -1 0 } } } 0} } { } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "ClockGenerator.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file ClockGenerator.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 ClockGenerator-behav " "Info: Found design unit 1: ClockGenerator-behav" { } { { "ClockGenerator.vhd" "" { Text "C:/altera/qdesigns50/works/ManchesterDeEncoder/ClockGenerator.vhd" 24 -1 0 } } } 0} { "Info" "ISGN_ENTITY_NAME" "1 ClockGenerator " "Info: Found entity 1: ClockGenerator" { } { { "ClockGenerator.vhd" "" { Text "C:/altera/qdesigns50/works/ManchesterDeEncoder/ClockGenerator.vhd" 12 -1 0 } } } 0} } { } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "ClockGenEn.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file ClockGenEn.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 ClockGenEn-behav " "Info: Found design unit 1: ClockGenEn-behav" { } { { "ClockGenEn.vhd" "" { Text "C:/altera/qdesigns50/works/ManchesterDeEncoder/ClockGenEn.vhd" 14 -1 0 } } } 0} { "Info" "ISGN_ENTITY_NAME" "1 ClockGenEn " "Info: Found entity 1: ClockGenEn" { } { { "ClockGenEn.vhd" "" { Text "C:/altera/qdesigns50/works/ManchesterDeEncoder/ClockGenEn.vhd" 6 -1 0 } } } 0} } { } 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "DigPll " "Info: Elaborating entity \"DigPll\" for the top level hierarchy" { } { } 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "16 " "Info: Implemented 16 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "3 " "Info: Implemented 3 input pins" { } { } 0} { "Info" "ISCL_SCL_TM_OPINS" "1 " "Info: Implemented 1 output pins" { } { } 0} { "Info" "ISCL_SCL_TM_LCELLS" "12 " "Info: Implemented 12 logic cells" { } { } 0} } { } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 0 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Wed Jun 13 11:00:14 2007 " "Info: Processing ended: Wed Jun 13 11:00:14 2007" { } { } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:05 " "Info: Elapsed time: 00:00:05" { } { } 0} } { } 0}
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