📄 18f8722.lkr
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//**********************************************************************/
//* */
//* File name: 18f8722.lkr */
//* */
//* Since: 2003/01/26 */
//* */
//* Version: PICos18 v2.10 */
//* Copyright (C) 2003, 2004 Pragmatec. */
//* */
//* Author: Designed by Pragmatec S.A.R.L. www.pragmatec.net */
//* MONTAGNE Xavier [XM] xavier.montagne@pragmatec.net */
//* ROZIER Bertrand [XM] bertrand.rozier@pragmatec.net */
//* */
//* Purpose: Specify the memory organisation (cf map file). */
//* */
//* Distribution: This file is part of PICos18. */
//* PICos18 is free software; you can redistribute it */
//* and/or modify it under the terms of the GNU General */
//* Public License as published by the Free Software */
//* Foundation; either version 2, or (at your option) */
//* any later version. */
//* */
//* PICos18 is distributed in the hope that it will be */
//* useful, but WITHOUT ANY WARRANTY; without even the */
//* implied warranty of MERCHANTABILITY or FITNESS FOR A */
//* PARTICULAR PURPOSE. See the GNU General Public */
//* License for more details. */
//* */
//* You should have received a copy of the GNU General */
//* Public License along with gpsim; see the file */
//* COPYING.txt. If not, write to the Free Software */
//* Foundation, 59 Temple Place - Suite 330, */
//* Boston, MA 02111-1307, USA. */
//* */
//* > A special exception to the GPL can be applied should */
//* you wish to distribute a combined work that includes */
//* PICos18, without being obliged to provide the source */
//* code for any proprietary components. */
//* */
//* History: */
//* 2003/01/26 [XM] Create this file. */
//* Replace fixed SECTIONS by relocatable SECTIONS. */
//* 2004/06/11 [RZR] Change RAM section to fit the 16 tasks mapping. */
//* 2004/12/10 [RKRA] adapted for PIC18F8720 */
//* 2005/04/27 [RKRA] adapted for PIC18F8722 */
//* */
//**********************************************************************/
LIBPATH .
FILES c018iz.o
FILES clib.lib
FILES p18f8722.lib
// **************************************************************
// * Describe the ROM physical memory organisation *
// **************************************************************
CODEPAGE NAME=BOOT START=0x0000 END=0x0007
CODEPAGE NAME=vectors START=0x0008 END=0x004F PROTECTED
CODEPAGE NAME=DESCRIPT START=0x0050 END=0x00FF PROTECTED
CODEPAGE NAME=KERNEL START=0x0100 END=0x1FFF PROTECTED
CODEPAGE NAME=TASKS START=0x2000 END=0x1FDBF
CODEPAGE NAME=debug START=0x1FDC0 END=0x1FFFF PROTECTED
CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED
CODEPAGE NAME=config START=0x300000 END=0x300007 PROTECTED
CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED
CODEPAGE NAME=eedata START=0xF00000 END=0xF003FF PROTECTED
// ***************************************************************
// * Link the logical areas (SECTION) to ROM physical memory *
// ***************************************************************
SECTION NAME=INT ROM=vectors
SECTION NAME=KERNEL_ROM ROM=KERNEL
SECTION NAME=BOOT_ROM ROM=BOOT
SECTION NAME=DESC_ROM ROM=DESCRIPT
// **************************************************************
// * Describe the RAM physical memory organisation *
// **************************************************************
ACCESSBANK NAME=accessram START=0x0 END=0x5F
DATABANK NAME=kernel START=0x60 END=0xFF PROTECTED
DATABANK NAME=task START=0x100 END=0x6FF
DATABANK NAME=main START=0x700 END=0xEF3 PROTECTED
DATABANK NAME=dbgspr START=0xEF4 END=0xEFF PROTECTED
ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED
// ***************************************************************
// * Link the logical areas (SECTION) to RAM physical memory *
// ***************************************************************
SECTION NAME=KERNEL_RAM RAM=kernel
STACK SIZE=0x74 RAM=main
//* End of File : 18f8722.lkr */
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