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📄 hal_h8s_h8s2674_edosk2674.cdl

📁 ecos移植到R8H系列的源码。源码包来自http://www.cetoni.de/develop/develop_ecosh8s_en.html
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# ====================================================================
#
#      hal_h8300_h8s_edosk2674.cdl
#
#      EDOSK-2674R HAL package configuration data
#
# ====================================================================
#####ECOSGPLCOPYRIGHTBEGIN####
## -------------------------------------------
## This file is part of eCos, the Embedded Configurable Operating System.
## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
##
## eCos is free software; you can redistribute it and/or modify it under
## the terms of the GNU General Public License as published by the Free
## Software Foundation; either version 2 or (at your option) any later version.
##
## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
## WARRANTY; without even the implied warranty of MERCHANTABILITY or
## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
## for more details.
##
## You should have received a copy of the GNU General Public License along
## with eCos; if not, write to the Free Software Foundation, Inc.,
## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
##
## As a special exception, if other files instantiate templates or use macros
## or inline functions from this file, or you compile this file and link it
## with other works to produce a work based on this file, this file does not
## by itself cause the resulting work to be covered by the GNU General Public
## License. However the source code for this file must still be made available
## in accordance with section (3) of the GNU General Public License.
##
## This exception does not invalidate any other reasons why a work based on
## this file might be covered by the GNU General Public License.
##
## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
## at http://sources.redhat.com/ecos/ecos-license/
## -------------------------------------------
#####ECOSGPLCOPYRIGHTEND####
# ====================================================================
######DESCRIPTIONBEGIN####
#
# Author(s):      yoshinori sato
# Original data:  yoshinori sato, Uwe Kindler
# Contributors:
# Date:           2003-02-24
#
#####DESCRIPTIONEND####
#
# ====================================================================

cdl_package CYGPKG_HAL_H8S_H8S2674_EDOSK2674 {
    display       "EDOSK-2674 platform"
    parent        CYGPKG_HAL_H8S
    requires      CYGPKG_HAL_H8S_H8S2674
    implements    CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT
    implements    CYGINT_HAL_VIRTUAL_VECTOR_COMM_BAUD_SUPPORT
    implements    CYGINT_HAL_DEBUG_GDB_STUBS
    implements    CYGINT_HAL_DEBUG_GDB_STUBS_BREAK
    implements    CYGINT_HAL_H8S_USE_COMMON_SCI_CODE
    implements    CYGINT_HAL_H8S_USE_COMMON_DIAG_CODE
    implements    CYGINT_HAL_H8S_USE_COMMON_GDB_STUB
    implements    CYGINT_HAL_H8S_PLATFORM_LINUX_BOOT_SUPPORT
    define_header hal_h8s_h8s2674_edosk2674.h
    include_dir   cyg/hal
    description   "
           The EDOSK-2674 HAL package provides the support needed to run
           eCos on a Renesas Evaluation Design O/S Kit for H8S/2674." 

    compile       plf_misc.c plf_diag.c delay_us.S

    define_proc {
        puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H <pkgconf/hal_h8s_h8s2674.h>"
        puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H <pkgconf/hal_h8s_h8s2674_edosk2674.h>"
        puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_IO_H <cyg/hal/plf_io.h>"

        puts $::cdl_header "#define CYG_HAL_H8S"
        puts $::cdl_header "#define CYGHWR_HAL_VSR_TABLE 0xffbb00"
        puts $::cdl_header "#define CYGHWR_HAL_VECTOR_TABLE 0xffbd00"
        puts $::cdl_header "#define HAL_PLATFORM_CPU    \"H8S/2674\""
        puts $::cdl_header "#define HAL_PLATFORM_BOARD  \"Renesas EDOSK-2674\""
        puts $::cdl_header "#define HAL_PLATFORM_EXTRA  \"\""
    }

    cdl_component CYG_HAL_STARTUP {
        display       "Startup type"
        flavor        data
        legal_values  {"ROM" "RAM" "ROMRAM" "RAMAPP"}
        default_value {CYGPKG_REDBOOT ? "ROM" : "RAM"}
	    no_define
	    define       -file system.h CYG_HAL_STARTUP
        description   "
           When targetting the EDOSK-2674 board, it is possible to build the system 
           for RAM, ROM or ROMRAM bootstrap. RAM bootstrap generally requires that 
           the boards main FLASH contains a suitable ROM monitor software 
           (preferably RedBoot) that allows GDB to download the eCos application into 
           RAM. The ROM and ROMRAM bootstrap typically requires that the eCos 
           application be blown into the board's main FLASH. ROMRAM startup requires 
           extra RAM memory because the complete image will be copied from ROM into 
           RAM before startup. RAMAPP is a special RAM startup. This startup is 
           required if a RedBoot RAM image is running on the board and an application 
           should be debugged with this image. Because RedBoot already resides in RAM, 
           the application has to be loaded behind the RedBoot image in RAM. This is 
           required if i.e. debugging of the GDB stub inside the RedBoot RAM image is 
           necessary."
           
        cdl_component CYGHWR_MEMORY_LAYOUT {
            display "Memory layout"
            flavor data
            no_define                                               
            calculated { (CYG_HAL_STARTUP == "RAM")    ? "h8s_h8s2674_edosk2674_ram"    : \
                         (CYG_HAL_STARTUP == "ROMRAM") ? "h8s_h8s2674_edosk2674_romram" : \                         (CYG_HAL_STARTUP == "ROM")    ? "h8s_h8s2674_edosk2674_rom"    : \
                                                         "h8s_h8s2674_edosk2674_ramapp" } 
            description "
                This is the memory layout used for building. It is selected according to 
                the startup (RAM, ROM, ROMRAM) settings." 

            cdl_option CYGHWR_MEMORY_LAYOUT_LDI {
                display "Memory layout linker script fragment"
                flavor data
                no_define
                define -file system.h CYGHWR_MEMORY_LAYOUT_LDI       
                calculated { (CYG_HAL_STARTUP == "RAM")    ? "<pkgconf/mlt_h8s_h8s2674_edosk2674_ram.ldi>"    : \                             (CYG_HAL_STARTUP == "ROMRAM") ? "<pkgconf/mlt_h8s_h8s2674_edosk2674_romram.ldi>" : \                             (CYG_HAL_STARTUP == "ROM")    ? "<pkgconf/mlt_h8s_h8s2674_edosk2674_rom.ldi>"    : \
                                                             "<pkgconf/mlt_h8s_h8s2674_edosk2674_ramapp.ldi>" }
            }

            cdl_option CYGHWR_MEMORY_LAYOUT_H {
                display "Memory layout header file"
                flavor data
                no_define
                define -file system.h CYGHWR_MEMORY_LAYOUT_H      
                calculated { (CYG_HAL_STARTUP == "RAM")    ? "<pkgconf/mlt_h8s_h8s2674_edosk2674_ram.h>"    : \                             (CYG_HAL_STARTUP == "ROMRAM") ? "<pkgconf/mlt_h8s_h8s2674_edosk2674_romram.h>" : \                             (CYG_HAL_STARTUP == "ROM")    ? "<pkgconf/mlt_h8s_h8s2674_edosk2674_rom.h>"    : \
                                                             "<pkgconf/mlt_h8s_h8s2674_edosk2674_ramapp.h>" }
            }
        }
    }
    
 
    cdl_component CYGPKG_HAL_H8S_H8S2674_EDOSK2674_IO_OPTIONS {
        display "I/O related options"
        flavor  none
        description   "
	        I/O related options including control over
	        communications channels, debug and console channel."
	    
	    
        cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS {
            display      "Number of communication channels on the board"
            flavor       data
            calculated   1
            description  " 
               The H8S/2674 has three independent serial communication channels 
               (SCI0, SCI1 and SCI2). On the EDOSK board only one channel, SCI2,
               is connected to an RS-232 interface"
        }

        cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL {
            display          "Debug serial channel"
            flavor data
            calculated       0
            description      "
                This option chooses which channel will be used to connect to a host
                running GDB. On the EDOSK board only one channel is connected to an 
                RS-232 interface and can be used for debugging (SCI2)"  
        }
      
        cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL {
            display          "Console channel"
            flavor data
            calculated       0
            description      "
                This option chooses which channel will be used for diagnostic output.
	            On the EDOSK board only one channel is connected to an  RS-232 interface and 
	            can be used for diagnostic output (SCI2)."
        } 
     
        cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD {
            display       "GDB/Diagnostic serial port baud rate"
            flavor        data
            legal_values  9600 14400 19200 38400 57600 115200
            default_value 115200
            description   "
                This option selects the baud rate for the diagnostic/debug serial 
                channel SCI2"
        }
    }     

    # Real-time clock/counter specifics
    cdl_component CYGNUM_HAL_RTC_CONSTANTS {
        display       "Real-time clock constants."
        flavor        none
    
        cdl_option CYGNUM_HAL_RTC_NUMERATOR {
            display       "Real-time clock numerator"
            flavor        data
            calculated    1000000000
            description   "
                The NUMERATOR divided by the DENOMINATOR gives the number of 
                nanoseconds per tick."                  
        }
        cdl_option CYGNUM_HAL_RTC_DENOMINATOR {
            display       "Real-time clock denominator"
            flavor        data
            calculated    100
            description   "
                The NUMERATOR divided by the DENOMINATOR gives the number of 
                nanoseconds per tick."    
        }
        cdl_option CYGNUM_HAL_RTC_PERIOD {
            display       "Real-time clock period"
            flavor        data
            calculated    { 20625 * CYGHWR_HAL_H8S_MULT_RATE / CYGHWR_HAL_H8S_DIVIDER_RATE }
            description   "
                The PERIOD is the divider to be programmed into a hardware timer that is driven 
                from an appropriate hardware clock, such that the timer overflows once per tick.
                The EDOSK board uses the TPU channel 5 as hardware timer."
        }

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