variant.inc

ecos移植到R8H系列的源码。源码包来自http://www.cetoni.de/develop/develop_ecosh8s_en.html

#ifndef CYGONCE_HAL_VARIANT_INC
#define CYGONCE_HAL_VARIANT_INC
//=============================================================================
//
//  variant.inc
//
//  H8S/2674 assembler header file
//
//=============================================================================
//###ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//###ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s):       Uwe Kindler
// Contributors:    ysato
// Date:            2003-12-06
// Purpose:         H8S/2684 definitions.
// Description: This file contains various definitions and macros that are
//              useful for writing assembly code for the H8S/2674 CPU variant.
// Usage:
//      #include <cyg/hal/variant.inc>
//      ...
//      
//
//####DESCRIPTIONEND####
//
//=============================================================================


//============================================================================
//                                   INCLUDES
//============================================================================
#include <pkgconf/hal.h>

#include <cyg/hal/platform.inc>
#include <cyg/hal/basetype.h>
#include <cyg/hal/mod_regs_intc.h>  


//============================================================================
//                      INITIALIZE INTERRUPT CONTROLLER
// DESCRIPTION:
//     Sets up the interrupt control mode selected by user.
//============================================================================
#ifndef CYGPKG_HAL_H8S_INTC_DEFINED
    #define CYGPKG_HAL_H8S_INTC_DEFINED
    .macro  hal_intc_init
    #if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM) 
        mov.b   @CYGARC_INTCR, r0l
        bclr    #4,r0l
        bset    #5,r0l
        mov.b   r0l,@CYGARC_INTCR
    #endif // #if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)       
    .endm
#endif // End of #ifndef CYGPKG_HAL_H8S_INTC_DEFINED


//=============================================================================
//                           TIMER INITIALISATION
// DESCRIPTION:
//     Initialize the timer, clock etc. While the timer used for RTC 
//     interrupts will be initialized later, it may be necessary to set up the 
//     clocks that drive it here.
//
// NOTES:
//     Here in H8S2674 we set up the clock pulse generator. We set up the PLL 
//     circuit and the devider according to the values within the CDL files.
//     We use:
//         CYGHWR_HAL_H8S_MULT_RATE
//         CYGHWR_HAL_H8S_DIVIDER_RATE
//============================================================================= 
#ifndef CYGPKG_HAL_H8S_TIMER_DEFINED
    #define CYGPKG_HAL_H8S_TIMER_DEFINED
    //
    // define frequency multiplier rate according to the settings in CDL file
    //
#if CYGHWR_HAL_H8S_MULT_RATE   == 1
    #define FREQ_MULT_FACTOR 0
#elif CYGHWR_HAL_H8S_MULT_RATE == 2
    #define FREQ_MULT_FACTOR 1
#elif CYGHWR_HAL_H8S_MULT_RATE == 4
    #define FREQ_MULT_FACTOR 3
#else
    #error "Wrong PLL multiplier rate"
#endif 
    //
    // define clock devider rate according to the settings in CDL file
    //
#if CYGHWR_HAL_H8S_DIVIDER_RATE   == 1
    #define SYS_CLOCK_DEVISION_RATIO 0
#elif CYGHWR_HAL_H8S_DIVIDER_RATE == 2
    #define SYS_CLOCK_DEVISION_RATIO 1
#elif CYGHWR_HAL_H8S_DIVIDER_RATE == 4
    #define SYS_CLOCK_DEVISION_RATIO 2
#elif CYGHWR_HAL_H8S_DIVIDER_RATE == 8
    #define SYS_CLOCK_DEVISION_RATIO 3
#elif CYGHWR_HAL_H8S_DIVIDER_RATE == 16
    #define SYS_CLOCK_DEVISION_RATIO 4
#elif CYGHWR_HAL_H8S_DIVIDER_RATE == 32
    #define SYS_CLOCK_DEVISION_RATIO 5
#else
    #error "Wrong system clock devision ratio"
#endif 
    //
    //
    //
    .macro  hal_timer_init
    #if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM) 
        mov.b #FREQ_MULT_FACTOR, r0l
        mov.b r0l, @CYGARC_PLLCR
        mov.b @CYGARC_SCKCR, r0l
        and.b #(SYS_CLOCK_DEVISION_RATIO + 0x0), r0l
        mov.b r0l, @CYGARC_SCKCR
    #endif // #if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)
    .endm
#endif // #ifndef CYGPKG_HAL_H8S_TIMER_DEFINED


//=============================================================================
//                           ROM MONITOR INITIALIZATION
// DESCRIPTION:
//     Initializes VSR table.
//=============================================================================
#ifndef CYGPKG_HAL_H8S_MON_DEFINED
    #define CYGPKG_HAL_H8S_MON_DEFINED

#if defined(CYG_HAL_STARTUP_ROM) ||         \
    defined(CYG_HAL_STARTUP_ROMRAM) ||      \
   (defined(CYG_HAL_STARTUP_RAM) &&         \
   !defined(CYGSEM_HAL_USE_ROM_MONITOR))
    //
    // If we are starting up from ROM, or we are starting in
    // RAM and NOT using a ROM monitor, initialize the complete VSR table.
    //
    .macro  hal_mon_init
    //
    // we create a label for debugging purposes
    //
vsr_tbl_init:  
    mov.l   #CYG_LABEL_DEFN(hal_vsr_table), er3
    //
    // first we initialize the VSR-table exception vectors
    //
    mov.l   #CYG_LABEL_DEFN(__default_exception_vsr), er2
    mov.l   er2, @(0 * 4, er3)  // CYGNUM_HAL_VECTOR_RESET_POWER_ON
    mov.l   er2, @(1 * 4, er3)  // CYGNUM_HAL_VECTOR_RESET_MANUAL
    mov.l   er2, @(2 * 4, er3)  // CYGNUM_HAL_VECTOR_RSV2
    mov.l   er2, @(3 * 4, er3)  // CYGNUM_HAL_VECTOR_RSV3
    mov.l   er2, @(4 * 4, er3)  // CYGNUM_HAL_VECTOR_RSV4
    mov.l   er2, @(5 * 4, er3)  // CYGNUM_HAL_VECTOR_TRACE
    mov.l   er2, @(6 * 4, er3)  // CYGNUM_HAL_VECTOR_DIRECT_TRANS
    
    mov.l   er2, @(8 * 4, er3)  // CYGNUM_HAL_VECTOR_TRAP0
    mov.l   er2, @(9 * 4, er3)  // CYGNUM_HAL_VECTOR_TRAP1
    mov.l   er2, @(10* 4, er3)  // CYGNUM_HAL_VECTOR_TRAP2
    mov.l   er2, @(11* 4, er3)  // CYGNUM_HAL_VECTOR_TRAP3
    //
    // now we initialize all VSR-table interrupt vectors - the NMI interrupt
    // vector is within the exception vector range so we have to initialize
    // it manually here.
    //
    mov.l   #CYG_LABEL_DEFN(__default_interrupt_vsr), er2
    mov.l   er2, @(CYGNUM_HAL_INTERRUPT_NMI * 4, er3) 
    //
    // now we can initialize alle external and internal interrupt vectors
    //
    mov.l   #(CYG_LABEL_DEFN(hal_vsr_table) + (CYGNUM_HAL_INTERRUPT_EXTERNAL_0 * 4)), er0
    mov.l   #(CYG_LABEL_DEFN(hal_vsr_table) + ((CYGNUM_HAL_INTERRUPT_TEI2+1) * 4)), er3
vsr_tbl_init_loop:
    cmp    er3, er0
    bge    finished_vsr_tbl_init
    mov.l  er2, @-er3
    bra    vsr_tbl_init_loop
finished_vsr_tbl_init:
    .endm
#elif defined(CYG_HAL_STARTUP_RAM) && defined(CYGSEM_HAL_USE_ROM_MONITOR)
    //
    // Initialize the VSR table entries. We only take control of the interrupt vector,
    // the rest are left to the ROM for now... If the ROM monitor includes support 
    // for CTRL C packets then this will be destroyed here.
    //
    .macro  hal_mon_init
    //
    // now we initialize all VSR-table interrupt vectors - the NMI interrupt
    // vector is within the exception vector range so we have to initialize
    // it manually here.
    //
vsr_tbl_init:
    mov.l   #CYG_LABEL_DEFN(hal_vsr_table), er3
    mov.l   #CYG_LABEL_DEFN(__default_interrupt_vsr), er2
    mov.l   er2, @(CYGNUM_HAL_INTERRUPT_NMI * 4, er3) 
    //
    // now we can initialize alle external and internal interrupt vectors
    //
    mov.l   #(CYG_LABEL_DEFN(hal_vsr_table) + (CYGNUM_HAL_INTERRUPT_EXTERNAL_0 * 4)), er0
    mov.l   #(CYG_LABEL_DEFN(hal_vsr_table) + ((CYGNUM_HAL_INTERRUPT_TEI2+1) * 4)), er3
vsr_tbl_init_loop:
    cmp    er3, er0
    bge    finished_vsr_tbl_init
    mov.l  er2, @-er3
    bra    vsr_tbl_init_loop
finished_vsr_tbl_init:
    .endm
#else
    //
    // we simply provide the empty macro here
    //
    .macro  hal_mon_init
    .endm
#endif          
#endif // #ifndef CYGPKG_HAL_H8S_MON_DEFINED    


//=------------------------------------------------------------------------------
#endif // ifndef CYGONCE_HAL_VARIANT_INC
// end of variant.inc