📄 var_intr.h
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#ifndef CYGONCE_HAL_VAR_INTR_H
#define CYGONCE_HAL_VAR_INTR_H
//==========================================================================
//
// var_intr.h
//
// H8S Interrupt and clock support
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): yoshinori sato
// Contributors: yoshinori sato, Uwe Kindler
// Date: 2003-12-06
// Purpose: H8S Interrupt Support
// Description: The macros defined here provide the HAL APIs for handling
// interrupts and the clock for H8S/2674 variants of the H8S
// architecture.
//
// Usage:
// #include <cyg/hal/var_intr.h>
// ...
//
//
//####DESCRIPTIONEND####
//
//==========================================================================
//==========================================================================
// DOXYGEN FILE HEADER
/// \file var_intr.h
/// \brief H8S Interrupt and clock support.
/// \author yoshinori sato, Uwe Kindler
/// \date 2003-12-06
///
/// The macros defined here provide the HAL APIs for handling
/// interrupts and the clock for H8S/2674 variants of the H8S
/// architecture.
///
/// Usage: #include <cyg/hal/var_intr.h>
//==========================================================================
//==========================================================================
// INCLUDES
//==========================================================================
#include <pkgconf/hal.h>
#include <cyg/infra/cyg_type.h>
#include <cyg/hal/plf_intr.h>
#include <cyg/hal/var_arch.h>
#include <cyg/hal/var_intr_numbers.h> // interrupt vector numbers
//==========================================================================
// VECTOR TRANSLATION
// DESCRIPTION:
// Offers the possibillity to do some vector translation before
// indexing into vector tables. For H8S/2674 this is a
// 1 to 1 translation
//==========================================================================
#if !defined(CYGIMP_HAL_COMMON_INTERRUPTS_CHAIN)
#define HAL_TRANSLATE_VECTOR(_vector_, _index_) \
((_index_) = (_vector_))
#endif // HAL_TRANSLATE_VECTOR
//==========================================================================
// INTERRUPT CONTROLLER MANAGEMENT
// DESCRIPTION:
// These macros exert control over any prioritized interrupt controller
// that is present. If no priority controller exists, then these macros
// should be empty.
//
// NOTES:
// Interrupt controller access
// Read interrupt control registers back after writing to them. This
// ensures that the written value is not sitting in the store buffers
// when interrupts are re-enabled. It is all handled in var_misc.c
//==========================================================================
//--------------------------------------------------------------------------
/// Provides control over how an interrupt signal is detected.
///
externC void hal_interrupt_configure(int vector,int level,int up);
#define HAL_INTERRUPT_CONFIGURE( _vector_, _level_, _up_ ) \
hal_interrupt_configure( _vector_, _level_, _up_ )
//--------------------------------------------------------------------------
/// Causes the interrupt associated with the given vector to be blocked.
///
externC void hal_interrupt_mask(int vector);
#define HAL_INTERRUPT_MASK( _vector_ ) \
hal_interrupt_mask( _vector_ )
//--------------------------------------------------------------------------
/// Causes the interrupt associated with the given vector to be unblocked.
///
externC void hal_interrupt_unmask(int vector);
#define HAL_INTERRUPT_UNMASK( _vector_ ) \
hal_interrupt_unmask( _vector_ )
//--------------------------------------------------------------------------
/// Acknowledges the current interrupt from the given vector.
/// This is usually executed from the ISR for this vector when it is
/// prepared to allow further interrupts.
///
externC void hal_interrupt_acknowledge(int vector);
#define HAL_INTERRUPT_ACKNOWLEDGE( _vector_ ) \
hal_interrupt_acknowledge( _vector_ )
//--------------------------------------------------------------------------
/// Provides control over the hardware priority of the interrupt.
///
externC void hal_interrupt_set_level(int vector,int level);
#define HAL_INTERRUPT_SET_LEVEL( _vector_, _level_ ) \
hal_interrupt_set_level( _vector_, _level_ )
//--------------------------------------------------------------------------
/// Attaches interrupt data to a vector.
/// Stores the interrupt data into the 3 tables reserved for this table
///
externC void hal_interrupt_attach(int vector, CYG_ADDRESS isr, CYG_ADDRWORD data, CYG_ADDRESS object);
#define HAL_INTERRUPT_ATTACH(_vector_, _isr_, _data_, _object_) \
hal_interrupt_attach((_vector_), (CYG_ADDRESS)(_isr_), (CYG_ADDRWORD)(_data_), (CYG_ADDRESS)(_object_))
//--------------------------------------------------------------------------
// Required for measuring the latency of reading the clock
//
#ifdef CYGVAR_KERNEL_COUNTERS_CLOCK_LATENCY
#define HAL_CLOCK_LATENCY(_pvalue_) HAL_CLOCK_READ(_pvalue_)
#endif
//--------------------------------------------------------------------------
// checks if a given vector is an interrupt vector. Interrupts start with
// vectors CYGNUM_HAL_INTERRUPT_EXTERNAL_0. But there is one exception - the
// vector CYGNUM_HAL_INTERRUPT_NMI is within the exeception range.
//
#ifndef CYG_VECTOR_IS_INTERRUPT
#define CYG_VECTOR_IS_INTERRUPT(v) ((CYGNUM_HAL_INTERRUPT_EXTERNAL_0 <= (v)) || (CYGNUM_HAL_INTERRUPT_NMI == (v)))
#endif
//--------------------------------------------------------------------------
#endif // ifndef CYGONCE_HAL_VAR_INTR_H
// End of var_intr.h
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