📄 platform.inc
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#ifndef CYGONCE_HAL_PLATFORM_INC
#define CYGONCE_HAL_PLATFORM_INC
//=============================================================================
//
// platform.inc
//
// EDOSK-2764R "board" assembler header file
//
//=============================================================================
//###ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//###ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): yoshinori sato
// Contributors: yoshinori sato, Uwe Kindler
// Date: 2003-12-06
// Purpose: EDOSK-2674R "board" definitions.
// Description: This file contains various definitions and macros that are
// required for writing assembly code for the am31 simulator.
// Currently there are none
// Usage:
// #include <cyg/hal/platform.inc>
// ...
//
//
//####DESCRIPTIONEND####
//
//=============================================================================
//=============================================================================
// INCLUDES
//=============================================================================
#include <pkgconf/hal.h>
#include <cyg/hal/mod_regs_bsc.h>
#include <cyg/hal/mod_regs_pio.h>
#include <cyg/hal/mod_regs_intc.h>
#include <cyg/hal/mod_regs_sys.h>
//============================================================================
// INITIALIZE INTERRUPT CONTROLLER
// DESCRIPTION:
// Sets up the interrupt control mode selected by user.
//============================================================================
#define CYGPKG_HAL_H8S_INTC_DEFINED
.macro hal_intc_init
#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)
hal_intc_init:
//
// setup interrupt control mode and NMI edge
//
mov.b #(CYGARC_SYSCR_ICM2 | CYGARC_SYSCR_NMIEG_RIS | CYGARC_SYSCR_RAME), r0l
mov.b r0l, @CYGARC_SYSCR
#endif // #if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)
.endm
//=============================================================================
// INITIALIZE MEMORY AND BUS CONTROLLER
// DESCRIPTION:
// Initializes memory and bus controller of EDOSK board.
//=============================================================================
#define CYGPKG_HAL_H8S_MEMC_DEFINED
.macro hal_memc_init
#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)
hal_memc_init:
//
// we have to initialize memory, port i/o and bus controller only if we
// are doing ROM startup. If we are doing RAM startup then this should
// be already done by ROM monitor
//
//
// BSC/GPIO setup
//
mov.l #init_regs,er0
mov.w #0xff,e2
//
// now initialize all registesr in init_regs
//
regs_init_loop:
mov.w @er0+,r2
beq regs_init_finished
mov.w @er0+,r1
mov.b r1l,@er2
bra regs_init_loop
#define INIT_REGS_DATA(REGS,DATA) .word ((REGS) & 0xffff),DATA
//
// All registers to be initialized and their initial values
//
init_regs:
INIT_REGS_DATA(CYGARC_P1DDR, 0x30) // Turn off user LED's by activating the Port Bits
INIT_REGS_DATA(CYGARC_ABWCR, 0x06) // 8 Bit Access for area 1 and 2 - 16 Bit access for other areass
INIT_REGS_DATA(CYGARC_ASTCR, 0xFF) // initial values - 3 state access
INIT_REGS_DATA(CYGARC_WCRL, 0xFC) // Wait no inserted when external space area 0 is accessed
INIT_REGS_DATA(CYGARC_BCRH, 0x10) // remove idle cycles
INIT_REGS_DATA(CYGARC_PFCR, 0x0F) // Allow A8 - A23
INIT_REGS_DATA(CYGARC_PCDDR, 0xFF) // Enable A0 - A7
INIT_REGS_DATA(CYGARC_PBDDR, 0xFF) // Enable A8 - A15
INIT_REGS_DATA(CYGARC_PBDDR, 0xFF) // Enable A8 - A15
INIT_REGS_DATA(CYGARC_PBDDR, 0x0F) // Enable A16 - A19
INIT_REGS_DATA(CYGARC_P1DDR, 0x0F) // Enable A20 - A23
INIT_REGS_DATA(CYGARC_P1DDR, 0x0F) // Enable A20 - A23
INIT_REGS_DATA(CYGARC_PFDDR, 0xF8) // CS1n enabled for SRAM
INIT_REGS_DATA(CYGARC_MSTPCRB,0xbf) // start SCI1 channel
.word 0
regs_init_finished:
#endif
.endm
//=------------------------------------------------------------------------------
#endif // ifndef CYGONCE_HAL_PLATFORM_INC
// end of platform.inc
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