mod_regs_wdt.h

ecos移植到R8H系列的源码。源码包来自http://www.cetoni.de/develop/develop_ecosh8s_en.html

#ifndef CYGONCE_MOD_REGS_WDT_H
#define CYGONCE_MOD_REGS_WDT_H

//==========================================================================
//
//      mod_regs_wdt.h
//
//      Watchdog Timer Register
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s):    Uwe Kindler
// Contributors: Uwe Kindler
// Date:         2004-11-04
//              
//####DESCRIPTIONEND####
//
//==========================================================================


//==========================================================================
//                            DOXYGEN FILE HEADER
/// \file    mod_regs_wdt.h
/// \brief   Watchdog Timer Register definitions.
/// \author  Uwe Kindler
/// \date    2004-11-04
//==========================================================================


//==========================================================================
//                         REGISTER ADDRESSES
//==========================================================================
//--------------------------------------------------------------------------
// WDT 0
//
#define CYGARC_TCSR0R            0xFFFF74
#define CYGARC_TCSR0W            0xFFFF74
#define CYGARC_TCNT0W            0xFFFF74 ///< write acces
#define CYGARC_TCNT0R            0xFFFF75 ///< read access
#define CYGARC_RSTCSR0W          0xFFFF76 ///< write access
#define CYGARC_RSTCSR0R          0xFFFF77 ///< read access


//--------------------------------------------------------------------------
// WDT 1
//
#define CYGARC_TCSR1R            0xFFFFA2
#define CYGARC_TCSR1W            0xFFFFA2
#define CYGARC_TCNT1W            0xFFFFA2
#define CYGARC_TCNT1R            0xFFFFA3


//--------------------------------------------------------------------------
// Passwords for write protected registers
//
#define CYGARC_TCNT_MAGIC        0x5A00
#define CYGARC_TCSR_MAGIC        0xA500
#define CYGARC_RSTCSR_WOVF_MAGIG 0xA500
#define CYGARC_RSTCSR_DATA_MAGIC 0x5A00


//--------------------------------------------------------------------------
// TCSR Register Bit definitions
//
#define CYGARC_TCSR_OVF         0x80
#define CYGARC_TCSR_WT          0x40
#define CYGARC_TCSR_TME         0x20
#define CYGARC_TCSR_CKS2        0x04
#define CYGARC_TCSR_CKS1        0x02
#define CYGARC_TCSR_CKS0        0x01


//--------------------------------------------------------------------------
// TCSR Clock select
//
#define CYGARC_TCSR_CKS_2       0x00
#define CYGARC_TCSR_CKS_64      0x01
#define CYGARC_TCSR_CKS_128     0x02
#define CYGARC_TCSR_CKS_512     0x03
#define CYGARC_TCSR_CKS_2048    0x04
#define CYGARC_TCSR_CKS_8192    0x05
#define CYGARC_TCSR_CKS_32768   0x06
#define CYGARC_TCSR_CKS_131072  0x07


//--------------------------------------------------------------------------
// RSTCSR Register Bit definitions
//
#define CYGARC_RSTCSR_WOFV      0x80 // Overflow flag - set if TCNT overflows
#define CYGARC_RSTCSR_RSTE      0x40 // Reset signal is generated if TCNT overflows
#define CYGARC_RSTCSR_RSTS      0x20 // Reset signal is generated if TCNT overflows


#ifndef __ASSEMBLER__
//==========================================================================
//                         REGISTER STRUCTURE
//==========================================================================
union un_wdt0 {                                         // union WDT    
              struct {                                  // Read  Access 
                     union {                            // TCSR         
                           unsigned char BYTE;          //  Byte Access 
                           struct {                     //  Bit  Access 
                                  unsigned char OVF :1; //    OVF       
                                  unsigned char WTIT:1; //    WT/IT     
                                  unsigned char TME :1; //    TME       
                                  unsigned char     :2; //              
                                  unsigned char CKS :3; //    CKS       
                                  }      BIT;           //              
                           }       TCSR;                //              
                     unsigned char TCNT;                // TCNT         
                     char          wk;                  //              
                     union {                            // RSTCSR       
                           unsigned char BYTE;          //  Byte Access 
                           struct {                     //              
                                  unsigned char WRST:1; //    WSRT      
                                  unsigned char RSTE:1; //    RSTE      
                                  unsigned char RSTS:1; //    RSTS      
                                  }      BIT;           //              
                           }       RSTCSR;              //              
                     } READ;                            //              
              struct {                                  // Write Access 
                     unsigned int  TCSR;                // TCSR/TCNT    
                     unsigned int  RSTCSR;              // RSTCSR       
                     } WRITE;                           //              
};                                                      //              
union un_wdt1 {                                         // union WDT1   
              struct {                                  // Read  Access 
                     union {                            // TCSR         
                           unsigned char BYTE;          //  Byte Access 
                           struct {                     //  Bit  Access 
                                  unsigned char OVF   :1;//   OVF       
                                  unsigned char WTIT  :1;//   WT/IT     
                                  unsigned char TME   :1;//   TME       
                                  unsigned char PSS   :1;//   PSS       
                                  unsigned char RSTNMI:1;//   RST/NMI   
                                  unsigned char CKS   :3;//   CKS       
                                  }      BIT;           //              
                           }       TCSR;                //              
                     unsigned char TCNT;                // TCNT         
                     } READ;                            //              
              struct {                                  // Write Access 
                     unsigned int  TCSR;                // TCSR/TCNT    
                     } WRITE;                           //              
}; 


//==========================================================================
//                      STRUCTURED REGISTER ACCESS
//==========================================================================  
#define HAL_H8S_REG_WDT0  (*(volatile union  un_wdt0  *)0xFFFF74) // WDT0  Address
#define HAL_H8S_REG_WDT1  (*(volatile union  un_wdt1  *)0xFFFFA2) // WDT1  Address

#endif // #ifndef __ASSEMBLER__
//---------------------------------------------------------------------------
#endif // End of #define CYGONCE_MOD_REGS_WDT_H