hal_arch.h

ecos移植到R8H系列的源码。源码包来自http://www.cetoni.de/develop/develop_ecosh8s_en.html

#ifndef CYGONCE_HAL_HAL_ARCH_H
#define CYGONCE_HAL_HAL_ARCH_H
//==========================================================================
//
//      hal_arch.h
//
//      Architecture specific abstractions
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s):     Yoshinori Sato
// Contributors:  Yoshinori Sato, Uwe Kindler
// Date:          2003-12-06
// Purpose:       Define architecture abstractions
// Usage:         #include <cyg/hal/hal_arch.h>
//
//####DESCRIPTIONEND####
//
//==========================================================================


//==========================================================================
//                            DOXYGEN FILE HEADER
/// \file    hal_arch.h
/// \brief   Architecture specific abstractions
/// \author  Yoshinori Sato, Uwe Kindler
/// \date    2003-12-06
///
/// Usage:   #include <cyg/hal/hal_arch.h>
//==========================================================================


//==========================================================================
//                                  INCLUDES
//==========================================================================
#include <pkgconf/hal.h>
#include <cyg/infra/cyg_type.h>
#include <cyg/hal/var_arch.h>
#include <cyg/hal/h8s_stub.h>


//--------------------------------------------------------------------------
/// Kernel exception handling function.
/// This function is defined by the kernel according to this prototype. It is
/// invoked from the HAL to deal with any CPU exceptions that the HAL does
/// not want to deal with itself. It usually invokes the kernel's exception
/// delivery mechanism.
///
externC void cyg_hal_deliver_exception( CYG_WORD code, CYG_ADDRWORD data );


//--------------------------------------------------------------------------
/// Processor saved state. 
/// At the moment this register structure is only valid for interrupt 
/// control mode 2. In ICM2 after each exception the stack looks this way
/// - EXR     8 Bit   <----- SP 
/// - RSV     8 Bit
/// - CCR     8 Bit
/// - PC     24 Bit
///
/// \todo Support for ICM 1 have to be added.
///
typedef struct HAL_SavedRegisters
{
#if defined(CYGHWR_HAL_H8S_USE_MAC)
    CYG_WORD32          mach;       // if we use MAC then we also store it on context switch
    CYG_WORD32          macl;
#endif
    CYG_WORD32          er6;
    CYG_WORD32          er5;
    CYG_WORD32          er4;
    CYG_WORD32          er3;
    CYG_WORD32          er2;
    CYG_WORD32          er1;
    CYG_WORD32          er0; 
    CYG_WORD32          sp;         // Saved copy of SP in some states    
    //
    // On interrupts the PC, CCR and EXR are pushed automatically by the     
    // CPU and SP is pushed for debugging reasons. On a thread switch  
    // the saved context is made to look the same.                 
    // 
    cyg_uint64         exr :  8;
    cyg_uint64         rsv :  8; 
    cyg_uint64         ccr :  8;
    cyg_uint64         pc  : 24;    
} HAL_SavedRegisters;


//===========================================================================
//                              BIT MANIPULATION ROUTINES
// DESCRIPTION:
//     These macros place in index the bit index of the least significant
//     bit in mask. The H8s does not contain instructions for performing 
//     these manipulation routines so we make them calls to functions
//===========================================================================
externC cyg_uint32 hal_lsbit_index(cyg_uint32 mask);
externC cyg_uint32 hal_msbit_index(cyg_uint32 mask);
#define HAL_LSBIT_INDEX(index, mask) index = hal_lsbit_index(mask);
#define HAL_MSBIT_INDEX(index, mask) index = hal_msbit_index(mask);


//===========================================================================
//                              INIT EXTRA REGISTERS
// DESCRIPTION:
//     Not used in this architecture port
//===========================================================================
#if defined(CYGHWR_HAL_H8S_USE_MAC)
//
// if we use MAC then we initialize it for debugging purposes
//
#ifndef HAL_THREAD_INIT_CONTEXT_EXTRA
    #define HAL_THREAD_INIT_CONTEXT_EXTRA(_regs_, _id_) \
    {                                                   \
        _regs_->mach        = (_id_)|0xddd8;            \
        _regs_->macl        = (_id_)|0xddd7;            \
    }
#endif
#else // !defined(CYGHWR_HAL_H8S_USE_MAC)
//
// if we do not use MAC we leave this macro empty
//
#ifndef HAL_THREAD_INIT_CONTEXT_EXTRA
    #define HAL_THREAD_INIT_CONTEXT_EXTRA(_regs_, _id_)
#endif
#endif


//===========================================================================
//                              INIT THREAD CONTEXT
// DESCRIPTION:
//     This initializes a restorable CPU context onto a stack pointer
//     so that a later call to HAL_THREAD_LOAD_CONTEXT() or 
//     HAL_THREAD_SWITCH_CONTEXT() will execute it correctly. This macro 
//     needs to take account of the same optional features of the 
//     architecture as the definition of HAL_SavedRegisters.
//
//  PARAMETERS:
//     '_sp_'    A location containing the current value of the thread抯 
//               stack pointer. This should be a variable or a structure 
//               field. The SP value will be read out of here and an 
//               adjusted value written back.
//
//     '_arg_'   A value that is passed as the first argument to the entry 
//               point function. 
//    
//     '_entry_' The address of an entry point function. This will be called
//               according the C calling conventions, and the value of arg 
//               will be passed as the first argument. This function should 
//               have the following type signature:
//               void entry(CYG_ADDRWORD arg).
//
//     '_id_'    A thread id value. This is only used for debugging 
//               purposes, it is ORed into the initialization pattern for
//               unused registers and may be used to help identify the 
//               thread from its register dump. The least significant
//               16 bits of this value should be zero to allow space for a 
//               register identifier.
//
// NOTES:
//     We force a 2 byte boundary alignment for _sp_ because the H8S
//     architecture requires always an even stack pointer value.
//===========================================================================
#define HAL_THREAD_INIT_CONTEXT(_sparg_, _arg_, _entry_, _id_)                   \
{                                                                                \
    register HAL_SavedRegisters *_regs_;                                         \
    register cyg_uint32          _sp_ = (cyg_uint32)_sparg_;                     \
    _sp_ = _sp_ & ~(sizeof(cyg_uint16)-1);                                       \
    _regs_ = (HAL_SavedRegisters *)((_sp_) - sizeof(HAL_SavedRegisters));        \
    HAL_THREAD_INIT_CONTEXT_EXTRA(_regs_, _id_);                                 \
    _regs_->er6        = (_id_)|0xddd6;                                          \
    _regs_->er5        = (_id_)|0xddd5;                                          \
    _regs_->er4        = (_id_)|0xddd4;                                          \
    _regs_->er3        = (_id_)|0xddd3;                                          \
    _regs_->er2        = (_id_)|0xddd2;                                          \
    _regs_->er1        = (_id_)|0xddd1;                                          \
    _regs_->er0        = (cyg_uint32)(_arg_);                                    \
    _regs_->exr        = 0;                                                      \
    _regs_->pc         = (cyg_uint32)(_entry_) & 0xFFFFFF;                       \
    _regs_->ccr        = 0;                                                      \
    _sparg_            = (cyg_uint32)(_regs_);                                   \
}


//---------------------------------------------------------------------------
///
/// Switch thread context.
/// Implements thread switch code. Implemented in assembly in file context.S
///
/// \param  to    Address of SP of thread we will go to
/// \param  from  Address of SP of thread we are coming from
///
externC void hal_thread_switch_context(CYG_ADDRESS to, CYG_ADDRESS from);

//---------------------------------------------------------------------------
///
/// Load thread context.
/// Implements thread sload code. Implemented in assembly in file context.S
///
/// \param  to    Address of SP of thread we will go to.
///
externC void hal_thread_load_context(CYG_ADDRESS to) __attribute__ ((noreturn));

//===========================================================================
//                            CONTEXT SWITCH MACROS
// DESCRIPTION:
//     These macros implement the thread switch code. The arguments are:
//
//  PARAMETERS:
//     '_from_'    A pointer to a location where the stack pointer of 
//                 the current thread will be stored.
//
//     '_to_'      A pointer to a location from where the stack pointer 
//                 of the next thread will be read.
//
//  NOTES:
//      This macro calls hal_thread_switch_context(_to_, _from_). This 
//      will push PC and CCR onto the stack.   
//===========================================================================
#define HAL_THREAD_SWITCH_CONTEXT(_from_, _to_)                     \
        hal_thread_switch_context((CYG_ADDRESS)_to_, (CYG_ADDRESS)_from_);

#define HAL_THREAD_LOAD_CONTEXT(_to_)                               \
        hal_thread_load_context((CYG_ADDRESS)_to_);


//===========================================================================
//                              REORDER BARRIER
// DESCRIPTION:
//     When optimizing the compiler can reorder code. In multithreaded 
//     systems where the order of actions is vital, this can sometimes cause 
//     problems. This macro may be inserted into places where reordering 
//     should not happen.
//===========================================================================
#define HAL_REORDER_BARRIER() asm volatile ( "" : : : "memory" )


//===========================================================================
//                              BREAKPOINT SUPPORT
// DESCRIPTION:
//     These macros provide support for breakpoints.
//
// HAL_BREAKPOINT()    is a code sequence that will cause a breakpoint to
//                     happen if executed.
// HAL_BREAKINST       is the value of the breakpoint instruction 
// HAL_BREAKINST_SIZE  is the size in bytesof one breakpoint instruction
//===========================================================================
#define __HAL_BREAKPOINT(_label_)  # _label_
#define __HAL_BREAKPOINT(_label_)  # _label_